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1. 发明公开

EP1705971A3 Electronic component disposing device and electronic component disposing method 有权
标题翻译：装置和方法用于安装电子部件
公开(公告)号：EP1705971A3
公开(公告)日：2006-12-20
申请号：EP06013130.7
申请日：2005-06-21
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Sakai, Tadahiko , Maeda, Tadashi
IPC分类号： H05K3/34
CPC分类号： H05K3/3436 , H01L24/11 , H01L24/81 , H01L2224/1182 , H01L2224/11822 , H01L2224/1308 , H01L2224/13082 , H01L2224/13109 , H01L2224/13111 , H01L2224/13116 , H01L2224/13118 , H01L2224/13139 , H01L2224/13144 , H01L2224/13164 , H01L2224/16 , H01L2224/29499 , H01L2224/75 , H01L2224/75301 , H01L2224/758 , H01L2224/81011 , H01L2224/81801 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01009 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H05K3/3489 , H05K2201/0215 , H05K2201/035 , H05K2203/0338 , Y02P70/613 , H01L2924/00014 , H01L2224/13099 , H01L2224/29099
摘要： An electronic component disposing device for disposing an electronic component (6) formed with a solder bump (7) on a substrate (12), the electronic component disposing device comprising: a thin film forming mechanism provided with a stage (8) having a smooth plane and a squeegee (9) for spreading flux (10) containing metal powder (16) in a membranous form on the smooth plane by relatively moving the squeegee (9) against the smooth plane; a pressurizing mechanism (14) for embedding the metal powder (16) on a surface of the solder bump (7) by pressing the solder bump against a portion where a thin film (10a) is formed on the smooth plane; and a disposing mechanism for positioning and disposing the solder bump (7), in a state in which the metal powder (16) is embedded, on an electrode (12a) of the substrate (12) and an electronic component disposing method.

2. 发明公开

EP1705971A2 Electronic component disposing device and electronic component disposing method 有权
标题翻译：装置和方法用于安装电子部件
公开(公告)号：EP1705971A2
公开(公告)日：2006-09-27
申请号：EP06013130.7
申请日：2005-06-21
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： Sakai, Tadahiko , Maeda, Tadashi
IPC分类号： H05K3/34
CPC分类号： H05K3/3436 , H01L24/11 , H01L24/81 , H01L2224/1182 , H01L2224/11822 , H01L2224/1308 , H01L2224/13082 , H01L2224/13109 , H01L2224/13111 , H01L2224/13116 , H01L2224/13118 , H01L2224/13139 , H01L2224/13144 , H01L2224/13164 , H01L2224/16 , H01L2224/29499 , H01L2224/75 , H01L2224/75301 , H01L2224/758 , H01L2224/81011 , H01L2224/81801 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01009 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H05K3/3489 , H05K2201/0215 , H05K2201/035 , H05K2203/0338 , Y02P70/613 , H01L2924/00014 , H01L2224/13099 , H01L2224/29099
摘要： An electronic component disposing device for disposing an electronic component formed with a solder bump on a substrate, the electronic component disposing device comprising: a thin film forming mechanism provided with a stage having a smooth plane and a squeegee for spreading flux containing metal powder in a membranous form on the smooth plane by relatively moving the squeegee against the smooth plane; a pressurizing mechanism for embedding the metal powder on a surface of the solder bump by pressing the solder bump against a portion where a thin film is formed on the smooth plane; and a disposing mechanism for positioning and disposing the solder bump, in a state in which the metal powder is embedded, on an electrode of the substrate and an electronic component disposing method.
摘要翻译：用于电子元件的配置处置装置的电子部件的基片（6）形成有焊料凸块（7）上的（12），所述电子元件配置装置，包括：具有光滑设置有一个阶段的薄膜形成机构（8）平面和用于通过相对地移动所述刮板在光滑平面的膜状形式扩散通量（10）包含金属粉末（16）面的刮板（9）（9）抵靠平滑; 的加压机构平面（14），用于通过按压所述焊料凸块，其中对薄膜（10A）是对平滑形成的部分的焊料凸块（7）的表面上嵌入金属粉末（16）; 和用于定位和布置所述焊料凸块设置一个机构（7）的状态下的基板，其中所述金属粉末（16）嵌入，在与（12）的电极（12a）和电子部件处理方法。

5. 发明公开

EP1705969A2 Electronic assembly having a substrate laminated within a backplate cavity 审中-公开
标题翻译：电子邮件中的Elektronischer Aufbau mit een Ausnehmung einerRückplattelaminiertem Substrat
公开(公告)号：EP1705969A2
公开(公告)日：2006-09-27
申请号：EP06075073.4
申请日：2006-01-11
申请人： Delphi Technologies, Inc.
发明人： Mandel, Larry M. , Garner, Timothy D. , Baker, Andrew R.
IPC分类号： H05K3/00
CPC分类号： B30B5/02 , B30B15/024 , B30B15/065 , H01L24/75 , H01L2224/75303 , H01L2224/75315 , H01L2224/758 , H01L2924/01013 , H01L2924/01033 , H01L2924/01075 , H01L2924/15787 , H05K1/0306 , H05K3/0061 , H05K3/386 , H05K2203/0278 , H05K2203/068 , H01L2924/00
摘要： An electronic assembly (100) includes a backplate (102), a substrate (106) and a pressure sensitive adhesive (PSA) (104). The backplate (102) includes a cavity (103) and the substrate (106) includes a plurality of interconnected electrical components (107). The substrate (106) is positioned within the cavity (103) and a wall height of the cavity (103) is greater than a combined thickness of the substrate (106) and the adhesive (104), which bonds the substrate (106) to the backplate (102).
摘要翻译：电子组件（100）包括背板（102），基板（106）和压敏粘合剂（PSA）（104）。背板（102）包括空腔（103），并且基板（106）包括多个互连的电气部件（107）。衬底（106）被定位在空腔（103）内并且空腔（103）的壁高度大于衬底（106）和粘合剂（104）的组合厚度，其将衬底（106）接合到背板（102）。

6. 发明公开

EP0501358A2 Connecting method and apparatus for electric circuit components 失效
标题翻译：电连接构件和装置和用于连接电气元件的方法。
公开(公告)号：EP0501358A2
公开(公告)日：1992-09-02
申请号：EP92103025.0
申请日：1992-02-24
申请人： CANON KABUSHIKI KAISHA , SUMITOMO METAL INDUSTRIES, LTD.
发明人： Okabayashi, Takahiro, c/o SUMITOMO METAL IND., LTD , Yoshizawa, Tetsuo, c/o CANON KABUSHIKI KAISHA , Miyazaki, Toyohide, c/o CANON KABUSHIKI KAISHA , Kondo, Hiroshi, c/o CANON KABUSHIKI KAISHA , Terayama, Yoshimi, c/o CANON KABUSHIKI KAISHA , Sakaki, Takashi, c/o CANON KABUSHIKI KAISHA , Ikegami, Yuichi, c/o SUMITOMO METAL IND., LTD. , Kondo, Kazuo, c/o SUMITOMO METAL IND., LTD. , Tamura, Yoichi, c/o SUMITOMO METAL IND., LTD. , Nakatsuka, Yasuo, c/o SUMITOMO METAL IND., LTD.
IPC分类号： H05K3/36 , H01R23/72 , H01L23/32 , B23K3/02
CPC分类号： H01L21/486 , H01L23/49827 , H01L2224/16 , H01L2224/75 , H01L2224/75301 , H01L2224/75313 , H01L2224/758 , H01L2924/01004 , H01L2924/01014 , H01L2924/01078 , H01L2924/01079 , H01R12/714 , H05K3/325 , H05K3/328 , H05K3/368 , H05K2201/10378 , H05K2203/0278
摘要： A method for the electrical connection between electrical joints of electric circuit components (4,5) includes disposing said electric circuit components so that said joints for the electrical connection are opposed to each other, and making the electrical connection between said electrical joints with a biasing force (110) which is exerted by an elastic member (8) from at least one side of said electric circuit component so that the biasing force is exerted consecutively from an intermediate position of connecting area where said joints are located to the periphery of said connecting area.
摘要翻译：一种用于电路部件的电接头之间（4,5）的电连接方法，包括：设置所述电路元件，使得所述用于电连接的关节对置海誓山盟，并且与偏置所述电接头之间的电连接这是由在弹性构件施加的力（110）所有（8）从所述电路元件的至少一个侧面所以没有的偏置力从在其中所述接头位于与所述的连接周边连接区域的中间位置连续地施加区域。

7. 发明公开

EP0273703A2 An adaptive lithography method and system 失效
标题翻译： Verfahren und System einer适应石版画。
公开(公告)号：EP0273703A2
公开(公告)日：1988-07-06
申请号：EP87311351.8
申请日：1987-12-23
申请人： GENERAL ELECTRIC COMPANY
发明人： Eichelberger, Charles William , Welles, Kenneth Brakeley, II , Wojnarowski, Robert John
IPC分类号： H01L21/00 , G03F7/23 , G06F15/60 , H05K3/00
CPC分类号： H01L24/25 , G03F7/704 , H01L21/6715 , H01L21/768 , H01L23/5389 , H01L24/24 , H01L24/75 , H01L24/76 , H01L2224/24137 , H01L2224/73267 , H01L2224/75 , H01L2224/75753 , H01L2224/758 , H01L2224/759 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01038 , H01L2924/01074 , H01L2924/01075 , H01L2924/01082 , H01L2924/12042 , H01L2924/12043 , H01L2924/14 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , Y10S148/093 , Y10S430/146 , H01L2924/00
摘要： An adaptive method and system are disclosed for providing high density interconnections of very large scale integrated circuits on a substrate 28. The procedure is performed in four basic steps: first an artwork representation for the interconnections of the integrated circuits is generated. This artwork representation is stored in a computer data base and assumes the integrated circuits to be at predetermined ideal locations and positions on the substrate. Second, using imaging (26,38,40), the actual positions of each integrated circuit on the substrate are determined. The actual positions of the integrated circuits are compared with their ideal positions to compute an offset and rotation for each integrated circuit on the substrate. Third, the computed offsets and rotations are then used to modify the artwork representation stored in the data base to account for the actual locations and positions of the integrated circuits on the substrate. Finally, the modified artwork representation is used to drive a direct writing laser lithography system (10,12,16,18,20,22,24) that actually forms the high density interconnections of the integrated circuits on the substrate. The artwork representations are stored in computer data bases in vector form to minimize storage requirements. The laser beam produced by the lithography system is raster scanned on the substrate. Modulation of the laser beam is controlled by the real time conversion of the vector representation of the modified artwork to be a bit mapped representation. To assure accurate formations of the interconnects, a feedback alignment system (42,44,46,48) is used to accurately position the laser beam throughout its raster scan.
摘要翻译：公开了一种用于在基板28上提供非常大规模集成电路的高密度互连的自适应方法和系统。该过程在四个基本步骤中执行：首先，生成用于集成电路互连的图形表示。该图形表示存储在计算机数据库中，并且使集成电路处于基板上的预定理想位置和位置。第二，使用成像（26,38,40），确定每个集成电路在基板上的实际位置。将集成电路的实际位置与其理想位置进行比较，以计算衬底上每个集成电路的偏移和旋转。第三，然后使用所计算的偏移和旋转来修改存储在数据库中的图形表示，以说明基板上集成电路的实际位置和位置。最后，改进的图案表示用于驱动实际形成衬底上的集成电路的高密度互连的直写式激光光刻系统（10,12,16,18,20,22,24）。艺术品表示以矢量形式存储在计算机数据库中以最小化存储要求。由光刻系统产生的激光束在基板上进行光栅扫描。激光束的调制由被修改的图形的矢量表示的实时转换控制为位图表示。为了确保互连的精确结构，使用反馈对准系统（42,44,46,48）来精确地定位激光束在整个光栅扫描中。

8. 发明公开

EP1705969A3 Electronic assembly having a substrate laminated within a backplate cavity 审中-公开
标题翻译：电子结构与层压在返回盘基片的凹部
公开(公告)号：EP1705969A3
公开(公告)日：2008-07-02
申请号：EP06075073.4
申请日：2006-01-11
申请人： Delphi Technologies, Inc.
发明人： Mandel, Larry M. , Garner, Timothy D. , Baker, Andrew R.
IPC分类号： H05K3/00
CPC分类号： B30B5/02 , B30B15/024 , B30B15/065 , H01L24/75 , H01L2224/75303 , H01L2224/75315 , H01L2224/758 , H01L2924/01013 , H01L2924/01033 , H01L2924/01075 , H01L2924/15787 , H05K1/0306 , H05K3/0061 , H05K3/386 , H05K2203/0278 , H05K2203/068 , H01L2924/00
摘要： An electronic assembly (100) includes a backplate (102), a substrate (106) and a pressure sensitive adhesive (PSA) (104). The backplate (102) includes a cavity (103) and the substrate (106) includes a plurality of interconnected electrical components (107). The substrate (106) is positioned within the cavity (103) and a wall height of the cavity (103) is greater than a combined thickness of the substrate (106) and the adhesive (104), which bonds the substrate (106) to the backplate (102).

9. 发明授权

EP1685751B1 METHOD OF SOLDERING ELECTRONIC COMPONENT HAVING SOLDER BUMPS TO SUBSTRATE 有权
标题翻译：将电子元件焊接焊料凸点的方法ON A SUBSTRATE
公开(公告)号：EP1685751B1
公开(公告)日：2007-09-12
申请号：EP05752868.9
申请日：2005-06-21
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： SAKAI, Tadahiko , MAEDA, Tadashi
IPC分类号： H05K3/34
CPC分类号： H05K3/3436 , H01L24/11 , H01L24/81 , H01L2224/1182 , H01L2224/11822 , H01L2224/1308 , H01L2224/13082 , H01L2224/13109 , H01L2224/13111 , H01L2224/13116 , H01L2224/13118 , H01L2224/13139 , H01L2224/13144 , H01L2224/13164 , H01L2224/16 , H01L2224/29499 , H01L2224/75 , H01L2224/75301 , H01L2224/758 , H01L2224/81011 , H01L2224/81801 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01009 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H05K3/3489 , H05K2201/0215 , H05K2201/035 , H05K2203/0338 , Y02P70/613 , H01L2924/00014 , H01L2224/13099 , H01L2224/29099
摘要： A method of soldering electronic component (6) having solder bumps (7) formed thereon to substrate (12), wherein bumps (7) are pressed against a flux transferring stage on which a thin film is formed of flux (10) containing metal powder (16) of good wettability to solder so as to cause metal powder (16) to penetrate oxide films (7a) and embed in the surfaces on the bottom parts of bumps (7), and bumps (7) in this state are positioned and mounted to electrodes (12a) on substrate (12). Substrate (12) is then heated to melt bumps (7) and allow the melted solder to flow and spread along the surfaces of metal powder (16) toward electrodes (12a). The method can thus provide solder bonding portions of high quality without any soldering defect and deterioration of the insulating property.

10. 发明公开

EP1685751A1 METHOD OF SOLDERING ELECTRONIC COMPONENT HAVING SOLDER BUMPS TO SUBSTRATE 有权
标题翻译：将电子元件焊接焊料凸点的方法ON A SUBSTRATE
公开(公告)号：EP1685751A1
公开(公告)日：2006-08-02
申请号：EP05752868.9
申请日：2005-06-21
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
发明人： SAKAI, Tadahiko , MAEDA, Tadashi
IPC分类号： H05K3/34
CPC分类号： H05K3/3436 , H01L24/11 , H01L24/81 , H01L2224/1182 , H01L2224/11822 , H01L2224/1308 , H01L2224/13082 , H01L2224/13109 , H01L2224/13111 , H01L2224/13116 , H01L2224/13118 , H01L2224/13139 , H01L2224/13144 , H01L2224/13164 , H01L2224/16 , H01L2224/29499 , H01L2224/75 , H01L2224/75301 , H01L2224/758 , H01L2224/81011 , H01L2224/81801 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01009 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H05K3/3489 , H05K2201/0215 , H05K2201/035 , H05K2203/0338 , Y02P70/613 , H01L2924/00014 , H01L2224/13099 , H01L2224/29099
摘要： A method of soldering electronic component (6) having solder bumps (7) formed thereon to substrate (12), wherein bumps (7) are pressed against a flux transferring stage on which a thin film is formed of flux (10) containing metal powder (16) of good wettability to solder so as to cause metal powder (16) to penetrate oxide films (7a) and embed in the surfaces on the bottom parts of bumps (7), and bumps (7) in this state are positioned and mounted to electrodes (12a) on substrate (12). Substrate (12) is then heated to melt bumps (7) and allow the melted solder to flow and spread along the surfaces of metal powder (16) toward electrodes (12a). The method can thus provide solder bonding portions of high quality without any soldering defect and deterioration of the insulating property.

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