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1. 发明公开

EP0338467A1 Diffusion barrier structure for a semiconductor device 失效
标题翻译： Diffusionbarrierenstrukturfüreine Halbleitervorrichtung。
公开(公告)号：EP0338467A1
公开(公告)日：1989-10-25
申请号：EP89106792.8
申请日：1989-04-18
申请人： FUJITSU LIMITED
发明人： Nishida, Kenji
IPC分类号： H01L21/285 , H01L21/60 , H01L23/50
CPC分类号： H01L21/76859 , H01L21/76843 , H01L21/76856 , H01L23/53223 , H01L2924/0002 , H01L2924/00
摘要： A diffusion barrier structure comprises a first barrier layer (15, 23) provided on a substrate (11, 13, 21, 22) of a semiconductor device for preventing transport of component elements of the substrate and an electrode (18, 27) from passing therethrough by diffusion, an interface layer (16′) formed in the first barrier layer adjacent to a top surface (16) of the first barrier layer for eliminating effect of microstructure in the first barrier layer on crystal growth to be made on the first barrier layer, and a second barrier layer (17, 25) of a same material as the material of the first barrier layer and provided on the first barrier layer so as to be sandwiched between the first barrier layer and the metal electrode for preventing the component elements from being transported therethrough by diffusion.
摘要翻译：扩散阻挡结构包括设置在半导体器件的衬底（11,13,21,22）上的第一阻挡层（15,23），用于防止衬底的元件的传输和电极（18,27）不经过通过扩散而形成在与第一阻挡层的顶表面相邻的第一阻挡层中形成的界面层（16分钟），用于消除第一阻挡层上的微结构对第一势垒上的晶体生长的影响层和与第一阻挡层的材料相同的材料的第二阻挡层（17,25），并且设置在第一阻挡层上，以夹在第一阻挡层和金属电极之间，以防止构成元件不能通过扩散传送。

2. 发明公开

EP1134802A2 Method of forming conducting diffusion barriers 审中-公开
标题翻译： Verfahren zur Erzeugung von leitenden Diffusionsbarrieren
公开(公告)号：EP1134802A2
公开(公告)日：2001-09-19
申请号：EP01302248.8
申请日：2001-03-12
申请人： SHARP KABUSHIKI KAISHA
发明人： Ma, Yanjun
IPC分类号： H01L21/768
CPC分类号： H01L21/76859 , H01L21/76843 , H01L21/76864
摘要： A method of forming conducting diffusion barriers by depositing an initial film and implanting ions to modify the film is provided. An initial film having good step coverage is deposited over a semiconductor substrate. The initial material need not have the desired properties for a conducting diffusion barrier, but preferably contains one or more elements to be used in forming a desired film with the appropriate properties. The initial material is deposited by CVD, PECVD or IMP deposition. Ions are preferably implanted using plasma immersion ion implantation (PIII), although other methods are also provided. The method of the present invention produces binary, ternary, quaternary and other more complex films, while providing adequate step coverage.
摘要翻译：提供了通过沉积初始膜和注入离子来改变膜来形成导电扩散阻挡层的方法。在半导体衬底上沉积具有良好阶梯覆盖率的初始膜。初始材料不需要具有用于导电扩散阻挡层的所需性质，但优选包含一种或多种用于形成具有适当性质的所需膜的元素。初始材料通过CVD，PECVD或IMP沉积沉积。优选使用等离子体浸没离子注入（PIII）注入离子，尽管也提供其它方法。本发明的方法产生二元，三元，四元等复合膜，同时提供足够的步骤覆盖。

3. 发明公开

EP0269019A3 Method for producing a semiconductor device 失效
标题翻译：半导体器件的接触
公开(公告)号：EP0269019A3
公开(公告)日：1990-02-07
申请号：EP87117153.4
申请日：1987-11-20
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Okumura, Katsuya c/o Patent Division
IPC分类号： H01L29/40 , H01L23/48
CPC分类号： H01L21/76864 , H01L21/76843 , H01L21/76855 , H01L21/76859 , H01L29/456 , Y10S257/915
摘要： A semiconductor device is disclosed, in which a titanium nitride film (12) containing boron or carbon is provided between a semiconductor substrate (10) and an aluminum film (13). Non-reacted substances in the titanium nitride film (12) are rendered inactive by boron or carbon contained in the titanium nitride film (12). Thus, it is possible to improve the barrier properties of the titanium nitride film (12) as mutual diffusion prevention film and also ensure good electric conductivity.

4. 发明公开

EP3067920A1 SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：EP3067920A1
公开(公告)日：2016-09-14
申请号：EP13874852.0
申请日：2013-11-08
申请人： Renesas Electronics Corporation
发明人： USAMI, Tatsuya , MIURA, Yukio , TSUCHIYA, Hideaki
IPC分类号： H01L21/321 , H01L21/768
CPC分类号： H01L23/528 , H01L21/02074 , H01L21/02126 , H01L21/02211 , H01L21/02271 , H01L21/02274 , H01L21/263 , H01L21/265 , H01L21/3105 , H01L21/31144 , H01L21/321 , H01L21/768 , H01L21/76802 , H01L21/76807 , H01L21/76808 , H01L21/76825 , H01L21/76826 , H01L21/76829 , H01L21/76831 , H01L21/76832 , H01L21/76834 , H01L21/76843 , H01L21/76859 , H01L21/76879 , H01L21/76883 , H01L23/5226 , H01L23/53228 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes an interlayer insulating film INS2, adjacent Cu wirings M1W formed in the interlayer insulating film INS2, and an insulating barrier film BR1 which is in contact with a surface of the interlayer insulating film INS2 and surfaces of the Cu wirings M1W and covers the interlayer insulating film INS2 and the Cu wirings M1W. Between the adjacent Cu wirings M1W, the interlayer insulating film INS2 has a damage layer DM1 on its surface, and has an electric field relaxation layer ER1 having a higher nitrogen concentration than a nitrogen concentration of the damage layer DM1 at a position deeper than the damage layer DM1.
摘要翻译：半导体器件包括层间绝缘膜INS2，在层间绝缘膜INS2中形成的相邻Cu布线M1W以及与层间绝缘膜INS2的表面和Cu布线M1W和盖的表面接触的绝缘阻挡膜BR1 层间绝缘膜INS2和Cu布线M1W。在相邻的Cu布线M1W之间，层间绝缘膜INS2在其表面具有损伤层DM1，在比损伤深的位置具有比损伤层DM1的氮浓度高的氮浓度的电场缓和层ER1 层DM1。

5. 发明公开

EP0464791A2 A method for burying low resistance material in a contact hole 失效
标题翻译： Verfahren zum Absenken von材料mit niedrigem Widerstand在einem Kontaktloch。
公开(公告)号：EP0464791A2
公开(公告)日：1992-01-08
申请号：EP91111027.8
申请日：1991-07-03
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Ohshima, Yoichi, c/o Intellectual Property Div.
IPC分类号： H01L21/768
CPC分类号： H01L21/76867 , H01L21/76843 , H01L21/76847 , H01L21/76855 , H01L21/76859 , H01L21/76877
摘要： In a method for burying a contact hole according to the present invention, first, a polycrystalline silicon film (106) is formed on a region including a contact hole (105). Impurities are introduced into the polycrystalline silicon film (106). Next, a metal film is formed on the polycrystalline silicon film (106). Next, a polycrystalline silicon film (108) is formed on the metal film. Impurities are introduced into the polycrystalline silicon film (108). Next, a metal film is formed on the polycrystalline silicon film (108). A polycrystalline silicon film (110) is formed on the metal film, and the contact hole is completely buried. Thereafter, a heat treatment is performed, thereby the impurities are diffused to the above two polycrystalline silicon films and all or a part of the metal film is changed to a metal silicide film (111, 112). Next, an etchback is performed, thereby the polycrystalline silicon film and the metal silicide film are kept in only the contact hole.
摘要翻译：在根据本发明的埋入接触孔的方法中，首先，在包括接触孔（105）的区域上形成多晶硅膜（106）。杂质被引入到多晶硅膜（106）中。接着，在多晶硅膜（106）上形成金属膜。接着，在金属膜上形成多晶硅膜108。杂质被引入到多晶硅膜（108）中。接着，在多晶硅膜108上形成金属膜。在金属膜上形成多晶硅膜（110），完全埋入接触孔。此后，进行热处理，由此杂质扩散到上述两个多晶硅膜上，金属膜的全部或一部分变成金属硅化物膜（111,112）。接下来，进行回蚀，由此多晶硅膜和金属硅化物膜仅保留在接触孔中。

6. 发明授权

EP0464791B1 A method for burying low resistance material in a contact hole 失效
标题翻译：在接触孔低电阻材料的降低的方法
公开(公告)号：EP0464791B1
公开(公告)日：1996-06-12
申请号：EP91111027.8
申请日：1991-07-03
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Ohshima, Yoichi, c/o Intellectual Property Div.
IPC分类号： H01L21/768
CPC分类号： H01L21/76867 , H01L21/76843 , H01L21/76847 , H01L21/76855 , H01L21/76859 , H01L21/76877

7. 发明授权

EP0269019B1 Method for producing a semiconductor device 失效
标题翻译：一种制造半导体器件的方法。
公开(公告)号：EP0269019B1
公开(公告)日：1994-08-03
申请号：EP87117153.4
申请日：1987-11-20
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Okumura, Katsuya c/o Patent Division
IPC分类号： H01L29/40 , H01L23/48
CPC分类号： H01L21/76864 , H01L21/76843 , H01L21/76855 , H01L21/76859 , H01L29/456 , Y10S257/915

8. 发明授权

EP0338467B1 Diffusion barrier structure for a semiconductor device 失效
标题翻译：用于半导体器件的扩散障碍物结构
公开(公告)号：EP0338467B1
公开(公告)日：1993-09-15
申请号：EP89106792.8
申请日：1989-04-18
申请人： FUJITSU LIMITED
发明人： Nishida, Kenji
IPC分类号： H01L21/285 , H01L21/60 , H01L23/50
CPC分类号： H01L21/76859 , H01L21/76843 , H01L21/76856 , H01L23/53223 , H01L2924/0002 , H01L2924/00

9. 发明公开

EP0464791A3 A method for burying low resistance material in a contact hole 失效
标题翻译：在接触孔中埋设低电阻材料的方法
公开(公告)号：EP0464791A3
公开(公告)日：1992-06-03
申请号：EP91111027.8
申请日：1991-07-03
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Ohshima, Yoichi, c/o Intellectual Property Div.
IPC分类号： H01L21/768
CPC分类号： H01L21/76867 , H01L21/76843 , H01L21/76847 , H01L21/76855 , H01L21/76859 , H01L21/76877
摘要： In a method for burying a contact hole according to the present invention, first, a polycrystalline silicon film (106) is formed on a region including a contact hole (105). Impurities are introduced into the polycrystalline silicon film (106). Next, a metal film is formed on the polycrystalline silicon film (106). Next, a polycrystalline silicon film (108) is formed on the metal film. Impurities are introduced into the polycrystalline silicon film (108). Next, a metal film is formed on the polycrystalline silicon film (108). A polycrystalline silicon film (110) is formed on the metal film, and the contact hole is completely buried. Thereafter, a heat treatment is performed, thereby the impurities are diffused to the above two polycrystalline silicon films and all or a part of the metal film is changed to a metal silicide film (111, 112). Next, an etchback is performed, thereby the polycrystalline silicon film and the metal silicide film are kept in only the contact hole.

10. 发明公开

EP3067920A4 SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SAME 有权
标题翻译： HALBLEITERBAUELEMENT UND VERFAHREN ZUR HERSTELLUNG DAVON
公开(公告)号：EP3067920A4
公开(公告)日：2017-08-09
申请号：EP13874852
申请日：2013-11-08
申请人： RENESAS ELECTRONICS CORP
发明人： USAMI TATSUYA , MIURA YUKIO , TSUCHIYA HIDEAKI
IPC分类号： H01L21/3105 , H01L21/768 , H01L23/532
CPC分类号： H01L23/528 , H01L21/02074 , H01L21/02126 , H01L21/02211 , H01L21/02271 , H01L21/02274 , H01L21/263 , H01L21/265 , H01L21/3105 , H01L21/31144 , H01L21/321 , H01L21/768 , H01L21/76802 , H01L21/76807 , H01L21/76808 , H01L21/76825 , H01L21/76826 , H01L21/76829 , H01L21/76831 , H01L21/76832 , H01L21/76834 , H01L21/76843 , H01L21/76859 , H01L21/76879 , H01L21/76883 , H01L23/5226 , H01L23/53228 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00

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