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1. 发明授权

EP2018663B1 METHOD OF FABRICATING SEMICONDUCTOR DEVICES INCLUDING SELF ALIGNED REFRACTORY CONTACTS 有权
公开(公告)号：EP2018663B1
公开(公告)日：2018-09-26
申请号：EP07776709.3
申请日：2007-05-03
申请人： Cree, Inc.
发明人： SAXLER, Adam, William , SHEPPARD, Scott
IPC分类号： H01L21/335
CPC分类号： H01L29/7787 , H01L21/3245 , H01L29/2003 , H01L29/66462
摘要： Methods of forming semiconductor devices are provided by forming a semiconductor layer on a semiconductor substrate. A mask is formed on the semiconductor layer. Ions having a first conductivity type are implanted into the semiconductor layer according to the mask to form implanted regions on the semiconductor layer. Metal layers are formed on the implanted regions according to the mask. The implanted regions and the metal layers are annealed in a single step to respectively activate the implanted ions in the implanted regions and provide ohmic contacts on the implanted regions. Related devices are also provided.

2. 发明授权

EP2638565B1 A METHOD FOR TREATING A SUBSTRATE AND A SUBSTRATE 有权转让
标题翻译：一种处理基板和基板的方法
公开(公告)号：EP2638565B1
公开(公告)日：2018-05-16
申请号：EP11791014.1
申请日：2011-11-08
申请人： Comptek Solutions Oy
发明人： LANG, Jouko , PUNKKINEN, Marko , TUOMINEN, Marjukka , TUOMINEN, Veikko , DAHL, Johnny , VÄYRYNEN, Juhani , LAUKKANEN, Pekka
IPC分类号： H01L21/316 , H01L21/02 , H01L21/28 , H01L29/20
CPC分类号： H01L29/02 , H01L21/02046 , H01L21/02109 , H01L21/02172 , H01L21/02241 , H01L21/28264 , H01L21/31666 , H01L21/3245 , H01L29/1054 , H01L29/20 , H01L29/201 , H01L29/205
摘要： A method for treating a compound semiconductor substrate, in which method in vacuum conditions a surface of an In-containing III-As, III-Sb or III-P substrate is cleaned from amorphous native oxides and after that the cleaned substrate is heated to a temperature of about 250-550° C. and oxidized by introducing oxygen gas onto the surface of the substrate. The invention relates also to a compound semiconductor substrate, and the use of the substrate in a structure of a transistor such as MOSFET.

3. 发明授权

EP2821532B1 METHOD FOR TREATING A GROUP-III NITRIDE SUBSTRATE AND METHOD FOR MANUFACTURING AN EPITAXIAL SUBSTRATE 有权
公开(公告)号：EP2821532B1
公开(公告)日：2018-01-10
申请号：EP14772262
申请日：2014-03-20
申请人： NGK INSULATORS LTD
发明人： KURAOKA YOSHITAKA , SUGIYAMA TOMOHIKO , MAEHARA SOTA
IPC分类号： C30B25/20 , C30B25/18 , C30B29/38 , C30B29/40 , H01L21/20 , H01L21/205 , H01L21/324
CPC分类号： H01L21/0254 , C30B25/186 , C30B29/403 , H01L21/02024 , H01L21/02389 , H01L21/0262 , H01L21/02658 , H01L21/30625 , H01L21/324 , H01L21/3245
摘要： Provided is a method for treating a group III nitride substrate capable of obtaining, in the case where a group III nitride layer is laminated thereon, a group III nitride substrate that can form an electronic device having excellent characteristics. The method for treating a group III nitride substrate includes the steps of CMPing a surface of a substrate, elevating a temperature of the group III nitride substrate after the CMP process to a predetermined annealing temperature under a nitrogen gas atmosphere, and holding the group III nitride substrate whose temperature has been elevated to the annealing temperature for four minutes or more and eight minutes or less in a first mixed atmosphere of a hydrogen gas and a nitrogen gas or a second mixed atmosphere of a hydrogen gas and an ammonia gas.

4. 发明公开

EP3157068A4 SEMICONDUCTOR MULTILAYER STRUCTURE AND METHOD FOR PRODUCING SAME 有权
公开(公告)号：EP3157068A4
公开(公告)日：2017-11-22
申请号：EP15806188
申请日：2015-06-05
申请人： SUMITOMO CHEMICAL CO
发明人： KANEDA NAOKI , MISHIMA TOMOYOSHI , NAKAMURA TOHRU
IPC分类号： H01L21/265 , H01L21/324 , H01L33/00
CPC分类号： H01L33/325 , H01L21/26553 , H01L21/3245 , H01L21/3247 , H01L29/2003 , H01L33/0075 , H01L33/0095 , H01L33/025
摘要： There is provided a semiconductor multilayer structure, including: an n-type GaN layer; and a p-type GaN layer which is formed on the n-type GaN layer and into which Mg is ion-implanted, and generating an electroluminescence emission having a peak at a photon energy of 3.0 eV or more, by applying a voltage to a pun-junction formed by the n-type GaN layer and the p-type GaN layer.

5. 发明公开

EP3157068A1 SEMICONDUCTOR MULTILAYER STRUCTURE AND METHOD FOR PRODUCING SAME 有权
标题翻译：维多利亚州赫尔辛基大学
公开(公告)号：EP3157068A1
公开(公告)日：2017-04-19
申请号：EP15806188.7
申请日：2015-06-05
申请人： SUMITOMO CHEMICAL COMPANY LIMITED
发明人： KANEDA Naoki , MISHIMA Tomoyoshi , NAKAMURA Tohru
IPC分类号： H01L33/32
CPC分类号： H01L33/325 , H01L21/26553 , H01L21/3245 , H01L21/3247 , H01L29/2003 , H01L33/0075 , H01L33/0095 , H01L33/025
摘要： There is provided a semiconductor multilayer structure, including:
an n-type GaN layer; and a p-type GaN layer which is formed on the n-type GaN layer and into which Mg is ion-implanted, and generating an electroluminescence emission having a peak at a photon energy of 3.0 eV or more, by applying a voltage to a pun-junction formed by the n-type GaN layer and the p-type GaN layer.
摘要翻译：提供了一种半导体多层结构，包括：n型GaN层; 以及p型GaN层，其形成在n型GaN层上，并且其中Mg被离子注入，并且通过将电压施加到电压为3.0eV或更大的光子能量而产生具有峰值的电致发光发射由n型GaN层和p型GaN层形成的双相结。

6. 发明公开

EP2978882A4 CONTROLLABLE OXYGEN CONCENTRATION IN SEMICONDUCTOR SUBSTRATE 有权
标题翻译：可控氧浓度的半导体衬底
公开(公告)号：EP2978882A4
公开(公告)日：2016-11-30
申请号：EP13880194
申请日：2013-03-27
申请人： BEIJING TONGMEI XTAL TECHNOLOGY CO LTD
发明人： YOUNG MORRIS , ZHANG DAVIS , LIU VINCENT WENSEN , WANG YUANLI
IPC分类号： H01L21/322 , C30B29/40 , C30B33/02 , H01L21/324
CPC分类号： C30B33/02 , C30B11/003 , C30B11/006 , C30B11/14 , C30B29/40 , C30B29/42 , C30B29/44 , H01L21/3228 , H01L21/3245 , H01L29/207 , H01L29/36
摘要： A method of controlling oxygen concentration in III-V compound semiconductor substrate comprises providing a plurality of III-V crystal substrates in a container, providing a predetermined amount of material in the container. Atoms of the predetermined amount of material having a high chemical reactivity with oxygen atoms. The method further comprises maintaining a predetermined pressure within the container and annealing the plurality of III-V crystal substrates to yield an oxygen concentration in the crystal substrates. The oxygen concentration is associated with the predetermined amount of material.

7. 发明公开

EP2881982A3 Method for fabricating cmos compatible contact layers in semiconductor devices 有权
标题翻译： Verfahren zur Herstellung CMOS-kompatibler Kontaktschichten在Halbleitervorrichtungen
公开(公告)号：EP2881982A3
公开(公告)日：2015-08-26
申请号：EP14189155.6
申请日：2014-10-16
申请人： IMEC VZW
发明人： Cavaco, Celso , De Jaeger, Brice , Van Hove, Marleen , Motsnyi, Vasyl
IPC分类号： H01L21/8252 , H01L21/3205 , H01L21/3213 , H01L29/45
CPC分类号： H01L33/40 , H01L21/32051 , H01L21/32134 , H01L21/3245 , H01L21/8252 , H01L29/2003 , H01L29/207 , H01L29/452 , H01L33/32 , H01L33/325 , H01L2933/0016
摘要： A method for fabricating Complementary Metal Oxide Semiconductor (CMOS) compatible contact layers in semiconductor devices is disclosed. In one embodiment, a nickel (Ni) layer is deposited on a p-type gallium nitride (GaN) layer of a GaN based structure. Further, the GaN based structure is thermally treated at a temperature range of 350°C to 500°C. Furthermore, the Ni layer is removed using an etchant. Additionally, a CMOS compatible contact layer is deposited on the p-type GaN layer, upon removal of the Ni layer.
摘要翻译：公开了一种在半导体器件中制造互补金属氧化物半导体（CMOS）兼容接触层的方法。在一个实施例中，镍（Ni）层沉积在GaN基结构的p型氮化镓（GaN）层上。此外，GaN基结构在350℃至500℃的温度范围内进行热处理。此外，使用蚀刻剂除去Ni层。此外，在去除Ni层之后，在p型GaN层上沉积CMOS兼容的接触层。

8. 发明公开

EP2821532A1 METHOD FOR PROCESSING GROUP-III NITRIDE SUBSTRATE AND METHOD FOR MANUFACTURING EPITAXIAL SUBSTRATE 有权
标题翻译：方法用于生产外延基板处理III族氮化物衬底和方法
公开(公告)号：EP2821532A1
公开(公告)日：2015-01-07
申请号：EP14772262.3
申请日：2014-03-20
申请人： NGK Insulators, Ltd.
发明人： KURAOKA, Yoshitaka , SUGIYAMA, Tomohiko , MAEHARA, Sota
IPC分类号： C30B25/20 , C30B29/38 , H01L21/20 , H01L21/205 , H01L21/324
CPC分类号： H01L21/0254 , C30B25/186 , C30B29/403 , H01L21/02024 , H01L21/02389 , H01L21/0262 , H01L21/02658 , H01L21/30625 , H01L21/324 , H01L21/3245
摘要： Provided is a method for treating a group III nitride substrate capable of obtaining, in the case where a group III nitride layer is laminated thereon, a group III nitride substrate that can form an electronic device having excellent characteristics. The method for treating a group III nitride substrate includes the steps of CMPing a surface of a substrate, elevating a temperature of the group III nitride substrate after the CMP process to a predetermined annealing temperature under a nitrogen gas atmosphere, and holding the group III nitride substrate whose temperature has been elevated to the annealing temperature for four minutes or more and eight minutes or less in a first mixed atmosphere of a hydrogen gas and a nitrogen gas or a second mixed atmosphere of a hydrogen gas and an ammonia gas.
摘要翻译：提供了用于治疗能够获得的III族氮化物衬底中，在III族氮化物层被层压在其上的，III族氮化物衬底做可以形成在具有优异的特性的电子装置的情况下的方法。用于治疗III族氮化物衬底的方法，包括CMPing一个基板的表面上，在氮气气氛下，在CMP工艺之后III族氮化物衬底的温度升高到预定的退火温度，并保持该III族氮化物的步骤其衬底温度被提升到退火温度四分钟以上且在氢气的第一混合气氛和氮气或氢气和氨气的第二混合气氛8分钟或更少。

9. 发明公开

EP2638565A1 A METHOD FOR TREATING A SUBSTRATE AND A SUBSTRATE 有权转让
标题翻译：方法治疗基底和基底
公开(公告)号：EP2638565A1
公开(公告)日：2013-09-18
申请号：EP11791014.1
申请日：2011-11-08
申请人： Turun yliopisto
发明人： LANG, Jouko , PUNKKINEN, Marko , TUOMINEN, Marjukka , TUOMINEN, Veikko , DAHL, Johnny , VÄYRYNEN, Juhani , LAUKKANEN, Pekka
IPC分类号： H01L21/316 , H01L21/02
CPC分类号： H01L29/02 , H01L21/02046 , H01L21/02109 , H01L21/02172 , H01L21/02241 , H01L21/28264 , H01L21/31666 , H01L21/3245 , H01L29/1054 , H01L29/20 , H01L29/201 , H01L29/205
摘要： A method for treating a compound semiconductor substrate, in which method in vacuum conditions a surface of an In-containing III-As, III-Sb or III-P substrate is cleaned from amorphous native oxides and after that the cleaned substrate is heated to a temperature of about 250-550° C. and oxidized by introducing oxygen gas onto the surface of the substrate. The invention relates also to a compound semiconductor substrate, and the use of the substrate in a structure of a transistor such as MOSFET.

10. 发明授权

EP1386348B9 Method of forming a lattice-mismatched semiconductor layer 有权
标题翻译：形成晶格失配半导体层的方法
公开(公告)号：EP1386348B9
公开(公告)日：2012-07-04
申请号：EP02750893.6
申请日：2002-05-07
申请人： Innolume GmbH
发明人： Ledentsov, Nikolai Nikolaevich
IPC分类号： H01L21/20 , H01L21/308
CPC分类号： C30B25/18 , B82Y10/00 , B82Y20/00 , H01L21/0237 , H01L21/02395 , H01L21/02439 , H01L21/02463 , H01L21/02507 , H01L21/02521 , H01L21/02546 , H01L21/3245 , H01L33/0062 , H01S5/22 , H01S5/3201 , H01S2301/173 , H01S2304/12 , Y10S438/902 , Y10S438/962
摘要： The method produces coherent dislocation-free regions from initially dislocated and/or defect-rich lattice mismatched layer grown on top of the substrate having a different lattice constant, which does not contain any processing steps before of after the lattice-mismatched layer growth. The process preferably uses in situ formation of a cap layer on top of a dislocated layer. The cap layer preferably has a lattice parameter close to that in the underlying substrate, and different from that in the lattice mismatched layer in no strain state. Under these conditions, the cap layer undergoes elastic repulsion from the regions in the vicinity of the dislocations, where the lattice parameter is the most different from that in the substrate. The cap layer is absent in these regions. When the cap layer has a lower thermal evaporation rate than the underlying lattice-mismatched layer, the regions of this lattice-mismatched layer containing dislocations are selectively evaporated at high enough temperatures, and only the coherent defect-free regions of the initially defect-rich lattice-mismatched layer remain on the substrate. In one embodiment of the invention, the defect-free regions are formed on the substrate with a size preferably tuned in the range of 30-1000 nm, depending on the annealing conditions, thickness of the cap layer, and the lattice mismatch. A device created by this method is also disclosed.
摘要翻译：该方法从在具有不同晶格常数的衬底上生长的初始位错和/或缺陷富集的晶格失配层产生无关位错无区域，其在晶格失配层生长之前不包含任何处理步骤。该方法优选使用在位错层顶部原位形成覆盖层。盖层优选具有接近于下层基板中的晶格参数，并且在无应变状态下与晶格失配层中的晶格参数不同。在这些条件下，帽层从位错附近的区域经历弹性排斥，其中晶格参数与衬底中的晶格参数最不同。这些区域中没有盖层。当盖层具有比下面的晶格失配层更低的热蒸发速率时，包含位错的晶格失配层的区域在足够高的温度下被选择性地蒸发，并且只有最初富含缺陷的相干缺陷区域晶格失配的层保留在衬底上。在本发明的一个实施例中，取决于退火条件，覆盖层的厚度和晶格失配，在衬底上形成无缺陷区域，其尺寸优选调整在30-1000nm的范围内。还公开了由该方法创建的设备。

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