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    • 4. 发明公开
    • AN INTERFACE LAMINA
    • 接口LAMINA
    • EP1573705A3
    • 2005-09-21
    • EP02737232.5
    • 2002-05-24
    • ITW Inc.
    • RODRIGUEZ, Ingemar, V.BISCHOFF, William, P.
    • H01J9/24H01J29/86H01J29/92
    • H01J29/86H01J9/241H01J29/90H01J29/92H01J2201/319H01J2329/0494H01J2329/8605H01J2329/90H01J2329/92
    • An emission layer 3 of an FED device has emitters which are caused to emit electrons or not according to whether or not a voltage on a gate 12, that is to say on a gate line 20 and thus at a gate aperture 121 surrounding the point 13 of the emitter generates an electric field at the point which is sufficiently high for electrons to be emitted from the point. For the voltages of the emitters and the gates of the pixel are controlled. Emitter lines 18 are arranged at the front face 19 of the substrate 4 parallel to one edge of the display and gate lines 20 are arranged at the front face 21 of the emission layer 3, orthogonal to the emitter lines. The front face is covered by an interface lamina 1011 forming part of the emission layer 130. The lamina 101 is a single thickness of fired photo imageable glass.
    • FED器件的发射层3具有根据栅极12上的电压,即栅极线20上的电压以及因此围绕点13的栅极孔径121处的电压而发射或不发射电子的发射体 的发射极在对于从该点发射的电子足够高的点处产生电场。 为了控制发射器的电压和像素的栅极。 发射极线18被布置在基板4的与显示器的一个边缘平行的正面19处,并且栅极线20被布置在正好与发射极线正交的发射层3的正面21处。 正面被形成发射层130的一部分的界面薄层1011覆盖。薄片101是单层厚度的经烧制的可光成像玻璃。
    • 5. 发明公开
    • AN INTERFACE LAMINA
    • 接口LAMINA
    • EP1573705A2
    • 2005-09-14
    • EP02737232.5
    • 2002-05-24
    • ITW Inc.
    • RODRIGUEZ, Ingemar, V.BISCHOFF, William, P.
    • G09G1/00
    • H01J29/86H01J9/241H01J29/90H01J29/92H01J2201/319H01J2329/0494H01J2329/8605H01J2329/90H01J2329/92
    • An emission layer 3 of an FED device has emitters which are caused to emit electrons or not according to whether or not a voltage on a gate 12, that is to say on a gate line 20 and thus at a gate aperture 121 surrounding the point 13 of the emitter generates an electric field at the point which is sufficiently high for electrons to be emitted from the point. For the voltages of the emitters and the gates of the pixel are controlled. Emitter lines 18 are arranged at the front face 19 of the substrate 4 parallel to one edge of the display and gate lines 20 are arranged at the front face 21 of the emission layer 3, orthogonal to the emitter lines. The front face is covered by an interface lamina 1011, 101 forming part of the emission layer 130. The lamina 1011, 101 is a single thickness of fired photo imageable glass.
    • FED器件的发射层3具有根据栅极12上的电压,即栅极线20上的电压以及因此围绕点13的栅极孔径121处的电压而发射或不发射电子的发射体 的发射极在对于从该点发射的电子足够高的点处产生电场。 为了控制发射器的电压和像素的栅极。 发射极线18被布置在基板4的与显示器的一个边缘平行的正面19处,并且栅极线20被布置在正好与发射极线正交的发射层3的正面21处。 正面被形成发射层130的一部分的界面薄片1011,101覆盖。薄片1011,101是单层厚度的烧制的可光成像玻璃。