专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

EP2685594B1 Planar inductive battery charger 有权
标题翻译：平面感应式电池充电器
公开(公告)号：EP2685594B1
公开(公告)日：2017-11-22
申请号：EP13175154.7
申请日：2003-06-10
申请人： City University of Hong Kong
发明人： HUI, Ron shu Yuen
IPC分类号： H02J7/02 , H01F38/14 , H01F17/00 , H01F27/36
CPC分类号： H01F17/0006 , H01F27/365 , H01F38/14 , H01F2017/008 , H02J7/025 , H02J50/10
摘要： There is provided a planar inductive battery charging system designed to enable electronic devices to be recharged. The system includes a planar charging module having a charging surface on which a device is placed. Within the charging module and parallel to the charging surface is at least one and preferably an array of primary windings that couple energy inductively to a secondary winding formed in the device. The invention also provides secondary modules that allow the system to be used with conventional electronic devices not formed with secondary windings.

2. 发明授权

EP1352403B1 INTEGRATED TRANSFORMER 有权
标题翻译：集成变压器
公开(公告)号：EP1352403B1
公开(公告)日：2015-06-10
申请号：EP02713443.6
申请日：2002-01-22
申请人： Intel Corporation
发明人： GARDNER, Donald, S.
IPC分类号： H01F27/28 , H01F1/04 , H01L23/64 , H01F17/00
CPC分类号： H01L28/10 , H01F17/0006 , H01F41/042 , H01F41/046 , H01F2017/0046 , H01F2017/008 , H01L23/522 , H01L23/5227 , H01L23/552 , H01L23/645 , H01L27/08 , H01L2924/0002 , H01L2924/00

3. 发明公开

EP2297751A2 PLANAR, MONOLITHICALLY INTEGRATED COIL 有权
标题翻译：平面单片集成COIL
公开(公告)号：EP2297751A2
公开(公告)日：2011-03-23
申请号：EP09772999.0
申请日：2009-06-30
申请人： NXP B.V.
发明人： ROOZEBOOM, Freddy , REEFMAN, Derk , KLOOTWIJK, Johan Hendrik , TIEMEIJER, Lukas Frederik , RUIGROK, Jaap
IPC分类号： H01F27/36
CPC分类号： H01F17/0006 , H01F27/365 , H01F2017/0066 , H01F2017/008
摘要： The present invention provides a means to integrate planar coils on silicon, while providing a high inductance. This high inductance is achieved through a special back- and front sided shielding of a material. Inmany applications, high-value inductors are a necessity. In particular, this holds for applications in power management. In these applications, the inductors are at least 5 of the order of 1 μH, and must have an equivalent series resistance of less than 0.1 Ω. For this reason, those inductors are always bulky components, of a typical size of 2 x 2 x 1 mm 3, which make a fully integrated solution impossible. On the other hand, integrated inductors, which can monolithically be integrated, do exist. However, these inductors suffer either from low inductance values, or 10 veryhigh DC resistance values.

4. 发明授权

EP0653838B1 LC element, semiconductor device, and LC element manufacturing method 失效转让
标题翻译： LC元件，半导体器件及其制造LC元件的方法
公开(公告)号：EP0653838B1
公开(公告)日：2000-08-09
申请号：EP94117428.6
申请日：1994-11-04
申请人： Ikeda, Takeshi , Okamura, Susumu
发明人： Ikeda, Takeshi , Okamura, Susumu
IPC分类号： H03H7/01
CPC分类号： H01L27/08 , H01F2017/008 , H03H7/0115 , H03H2001/0064 , H03H2001/0078 , Y10S438/901

5. 发明授权

EP2297751B1 PLANAR, MONOLITHICALLY INTEGRATED COIL 有权
标题翻译：平面单片集成COIL
公开(公告)号：EP2297751B1
公开(公告)日：2013-02-13
申请号：EP09772999.0
申请日：2009-06-30
申请人： NXP B.V.
发明人： ROOZEBOOM, Freddy , REEFMAN, Derk , KLOOTWIJK, Johan Hendrik , TIEMEIJER, Lukas Frederik , RUIGROK, Jaap
IPC分类号： H01F27/36
CPC分类号： H01F17/0006 , H01F27/365 , H01F2017/0066 , H01F2017/008

6. 发明授权

EP1383145B1 LAMINATED BALUN TRANSFORMER 有权
标题翻译： LAMINIERTERSYMMETRIEÜBERTRAGER
公开(公告)号：EP1383145B1
公开(公告)日：2012-02-15
申请号：EP02720473.4
申请日：2002-04-17
申请人： MURATA MANUFACTURING CO., LTD.
发明人： YAZAKI, Hirokazu, Intel. Prop. Gr. Murata Manufac. , TOUJO, Atsushi, Intel. Prop. Gr. MUrata Manufac.
IPC分类号： H01F19/06 , H01F17/00
CPC分类号： H01P5/10 , H01F17/0013 , H01F27/2804 , H01F2017/008 , H03H7/422
摘要： Line elements 24 and 27 are connected in series through a relay terminal 43, to constitute an unbalanced transmission line. Line elements 25 and 28 each constitute a balanced transmission lines. The strip lines 24 and 25 are electromagnetically coupled to constitute a coupler. Similarly, the line elements 27 and 28 are electromagnetically coupled to constitute a coupler. A ground terminal G1 is connected to the balanced transmission lines, which are constituted by the line elements 25 and 28. Meanwhile, A shield terminal G2 is connected to leading portions 30a to 32a of shield electrodes 30 to 32. These two terminals G1 and G2 are electrically independent of each other.

7. 发明公开

EP2273613A1 Magnetic shield layout, semiconductor device and application 审中-公开
标题翻译：布置einer magnetischen Abschirmung，Halbleiterbauelement和Anwendung
公开(公告)号：EP2273613A1
公开(公告)日：2011-01-12
申请号：EP09164749.5
申请日：2009-07-07
申请人： NXP B.V.
发明人： Nazarian, Alexé Levan , Tiemeijer, Lukas Frederik
IPC分类号： H01Q1/52 , H01F17/00 , H01F27/36
CPC分类号： H01F17/0006 , H01F27/289 , H01F27/367 , H01F2017/008 , H01Q1/525 , H01Q7/00 , H03B5/1296
摘要： Magnetic shield layout (10,10A-10G) arranged for an integrated circuit of a semiconductor device comprising a first inductor (1) having a first inductor-area (11), and a second inductor (2) having a second inductor-area (12), wherein the inductor-areas (11,12) are located in an inductor-plane (P) and wherein the first and second inductors (1,2) in operation are subject to an induction coupling; a magnetic shield (20) for reducing the induction coupling, said magnetic shield having a conductive path (21) marking a first shield-area (13) assigned to the first inductor-area (11) and a second shield-area (14) assigned to the second inductor-area (12); wherein the shield-areas (13,14) are conductively and continuously connected by the conductive path (21) such that in operation a magnetic field generated by the first inductor (1) is largely cancelled by the magnetic field of the second shield-area (12) and/or a magnetic field generated by the second inductor (2) is largely cancelled by the magnetic field of the first shield-area (11).
摘要翻译：布置用于半导体器件的集成电路的磁屏蔽布局（10,10A-10G）包括具有第一电感器区域（11）的第一电感器（1）和具有第二电感器区域（11）的第二电感器（2） 12），其中电感器区域（11,12）位于电感器平面（P）中，并且其中操作中的第一和第二电感器（1,2）经受感应耦合; 用于减小感应耦合的磁屏蔽（20），所述磁屏蔽具有标记分配给第一电感器区域（11）的第一屏蔽区域（13）的导电路径（21）和第二屏蔽区域（14）分配给第二电感器区域（12）; 其中所述屏蔽区域（13,14）由所述导电路径（21）导电连续地连接，使得在操作中由所述第一电感器（1）产生的磁场被所述第二屏蔽区域的磁场大大抵消（12）的磁场和/或由第二电感器（2）产生的磁场被第一屏蔽区域（11）的磁场大大抵消。

8. 发明公开

EP2272092A2 INDUCTOR WITH PATTERNED GROUND PLANE 有权
标题翻译：结构化土地面积电感
公开(公告)号：EP2272092A2
公开(公告)日：2011-01-12
申请号：EP09728811.2
申请日：2009-04-03
申请人： QUALCOMM Incorporated
发明人： JIN, Zhang
IPC分类号： H01L23/522
CPC分类号： H01L23/5227 , H01F17/0006 , H01F2017/008 , H01L23/5225 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： An inductor with patterned ground plane is described. In one design, the inductor includes a conductor formed on a first layer and a patterned ground plane formed on a second layer under the conductor. The patterned ground plane has an open center area and a shape matching the shape of the conductor. The patterned ground plane includes multiple shields, e.g., eight shields for eight sides of an octagonal shape conductor. Each shield has multiple slots formed perpendicular to the conductor. Partitioning the patterned ground plane into separate shields and forming slots on each shield help prevent the flow of eddy current on the patterned ground plane, which may improve the Q of the inductor. Multiple interconnects couple the multiple shields to circuit ground, which may be located at the center of the conductor.

9. 发明公开

EP1655746A3 Integrated spiral inductor including a shielding layer 审中-公开
标题翻译：集成螺旋电感器有屏蔽层
公开(公告)号：EP1655746A3
公开(公告)日：2009-07-22
申请号：EP05023414.5
申请日：2005-10-26
申请人： NEC Electronics Corporation
发明人： Sakamoto, Takehiko
IPC分类号： H01F17/00 , H01L21/02 , H01L27/08 , H01L23/64
CPC分类号： H01L23/5227 , H01F2017/008 , H01L27/08 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides an improved manufacturing stability of a semiconductor device provided with a spiral inductor. The semiconductor device 100 includes a silicon substrate 101, an element isolating oxide film embedded within the silicon substrate 101, a first insulating interlayer provided on the silicon substrate 101, a spiral inductor 120 provided on the first insulating interlayer, and a shielding layer, which is provided between the spiral inductor 120 and the silicon substrate 101, and elongates toward a direction along the surface of the substrate to provide a shield between the spiral inductor 120 and the silicon substrate 101. Then, a plurality of substrate remaining regions 131 formed by the silicon substrate 101 partially remaining in the element isolating oxide film in a form of islands from the upper viewpoint are selectively provided right under the polysilicon 105 in the region for forming the spiral inductor 120.

10. 发明公开

EP1652199A2 INDUCTIVE AND CAPACITIVE ELEMENTS FOR SEMICONDUCTOR TECHNOLOGIES WITH MINIMUM PATTERN DENSITY REQUIREMENTS 审中-公开
标题翻译：半导体工艺电感和电容元件具有最小结构密度的要求
公开(公告)号：EP1652199A2
公开(公告)日：2006-05-03
申请号：EP04744591.1
申请日：2004-07-15
申请人： Koninklijke Philips Electronics N.V.
发明人： DETCHEVERRY, Celine, J. , VAN NOORT, Wibo, D.
IPC分类号： H01F17/00
CPC分类号： H01L23/5222 , H01F2017/008 , H01L23/5227 , H01L27/08 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides a semiconductor device (10) comprising a plurality of layers, the semiconductor device comprising: - a substrate (20) having a first major surface, - an inductive element (11) fabricated on the first major surface of the substrate, the inductive element comprising at least one conductive line, and - a plurality of tilling structures in at least one layer, wherein the plurality of tilling structures are electrically connected together and are arranged in a geometrical pattern (14) so as to substantially inhibit an inducement of an image current in the tilling structures by a current in the inductive element. It is an advantage of the above semiconductor device that, by using such tilling structures, an inductive element with improved quality factor is obtained. The present invention also provides a method for providing an inductive element in a semiconductor device comprising a plurality of layers.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式