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1. 发明公开

EP2535931A3 Integrated circuit inductors with intertwined conductors 审中-公开
标题翻译：电感与隔行导体集成
公开(公告)号：EP2535931A3
公开(公告)日：2013-08-28
申请号：EP12172130.2
申请日：2012-06-15
申请人： Altera Corporation
发明人： Chen, Shuxian , Watt, Jeffrey T.
IPC分类号： H01L23/522 , H01L49/02 , H01F17/00
CPC分类号： H01L28/10 , H01F17/0013 , H01F2017/0046 , H01F2017/0073 , H01L23/5227 , H01L2924/0002 , H01L2924/00
摘要： An inductor may be formed from a conductive path that includes intertwined conductive lines. There may be two, three, or more than three intertwined conductive lines in the conductive path. The conductive lines may be formed from conductive structures in the dielectric stack of an integrated circuit. The dielectric stack may include metal layers that include conductive traces and may include via layers that include vias for interconnecting the traces.
The intertwined conductive lines may be formed from the conductive structures in the metal and via layers. In crossover regions, the conductive lines may cross each other without electrically connecting to each other. Vias may be used to couple multiple layers of traces together to reduce line resistance.

2. 发明授权

EP1234314B1 INDUCTOR ON INTEGRATED CIRCUIT AND METHODS FOR MANUFACTURE 有权
标题翻译：电感集成电路和方法
公开(公告)号：EP1234314B1
公开(公告)日：2011-01-12
申请号：EP00982186.9
申请日：2000-11-21
申请人： Intel Corporation
发明人： GARDNER, Donald
IPC分类号： H01F17/00 , H01F41/04 , H01L23/64
CPC分类号： H01L28/10 , H01F17/0006 , H01F41/042 , H01F41/046 , H01F2017/0046 , H01L23/522 , H01L23/5227 , H01L23/552 , H01L23/645 , H01L27/08 , H01L2924/0002 , H01L2924/09701 , H01L2924/00
摘要： An inductor (1) for an integrated circuit or integrated circuit package comprises a three-dimensional structure. In one embodiment the inductor is arranged on an integrated circuit substrate in at least two rows (2, 3), each row comprising upper segments (32) and lower segments (34), with the upper segments being longer than the lower segments. The upper segments in a first row are offset 180 degrees from those in an adjoining row to provide greater coupling of magnetic flux. The materials and geometry are optimized to provide a low resistance inductor for use in high performance integrated circuits. In another embodiment the inductor is arranged on an integrated circuit package substrate. Also described are methods of fabricating the inductor on an integrated circuit or as part of an integrated circuit package.

3. 发明公开

EP2037465A1 Double LC-tank structure 审中-公开
标题翻译： Doppel-LC-Tankkonstruktion
公开(公告)号：EP2037465A1
公开(公告)日：2009-03-18
申请号：EP07116601.1
申请日：2007-09-17
申请人： Seiko Epson Corporation
发明人： Gil Galí, Ignacio c/o EPSON EUROPE ELECTRONICS GmbH , Cairo Molins, Josep Ignasi c/o EPSON EUROPE ELECTRONICS GmbH , Sieiro Córdoba, Javier José c/o Departament d'Electrònica , Argemí Ribera, Oriol c/o Departament d'Electrònica
IPC分类号： H01F17/00 , H03F1/56 , H03H7/00 , H01L23/522 , H01F27/40
CPC分类号： H01F17/0006 , H01F27/40 , H01F2017/0046 , H01F2017/0073 , H01F2017/0086 , H01L23/5227 , H01L2924/0002 , H03H7/0115 , H03H2001/0064 , H01L2924/00
摘要： The present invention refers to an integrated LC-tank structure with improved Radio-Frequency (RF) choke function and optimized geometry, which minimize area consumption and maximize quality factor. The LC-tank is based on a differential transformer and two capacitors connected in parallel with the windings of the transformer. The windings of the transformer are formed by two interlaced multi-turn spiral coils obtained in a semiconductor substrate.
摘要翻译：本发明涉及一种具有改进的射频（RF）扼流功能和优化的几何形状的集成LC槽结构，其最小化面积消耗并最大化品质因数。 LC-Tank基于差动变压器和两个与变压器绕组并联的电容器。变压器的绕组由在半导体衬底中获得的两个隔行的多匝螺旋线圈形成。

4. 发明公开

EP1969616A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：EP1969616A1
公开(公告)日：2008-09-17
申请号：EP06835133.7
申请日：2006-12-18
申请人： CASIO COMPUTER CO., LTD.
发明人： AOKI, Yutaka
IPC分类号： H01L21/02
CPC分类号： H01F17/0006 , H01F2017/0046 , H01F2017/0073 , H01L23/5227 , H01L27/016 , H01L28/10 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a semiconductor substrate, an insulating film formed on the semiconductor substrate, and a thin film inductor element which is formed on the insulating film, and which includes first and second terminals and a conductive layer formed into a spiral shape between the first and second terminals so as to have a plurality of turns and at least one intersection. The conductive layer includes (i) a first conductor layer formed on the semiconductor substrate, and (ii) a second conductor layer which is formed on the insulating film, intersects the first conductor layer via the insulating film at the intersection. The thin film inductor element has an arrangement in which the first and second conductor layers are symmetrically arranged in directions from an intermediate point between the first and second terminals along the longitudinal direction of the conductive layer to the first and second terminals.
摘要翻译：一种半导体器件，包括：半导体衬底;形成在所述半导体衬底上的绝缘膜;以及形成在所述绝缘膜上的薄膜电感器元件，所述薄膜电感器元件包括第一端子和第二端子以及形成为螺旋形状的导电层，和第二端子，以便具有多匝和至少一个交点。导电层包括：（i）在半导体基板上形成的第一导体层;以及（ii）在绝缘膜上形成的第二导体层，在交叉部隔着绝缘膜与第一导体层相交。薄膜电感器元件具有这样的布置，其中第一和第二导体层沿从导电层的纵向方向的第一和第二端子之间的中间点到第一和第二端子的方向对称地布置。

5. 发明授权

EP1195780B1 INDUCTOR ELEMENT 有权
标题翻译：感应器
公开(公告)号：EP1195780B1
公开(公告)日：2008-08-06
申请号：EP99919629.8
申请日：1999-05-18
申请人： Niigata Seimitsu Co., Ltd. , Ricoh Company, Ltd.
发明人： OKAMOTO, Akira , IKEDA, Takeshi
IPC分类号： H01F17/00
CPC分类号： H01L27/08 , H01F17/0013 , H01F27/34 , H01F2017/0046 , H01F2017/008

6. 发明公开

EP1938377A1 MONOLITHISCH INTEGRIERBARE SCHALTUNGSANORDNUNG 审中-公开
标题翻译：单片集成电路
公开(公告)号：EP1938377A1
公开(公告)日：2008-07-02
申请号：EP06806279.3
申请日：2006-10-14
申请人： ATMEL Duisburg GmbH
发明人： EL RAI, Samir , TEMPEL, Ralf
IPC分类号： H01L27/08 , H01L23/522 , H01L27/06
CPC分类号： H01L23/5227 , H01F27/40 , H01F2017/0046 , H01L23/5223 , H01L23/5225 , H01L27/0611 , H01L27/08 , H01L2924/0002 , H01L2924/00
摘要： The invention relates to a monolithically integrable circuit arrangement (100) comprising a first circuit component formed as a differentially fed coil and having at least one conductor loop (110a, 110b) reaching around an inner region (115) and comprising at least one further circuit component (120, 121). According to the invention, the further circuit component (120, 121) of the circuit arrangement (100) is arranged in the inner region (115).

7. 发明公开

EP1553700A3 Surface acoustic wave device 有权转让
公开(公告)号：EP1553700A3
公开(公告)日：2007-03-28
申请号：EP05250051.9
申请日：2005-01-07
申请人： Fujitsu Media Devices Limited
发明人： Taniguchi, Noriaki, Fujitsu Media Devices Ltd. , Furukawa, Osamu, Fujitsu Media Devices Ltd. , Murata, Toshihiko, Fujitsu Media Devices Ltd. , Kawachi, Osamu, Fujitsu Media Devices Ltd.
IPC分类号： H03H9/72 , H01L21/02 , H01L23/64
CPC分类号： H01F17/0006 , H01F5/003 , H01F27/29 , H01F2017/0046 , H01L23/5227 , H01L2924/0002 , H03H9/0576 , H03H9/725 , H03H2001/0078 , H01L2924/00
摘要： The present invention permits further miniaturization and shortening of a surface acoustic wave device while avoiding the influence of the surface acoustic wave device on the inductance value and performance index (Q value) of a spiral inductor provided on a chip of the device. In one embodiment, the chip (8) on which the spiral inductor (2) is formed is flip-chip mounted in a package (9) together with a surface acoustic wave device chip in a region (15, 16). The package (9) is provided with a hermetically sealed lid (91). A conductor pattern (9a, 9b) is formed on a face of the package that opposes the spiral inductor (2). Further, the overlap between the region of the spiral inductor and the conductor pattern is 7% or less.

8. 发明公开

EP1761938A1 PLANAR INDUCTOR 审中-公开
标题翻译： PLANARSPULE
公开(公告)号：EP1761938A1
公开(公告)日：2007-03-14
申请号：EP05751618.9
申请日：2005-06-17
申请人： Koninklijke Philips Electronics N.V.
发明人： TIEMEIJER, Lukas, F.
IPC分类号： H01F21/12 , H01F17/00
CPC分类号： H01F21/12 , H01F17/0006 , H01F2017/0046 , H01F2017/0053 , H01F2021/125
摘要： A planar inductor (50) comprises a conductive path in the form of a spiral pattern (53A-53D, 54A-54D). A conductive connecting path (62A, 63) connects a terminal (60) to an intermediate tap point (61A). The connecting path comprises at least one path portion which is radially directed with respect to the spiral pattern (53A-53D). The connecting path (62A, 63) can be routed via the inside of the spiral pattern. Where the connecting path comprises only radially-directed path portions, they are commonly joined at the centre (64) of the spiral pattern. Multiple path portions (62A, 62B) can each connect to the intermediate tap point of a respective conductive path. The connecting path can use a further conductive track (85) which is parallel to the conductive path which forms the spiral pattern.

9. 发明授权

EP1456859B1 INDUKTIVES BAUTEIL 有权
标题翻译：电感元件
公开(公告)号：EP1456859B1
公开(公告)日：2006-03-15
申请号：EP02799023.3
申请日：2002-12-05
申请人： Infineon Technologies AG
发明人： TIEBOUT, Marc
IPC分类号： H01F17/00 , H01F21/12 , H01L23/64 , H01L27/08
CPC分类号： H01L27/08 , H01F17/0006 , H01F21/12 , H01F27/40 , H01F2017/0046 , H01F2021/125 , H01L23/5227 , H01L23/66 , H01L2924/0002 , H01L2924/00
摘要： An inductive component comprises exactly one coil (100), having a total inductance, with two tap contacts (110) on the coil (100) and a control circuit (111). The effective inductance of the coil (100) can be adjusted by means of the control circuit (111).

10. 发明公开

EP1480234A2 Integrated circuit inductor with integrated vias 审中-公开
标题翻译：产品说明书
公开(公告)号：EP1480234A2
公开(公告)日：2004-11-24
申请号：EP04102243.5
申请日：2004-05-21
申请人： Texas Instruments Incorporated
发明人： Pitts, Robert L. , Baldwin, Greg C.
IPC分类号： H01F17/00 , H01F41/04
CPC分类号： H01L28/10 , H01F17/0013 , H01F2017/0046 , H01L23/5227 , H01L27/08 , H01L2924/0002 , H01L2924/00
摘要： Integrated circuit inductors (5) are formed by interconnecting various metal layers (10) in an integrated circuit with continuous vias (200). Using continuous vias (200) improves the Q factor over existing methods for high frequency applications. The contiguous length of the continuous vias should be greater than three percent of the length of the inductor (5).
摘要翻译：集成电路电感器（5）通过将具有连续通孔（200）的集成电路中的各种金属层（10）互连而形成。使用连续通孔（200）可以提高Q系数高于现有的高频应用方法。连续通孔的连续长度应大于电感器（5）的长度的三分之一。

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