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1. 发明公开

EP3370146A1 ANALOG TO DIGITAL CONVERSION YIELDING EXPONENTIAL RESULTS 有权转让
公开(公告)号：EP3370146A1
公开(公告)日：2018-09-05
申请号：EP17000566.4
申请日：2017-04-04
申请人： Linear Technology Corporation
发明人： Cowan, Joshua
IPC分类号： G06F7/556 , H03M1/58 , H03K7/08 , H05B33/08
CPC分类号： H03M1/1235 , G06F7/556 , H03K7/08 , H03M1/58 , H05B33/0845
摘要： A method and system of an analog to digital conversion having an exponential result are provided. An analog input signal is received by the ramp ADC. The analog input signal is converted into an N-bit digital signal having a linear relationship with the analog input signal. An internal gated clock signal is generated based on the received first clock signal. The gated clock signal is used as an input to an M-bit register. An output of the M-bit register is multiplied by a predetermined factor. The product of the multiplication is provided as an input to the M-bit register. The output of the M-bit register provides an M-bit output having an exponential relationship with the analog input signal.

2. 发明公开

EP3358460A1 SYSTEMS AND METHODS FOR COMPUTING MATHEMATICAL FUNCTIONS 有权
公开(公告)号：EP3358460A1
公开(公告)日：2018-08-08
申请号：EP18154099.8
申请日：2018-01-30
申请人： Vivante Corporation
发明人： Zhong, Lefan , Cao, Zhiwei
IPC分类号： G06F7/556
CPC分类号： G06F7/556
摘要： Mathematical functions are computed in a single pipeline performing a polynomial approximation (e.g. a quadratic approximation, or the like) using data tables. The single pipeline is operable for computing at least one of RCP, SQRT, EXP or LOG functions according to the one or more opcodes. SIN and COS are also computed using the pipeline according to the approximation ((-1)^IntX)*Sin(π*Min(FracX, 1.0 - FracX)/Min(FracX, 1.0 - FracX). A pipeline portion approximates Sin(π*FracX) using tables and interpolation and a subsequent stage multiplies this approximation by FracX. For input arguments of x close 1.0. LOG2(x-1)/(x-1) is computed using a first pipeline portion using tables and interpolation and subsequently multiplied by (x-1). A DIV operation may also be performed with input arguments scaled up to avoid underflow as needed. An approach for computing X^Y is also disclosed.

3. 发明公开

EP3144805A1 METHOD AND PROCESSING APPARATUS FOR PERFORMING ARITHMETIC OPERATION 有权
标题翻译： VERFAHREN UND VERARBEITUNGSVORRICHTUNG ZUR DURCHFHHRUNG ARITHMETISCHER OPERATIONEN
公开(公告)号：EP3144805A1
公开(公告)日：2017-03-22
申请号：EP16166074.1
申请日：2016-04-19
申请人： Samsung Electronics Co., Ltd.
发明人： YU, Hyeongseok
IPC分类号： G06F7/544
CPC分类号： G06F7/548 , G06F7/544 , G06F7/552 , G06F7/556
摘要： A method of performing an arithmetic operation by a processing apparatus includes determining a polynomial expression approximating an arithmetic operation to be performed on a variable; adaptively determining upper bits for addressing a look-up table (LUT) according to a variable section to which the variable belongs; obtaining coefficients of the polynomial expression from the LUT by addressing the LUT using a value of the upper bits; and performing the arithmetic operation by calculating a result value of the polynomial expression using the coefficients.
摘要翻译：一种通过处理装置执行算术运算的方法包括：确定逼近要对变量执行的算术运算的多项式; 根据变量所属的可变部分自适应地确定用于寻址查找表（LUT）的高位; 通过使用高位的值寻址LUT来从LUT获得多项式表达式的系数; 以及通过使用这些系数计算多项式表达式的结果值来执行算术运算。

4. 发明公开

EP1350161A1 DISPOSITIF DESTINE A REALISER DES CALCULS D'EXPONENTIATION, ET PROCEDE DE PROGRAMMATION ET D'UTILISATION DU DISPOSITIF 审中-公开
标题翻译：装置于执行指数计算和方法进行编程和使用本
公开(公告)号：EP1350161A1
公开(公告)日：2003-10-08
申请号：EP01995782.8
申请日：2001-12-21
申请人： GEMPLUS
发明人： JOYE, Marc , CLAVIER, Christophe
IPC分类号： G06F7/72 , G06F7/556
CPC分类号： G06F7/723 , G06F7/556 , G06F2207/5561
摘要： The invention concerns an exponentiation calculating device, and a method for programming and using same, for use in particular in the field of cryptology wherein cryptographic algorithms are used in electronic devices such as smart cards. It uses calculating means (2) configured to produce the exponentiation calculations from a addition-subtraction chain C(e) worked out for the exponent e, said addition-subtraction chain being stored in a storage area (6) recordable after its production. Thus, the algorithm can effectively be established from components of the addition-subtraction chain, by post-production programming, without modifying the exponentiation calculating part which can be quenched in a mask read-only-memory, thereby reducing the risks of having to carry out remasking.

5. 发明公开

EP1001334A3 Logarithm / antilog calculator 有权
标题翻译：对数/反对数计算器
公开(公告)号：EP1001334A3
公开(公告)日：2002-11-27
申请号：EP99203820.8
申请日：1999-11-16
申请人： Texas Instruments Incorporated
发明人： Allred, Rustin W.
IPC分类号： G06F7/556
CPC分类号： G06F7/556
摘要： A digital signal system (100) for determining an approximate logarithm of a value of x having a base b . The approximate logarithm includes an integer portion ( i ) and a decimal portion ( f ). The system comprises an input (12) for receiving a signal, and circuitry (18) for measuring an attribute of the signal. The attribute relates at least in part the value of x . The system further comprises circuitry (104) for identifying a bounded region within which x falls. The bounded region is one of a plurality of bounded regions, where each of the plurality of bounded regions corresponds to a different value of an integer n and is bounded on a lower side by b n and on a higher side by b n +1 . Additionally, the identified bounded region identifies the integer portion of the approximate logarithm. The system further comprises circuitry (106, 108) for determining the decimal portion of the approximate logarithm by mapping a portion of x to a point along a curve representing an approximation of a portion of an actual logarithm value of x .
摘要翻译：一种数字信号系统（100），用于确定具有基数b的x值的近似对数。近似对数包括整数部分（i）和小数部分（f）。该系统包括用于接收信号的输入端（12）和用于测量信号的属性的电路（18）。该属性至少部分涉及x的值。该系统还包括用于识别x落入其中的有界区域的电路（104）。有界区域是多个有界区域中的一个，其中多个有界区域中的每一个对应于整数n的不同值并且在较低侧通过bn和在较高侧通过bn + 1界定。另外，识别的有界区域标识近似对数的整数部分。该系统还包括用于通过将x的一部分映射到表示x的实际对数值的一部分的近似的曲线上的点来确定近似对数的小数部分的电路（106,108）。

6. 发明公开

EP1032892A2 METHODS APPARATUS AND COMPUTER PROGRAM PRODUCTS FOR ACCUMULATING LOGARITHMIC VALUES 有权
标题翻译：方法，设备和计算机程序产品积累BY对数值
公开(公告)号：EP1032892A2
公开(公告)日：2000-09-06
申请号：EP98948477.9
申请日：1998-09-23
申请人： ERICSSON INC.
发明人： DENT, Paul, Wilkinson
IPC分类号： G06F17/10
CPC分类号： G06F7/556 , G06F7/49
摘要： The sum of a plurality of logarithmic numbers is determined by expressing the logarithmic numbers as one of a predetermined values. For example, the numbers may be analog values which may be sampled by an 8-bit AtoD converter to be expressed as one of a possible 256 values. The number of occurrences for each of the values is accumulated in bins (counters) and the sum is determined by a summation of the logarithmic numbers based on processing of the counts rather than the logarithmic numbers themselves. Bin counts are reduced iteratively by replacing counts greater than 1 by incrementing the count of a proportionately higher value bin until only counts of 1 or zero remain. These counts are then combined to provide only a single counter with a non-zero count value which indicates the accumulated signal strength of the signal strength measurements. The invention may further be provided using single bit memory elements and byte processing with look-up tables. In a further aspect of the present invention enhanced precision signed logarithmic magnitude expressions of numbers are combined utilizing Zech logarithmic values applied iteratively to a most significant and least significant component of the difference in the logmagnitude of the numbers to be combined.

7. 发明公开

EP0807287A4 LOGARITHM/INVERSE-LOGARITHM CONVERTER UTILIZING A TRUNCATED TAYLOR SERIES AND METHOD OF USE THEREOF 失效
标题翻译：对数/对数INVERTED变换器USING A CUT泰勒级数及其使用方法FOR该转换器
公开(公告)号：EP0807287A4
公开(公告)日：1999-09-01
申请号：EP96902095
申请日：1996-01-03
申请人： MOTOROLA INC
发明人： DWORKIN JAMES DOUGLAS , BUSS JOHN MICHAEL
IPC分类号： G06F1/03 , G06F7/556 , H03M7/50 , G06F7/00 , G06F7/38 , G06F15/00 , G06G7/24 , G06G7/26
CPC分类号： G06F7/556 , G06F1/0307 , H03M7/50
摘要： A converter which may be used for implementing either logarithmic or inverse-logarithmic functions is disclosed. The converter includes a memory (22), two multipliers (28 and 30), and two adders (32 and 34). The memory (22) stores a plurality of coefficients which are based on a second-order Taylor polynomial used to estimate a logarithmic or inverse-logarithmic function over a domain of input values. A method of using the converter is also disclosed.

8. 发明公开

EP0849664A2 Apparatus for computing transcendental functions quickly 失效
标题翻译： Gerätzur schneller Berechnung von tranzedentale Funktionen
公开(公告)号：EP0849664A2
公开(公告)日：1998-06-24
申请号：EP97310118.1
申请日：1997-12-15
申请人： Metaflow Technologies, Inc.
发明人： Rarick, Leonard D.
IPC分类号： G06F7/548 , G06F7/556
CPC分类号： G06F7/556 , G06F7/548
摘要： The invention provides a method and system for computing transcendental functions quickly: (1) the multiply ALU is enhanced to add a term to the product, (2) rounding operations for intermediate multiplies are skipped, and (3) the Taylor series is separated into two partial series which are performed in parallel. Transcendental functions with ten terms (e.g., SIN or COS), are thus performed in about ten clock times.
摘要翻译：本发明提供了一种用于快速计算超越函数的方法和系统：（1）增加乘法ALU以向产品添加项，（2）跳过中间乘数的舍入运算，（3）泰勒级数分为并行执行两个部分系列。因此，在十个时钟内执行具有十个术语（例如，SIN或COS）的超验功能。

9. 发明公开

EP4409393A1 SYSTEMS AND METHODS FOR ACCELERATING THE COMPUTATION OF THE EXPONENTIAL FUNCTION 审中-实审
公开(公告)号：EP4409393A1
公开(公告)日：2024-08-07
申请号：EP22761744.6
申请日：2022-08-03
申请人： Microsoft Technology Licensing, LLC
发明人： XI, Jinwen , ZHAO, Ritchie , LIU, Ming Gang , CHUNG, Eric S.
IPC分类号： G06F7/556 , G06F7/483
CPC分类号： G06F7/556 , G06F7/483

10. 发明授权

EP3118737B1 ARITHMETIC PROCESSING DEVICE AND METHOD OF CONTROLLING ARITHMETIC PROCESSING DEVICE 有权
标题翻译：算术处理设备和控制算术处理设备的方法
公开(公告)号：EP3118737B1
公开(公告)日：2017-12-13
申请号：EP16179328.6
申请日：2016-07-13
申请人： Fujitsu Limited
发明人： HONDO, Mikio
IPC分类号： G06F7/556
CPC分类号： G06F7/4833 , G06F7/556 , G06F2207/483
摘要： An arithmetic processing device includes: a first memory configured to store values of a first coefficient of a logarithmic function, where the logarithmic function is decomposed into a series operation term and the coefficient term, depending on respective values of a first bit group included in operand data of a first instruction to calculate the value of the first coefficient; a second memory configured to store values of a second coefficient included in the series operation term depending on the respective values of the first bit group included in operand data of a second instruction to calculate the value of the second coefficient; and a selector configured to select the value of the first coefficient read from the first memory based on the execution of the first instruction and select the value of the second coefficient read from the second memory based on the execution of the second instruction.

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