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1. 发明公开

EP4433896A1 USING CHIPLET-LEVEL PERFORMANCE INFORMATION FOR CONFIGURING CHIPLETS IN A PROCESSOR 审中-实审
公开(公告)号：EP4433896A1
公开(公告)日：2024-09-25
申请号：EP22893464.2
申请日：2022-10-26
申请人： Advanced Micro Devices, Inc.
发明人： GANAPATHY, Shrikanth , ECKERT, Yasuko , GUTIERREZ, Anthony , SANGAIAH, Karthik Ramu , BHARADWAJ, Vedula Venkata Srikant
IPC分类号： G06F9/50
CPC分类号： Y02D10/00 , G06F11/3051 , G06F11/3024 , G06F11/3006 , G06F11/3409 , G06F11/3466 , G06F15/7807

2. 发明授权

EP4016303B1 METHODS AND APPARATUS TO MONITOR TELEMETRY DATA ASSOCIATED WITH COMPUTING DEVICES 有权
公开(公告)号：EP4016303B1
公开(公告)日：2024-07-10
申请号：EP21198385.3
申请日：2021-09-22
IPC分类号： G06F11/07 , G06F11/30 , G06F11/34 , H04L41/0631 , H04L43/065 , H04L43/0817 , H04L43/50
CPC分类号： H04L43/065 , H04L43/0817 , H04L43/50 , H04L41/0631 , G06F11/3072 , G06F11/3065 , G06F11/0766 , G06F11/3003 , G06F11/3024 , G06F11/3495 , G06F11/3409 , G06F11/3058 , G06F2201/8120130101 , G06F11/0751 , G06F11/079

3. 发明公开

EP3234764A4 INSTRUMENTATION OF GRAPHICS INSTRUCTIONS 有权
公开(公告)号：EP3234764A4
公开(公告)日：2018-05-30
申请号：EP14908126
申请日：2014-12-15
申请人： INTEL CORP
发明人： WANG ZHI , DONG YAO ZU
IPC分类号： G06F11/36 , G06F11/30 , G06F11/34
CPC分类号： G06T1/20 , G06F7/00 , G06F11/3024 , G06F11/3419 , G06F11/3636 , G06F11/3644 , G06T1/60
摘要： Embodiments of graphics instruction instrumentor (“GII”) and a graphics profiler (“GP”) are described. The GII may facilitate profiling of execution of graphics instructions by one or more graphics processors. The GII may identify target graphics instructions for which execution profile information is desired. The GII may store instrumentation graphics instructions in a graphics instruction buffer. The instrumentation graphics instructions may facilitate the GP in collecting graphics profile information. For example, timestamp-storage instructions may be store timestamps before and after execution of the target graphics instructions. The GII also may store an interrupt-generation instruction to cause an interrupt to be sent to the GP so that the GP may begin collection of graphics profile data. The GII may store an event-wait instruction to pause the graphics processors until an event is received. Other embodiments may be described and claimed.

4. 发明公开

EP3321839A1 METHOD AND DETECTION CIRCUIT FOR DETECTING SECURITY CHIP OPERATING STATE 审中-公开
标题翻译：检测安全芯片运行状态的方法和检测电路
公开(公告)号：EP3321839A1
公开(公告)日：2018-05-16
申请号：EP17201774.1
申请日：2017-11-15
申请人： HUAWEI TECHNOLOGIES CO., LTD.
发明人： WANG, Haofeng , LU, Jiayin , MA, Chongliang
IPC分类号： G06F21/75
CPC分类号： G06F21/57 , G06F1/06 , G06F11/3024 , G06F11/3058 , G06F11/348 , G06F11/3495 , G06F21/72 , G06F21/75 , G06F2221/034
摘要： Embodiments of the present invention provide a method and a detection circuit for detecting a security chip operating state, and relate to the field of information security technologies, so as to resolve a prior-art problem that an analog circuit is more easily identified from a security chip layout as an area of the analog circuit increases and an attack risk is relatively high. The detection circuit includes: a first register unit, a triggering unit, a delay unit, a routing unit, and a second register unit, where the second register unit is connected to the triggering unit. A first signal is delayed in the delay unit, to obtain a second signal, a third signal is obtained according to the second signal, and logical operation is performed on the first signal and the third signal, to output a level signal to trigger an alarm unit. Because each unit may be implemented by using a digital circuit, a size of the circuit can be reduced, so that it is difficult to identify the circuit from the security chip layout, and reliability of a security chip is improved.
摘要翻译：本发明实施例提供了一种检测安全芯片工作状态的方法和检测电路，涉及信息安全技术领域，以解决现有技术中模拟电路更易于从安全性作为模拟电路的区域的芯片布局增加并且攻击风险相对较高。检测电路包括：第一寄存器单元，触发单元，延迟单元，路由单元和第二寄存器单元，其中第二寄存器单元连接到触发单元。第一信号在延迟单元中被延迟，以获得第二信号，根据第二信号获得第三信号，并且对第一信号和第三信号执行逻辑运算，以输出电平信号以触发警报单元。由于每个单元都可以通过数字电路来实现，因此可以减小电路的尺寸，使得难以从安全芯片布局中识别电路，并且提高了安全芯片的可靠性。

5. 发明公开

EP3226140A3 DATA PROCESSING METHOD, DATA PROCESSING DEVICE, TERMINAL AND SMART DEVICE 审中-公开
标题翻译：数据处理方法，数据处理设备，终端和智能设备
公开(公告)号：EP3226140A3
公开(公告)日：2017-10-25
申请号：EP17161846.5
申请日：2017-03-20
申请人： Beijing Xiaomi Mobile Software Co., Ltd.
发明人： SUN, Qimin , HOU, Enxing , MENG, Deguo
IPC分类号： G06F11/36 , H04L12/26
CPC分类号： G06F11/3656 , G06F11/3006 , G06F11/3024 , G06F11/3048 , G06F11/321 , G06F11/3636 , H04L43/18 , H04L69/22 , H04W84/12
摘要： The present invention relates to a data processing method, a data processing device, a terminal and a smart device. The data processing method includes: acquiring (S101) data packets transmitted between a first microcontroller unit (MCU) and a second MCU of a smart device and carried with respective serial numbers, the second MCU being provided in a Wireless Fidelity (Wi-Fi) module of the smart device; and processing and displaying (S102) the data packets based on the respective serial numbers so as to debug the second MCU. By applying the embodiments of the present invention, the terminal may acquire data packets carried with respective serial numbers, and process and display the data packets carried with the respective serial numbers, so as to perform debugging. In the embodiments of the present invention, the terminal is enabled to conveniently and directly determine data receiving and sending sequences based on the respective serial numbers, in this way, it is convenient to debug the second MCU, and discover problems existing in data transmission timely, and also facilitate the user's operations.
摘要翻译：数据处理方法，数据处理设备，终端和智能设备。该数据处理方法包括：获取（S101）在智能设备的第一微控制器单元（MCU）和第二MCU之间传输的并且具有相应序列号的数据分组，所述第二MCU以无线保真（Wi-Fi）智能设备的模块; 以及基于各自的序列号处理和显示（S102）数据分组以便调试第二MCU。通过应用本发明实施例，终端可以获取各个序列号携带的数据包，并对各个序列号携带的数据包进行处理和显示，以进行调试。在本发明实施例中，终端能够方便直接根据各自的序列号确定数据收发序列，便于第二MCU的调试，及时发现数据传输中存在的问题并且还便于用户的操作。

6. 发明公开

EP3123318A1 IDLE TIME ACCUMULATION IN A MULTITHREADING COMPUTER SYSTEM 审中-公开
标题翻译： EINEM多功能计算机系统中的RUHEZEITAKKUMULATION
公开(公告)号：EP3123318A1
公开(公告)日：2017-02-01
申请号：EP15711710.2
申请日：2015-03-17
申请人： International Business Machines Corporation
发明人： SCHMIDT, Donald William , GREINER, Dan , FARRELL, Mark , OSISEK, Damian Leo , BUSABA, Fadi Yusuf , KUBALA, Jeffrey Paul , BRADBURY, Jonathan David , HELLER, Lisa Cranton , SLEGEL, Timothy
IPC分类号： G06F9/455 , G06F9/50 , G06F11/34
CPC分类号： G06F11/3423 , G06F1/14 , G06F9/30076 , G06F9/30145 , G06F9/3851 , G06F9/45533 , G06F9/46 , G06F9/4887 , G06F9/5077 , G06F11/302 , G06F11/3024 , G06F11/3442 , G06F2201/865
摘要： Embodiments relate to idle time accumulation in a multithreading computer system. According to one aspect, a computer system includes a configuration having a plurality of cores and an operating system (OS)-image configurable between a single thread (ST) mode and a multithreading (MT) mode in a logical partition. The MT mode supports multiple threads on shared resources per core simultaneously. The computer system also includes a multithreading facility configured to perform a method that includes executing a query instruction on an initiating core of the plurality of cores. The executing includes obtaining, by the OS-image, a maximum thread identification value indicating a current maximum thread identifier of the cores within the logical partition. The initiating core also obtains a multithreading idle time value for each of the cores indicating an aggregate amount of idle time of all threads enabled on each of the cores in the MT mode.
摘要翻译：实施例涉及多线程计算机系统中的空闲时间累积。根据一个方面，计算机系统包括具有多个核心的配置和在逻辑分区中在单线程（ST）模式和多线程（MT））模式之间可配置的操作系统（OS）图像。 MT模式同时支持每个核心共享资源上的多个线程。计算机系统还包括被配置为执行包括在多个核心的起始核心上执行查询指令的方法的多线程设施。执行包括通过OS映像获得指示逻辑分区内的核的当前最大线程标识符的最大线程标识值。启动核心还获得每个核心的多线程空闲时间值，其指示在MT模式中在每个核心上启用的所有线程的空闲时间的总量。

7. 发明公开

EP3121725A1 INFORMATION PROCESSING DEVICE AND MONITORING METHOD 审中-公开
标题翻译：信息技术与电力公司ÜberwachunGSVERFAHREN
公开(公告)号：EP3121725A1
公开(公告)日：2017-01-25
申请号：EP15765282.7
申请日：2015-03-18
申请人： NEC Corporation
发明人： NOMURA, Takashi , KIDA, Koji , KAMIMURA, Junpei , SAKAE, Yoshiaki , KATSUDA, Etsuko , ISOYAMA, Kazuhiko , YAMASAKI, Kentaro , KOBAYASHI, Yuji
IPC分类号： G06F11/32
CPC分类号： G06F11/079 , G06F11/0721 , G06F11/3006 , G06F11/3024 , G06F11/3055 , G06F11/3072 , G06F11/323 , G06F11/3476 , G06F2201/86 , G06F2201/865 , G06F2201/875
摘要： The present invention provides an information processing device that outputs information including the data transmission relationship between elements constituting an information processing system, the information indicating the state of the information processing system. The information processing device includes a graphing means for generating a relationship graph based on an event log indicating the behavior of each of a plurality of processes operating in the system, the relationship graph having the processes as the vertices thereof and having the data transmission relationship between the vertices as the sides thereof; and a graph output means for outputting the generated relationship graph.
摘要翻译：本发明提供了一种信息处理装置，其输出包括构成信息处理系统的元素之间的数据传输关系的信息，指示信息处理系统的状态的信息。信息处理装置包括：图形装置，用于根据指示系统中操作的多个处理中的每一个的行为的事件日志生成关系图，所述关系图具有作为其顶点的处理，并且具有数据传输关系顶点作为其侧面; 以及用于输出所生成的关系图的图形输出装置。

8. 发明公开

EP2867792A4 PERFORMANCE OF PREDICTED ACTIONS 审中-公开
标题翻译： DURCHFHHRUNG VORHERGESAGTER AKTIONEN
公开(公告)号：EP2867792A4
公开(公告)日：2016-05-25
申请号：EP13809249
申请日：2013-05-21
申请人： INTEL CORP
发明人： HOHNDEL DIRK , VAN DE VEN ADRIAAN
IPC分类号： G06F17/00
CPC分类号： G06N7/005 , G06F9/5011 , G06F11/3024 , G06F11/3055 , G06F11/3058 , G06F11/3409 , G06F11/3452
摘要： Embodiments of techniques and systems for performance of predicted actions are described. In embodiments, a predicted action performance engine (“PAE”) may receive one or probabilities of potential actions that may be performed on a computing device. The PAE may also receive a system context for the computing device describing available resources on the computing device, workload, etc. Based on these probabilities and the system context, the PAE may determine one or more predicted actions and/or resource utilizations which are likely to occur and which may be performed ahead of time. The PAE may then facilitate performance of these actions and/or resource utilizations. Other embodiments may be described and claimed.
摘要翻译：描述用于执行预测动作的技术和系统的实施例。在实施例中，预测动作执行引擎（“PAE”）可以接收可能在计算设备上执行的潜在动作的一个或多个概率。 PAE还可以接收描述计算设备上的可用资源的计算设备的系统上下文，工作负载等。基于这些概率和系统上下文，PAE可以确定可能的一个或多个预测的动作和/或资源利用发生并可能提前执行。然后，PAE可以促进这些动作和/或资源利用的执行。可以描述和要求保护其他实施例。

9. 发明公开

EP2942714A3 MONITORING METHOD, MONITORING APPARATUS, AND ELECTRONIC DEVICE 有权
标题翻译：监控程序，监控设备与电子设备
公开(公告)号：EP2942714A3
公开(公告)日：2016-01-06
申请号：EP15165639.4
申请日：2015-04-29
申请人： Huawei Technologies Co., Ltd.
发明人： Zhong, Shichun , Luo, Yanbin
IPC分类号： G06F11/34
CPC分类号： G01R31/318371 , G01R31/31703 , G01R31/31712 , G01R31/31718 , G01R31/3177 , G06F11/0703 , G06F11/0706 , G06F11/0751 , G06F11/3024 , G06F11/3072 , G06F11/3089 , G06F11/3471 , G06F11/348
摘要： Embodiments of the present invention, which relate to the field of electronic technologies, provide a monitoring method, a monitoring apparatus, and an electronic device, which can accurately locate an error point in MPI information delivered by a system chip. The apparatus may include: an address filter, a read/write controller connected to the address filter, and a memory connected to the read/write controller, where the address filter is configured to acquire multiple pieces of MPI information, and obtain, by filtering the multiple pieces of MPI information, first MPI information corresponding to a first service that is preset; the read/write controller is configured to write, into the memory according to a time sequence of receiving the first MPI information, the first MPI information that is obtained by the address filter by filtering; and the memory is configured to store the first MPI information written by the read/write controller.

10. 发明公开

EP2911273A4 STAND-BY POWER ESTIMATION DEVICE, PROGRAM 有权
标题翻译：器件，并用于测量待机功率
公开(公告)号：EP2911273A4
公开(公告)日：2015-12-09
申请号：EP13847010
申请日：2013-08-29
申请人： PANASONIC IP MAN CO LTD
发明人： SHIMIZU NORIYOSHI , NISHIYAMA TAKASHI
IPC分类号： H02J13/00 , G01R21/00 , G01R22/00 , G06F1/28 , G06F11/30 , H02J3/14 , H02J9/00
CPC分类号： G06F1/28 , G01R21/00 , G01R22/00 , G06F11/3024 , G06F11/3055 , H02J9/005 , H02J13/00 , H02J2003/143 , Y02B70/3233 , Y02B70/3266 , Y04S20/225 , Y04S20/242
摘要： An estimating apparatus includes an acquiring unit, a history recording unit, and a determining unit. The acquiring unit acquires power amounts for respective measurement times from a measuring apparatus that measures power for each branch line, as a plurality of used power amounts. The history recording unit records the plurality of used power amounts in association with dates and times. The determining unit variably sets a comparison value for comparing magnitudes of the plurality of used power amounts recorded in the history recording unit, obtains a minimum value of the comparison value in a range satisfying a condition that an amount of time for which at least some of the plurality of used power amounts are continuously equal to or below the comparison value exceeds a prescribed sustained time, and estimates the minimum value to be a peak value of stand-by power of the branch line.

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