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2. 发明公开

EP0063458A2 Microcomputer system 失效
标题翻译： Mikrocomputersystem。
公开(公告)号：EP0063458A2
公开(公告)日：1982-10-27
申请号：EP82301871.8
申请日：1982-04-08
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Thaden, Robert C. , McDonough, Kevin C. , Hayne, John W. , Bellay, Jeffrey D. , Swoboda, Gary L. , Patrick, Michael W.
IPC分类号： G06F15/06 , G06F9/26 , G06F9/46
CPC分类号： G06F9/4825 , G06F9/24 , G06F9/264 , G06F9/268
摘要： A single-chip microcomputer device (10) contains a program memory or ROM (11) and a read/write data memory or RAM (12), along with an arithmetic/logic unit (ALU 14) and temporary address/data registers (PCL, PCH, T/MAH, MAL, IR) and busses (AL, AH, O, P, N, MD), all within a semiconductor integrated circuit constructed in a strip architecture. A number of 8-bit ports (A, B, C, D, 30) are used for data or address input/output, and for memory control, under control of registers (25) accessed by the memory data bus (MD). A counter (26) provides timer or event counter functions. The ports, memory control, and counter data and control, are all in the logical address space of both on-chip memory (11, 12) and off-chip memory. The microcomputer (10) is microcoded so each instruction word from ROM (11) generates an entry point address for a control ROM 17 to begin a sequence of microcode states using dispatch addressing in which the opcode is held in the instruction register (IR) to allow microjumps in the CROM addressing depending upon the memory address mode and the arithmetic/logic function. Various test and emulator functions are permitted, controlled by external pins.
摘要翻译：单片机装置（10）包含程序存储器或ROM（11）和读/写数据存储器或RAM（12），连同算术/逻辑单元（ALU 14）和临时地址/数据寄存器（PCL ，PCH，T / MAH，MAL，IR）和总线（AL，AH，O，P，N，MD）。在存储器数据总线（MD）访问的寄存器（25）的控制下，多个8位端口（A，B，C，D，30）用于数据或地址输入/输出以及存储器控制。计数器（26）提供定时器或事件计数器功能。端口，存储器控制和计数器数据和控制都在片上存储器（11,12）和片外存储器的逻辑地址空间中。微型计算机（10）被微编码，使得来自ROM（11）的每个指令字产生用于控制ROM17的入口点地址，以便使用其中将操作码保持在指令寄存器（IR）中的调度寻址开始一系列微代码状态根据存储器地址模式和算术/逻辑功能，允许CROM寻址中的微分。允许各种测试和仿真器功能，由外部引脚控制。

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