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    • 7. 发明公开
    • Mechanism for implementing a microcode patch during fabrication
    • Mechanismus zur Implementierung eines Microcode-Patchswährendder Herstellung
    • EP2023242A1
    • 2009-02-11
    • EP07253308.6
    • 2007-08-21
    • VIA Technologies, Inc.
    • Henry, G. GlennParks, Terry
    • G06F9/318
    • G06F9/24G06F8/60G06F9/30174G06F9/328G06F9/4403
    • A patch apparatus in a microprocessor is provided. The patch apparatus includes a plurality of fuse banks and an array controller. The plurality of fuse banks is configured to store associated patch records that are employed to patch microcode or circuits in the microprocessor. The array controller is coupled to the plurality of fuse banks, and is configured to read the associated patch records, and is configured to provide the associated patch records to a patch loader, where the patch loader provides patches corresponding to the associated patch records, as prescribed, to designated target patch mechanisms in the microprocessor. The patch loader provides the patches to the designated target patch mechanisms following transition of a microprocessor reset signal and prior to execution of instructions stored in a BIOS ROM.
    • 提供微处理器中的贴片装置。 贴片装置包括多个保险丝组和阵列控制器。 多个熔丝组被配置为存储用于补偿微处理器中的微代码或电路的相关补丁记录。 阵列控制器耦合到多个熔丝组,并且被配置为读取相关联的补丁记录,并且被配置为向补丁加载器提供关联的补丁记录,其中补丁加载程序提供与相关补丁记录相对应的补丁,如 规定到微处理器中的指定的目标补丁机制。 补丁加载器在微处理器复位信号转换之后以及在执行存储在BIOS ROM中的指令之前,向指定的目标补丁机制提供补丁。