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1. 发明公开

EP3341937A1 FULLY DEPLETED SILICON ON INSULATOR FLASH MEMORY DESIGN 审中-实审
公开(公告)号：EP3341937A1
公开(公告)日：2018-07-04
申请号：EP16854057.3
申请日：2016-09-14
申请人： Silicon Storage Technology Inc.
发明人： TRAN, Hieu, Van , LY, Anh , VU, Thuan , NGUYEN, Hung, Quoc
IPC分类号： G11C8/00 , G11C8/10 , G11C16/08
CPC分类号： G11C16/14 , G11C7/065 , G11C8/08 , G11C16/08 , G11C16/10 , G11C16/26 , G11C16/28 , G11C2216/04 , H01L27/112 , H01L27/11582 , H01L28/00
摘要： The present invention relates to a flash memory system wherein one or more circuit blocks utilize fully depleted silicon-on-insulator transistor design to minimize leakage

2. 发明授权

EP2907137B1 NON-VOLATILE MEMORY ARRAY AND METHOD OF USING SAME FOR FRACTIONAL WORD PROGRAMMING 有权转让
标题翻译：非易失性存储器阵列及其用于分数字编程的方法
公开(公告)号：EP2907137B1
公开(公告)日：2018-05-16
申请号：EP13780469.6
申请日：2013-10-09
申请人： Silicon Storage Technology, Inc.
发明人： TRAN, Hieu, Van , LY, Anh , VU, Thuan , NGUYEN, Hung, Quoc
IPC分类号： G11C16/10 , G11C16/08 , G11C8/08 , G11C5/14 , G11C11/56
CPC分类号： G11C5/145 , G11C8/08 , G11C11/5628 , G11C16/08 , G11C16/10
摘要： A non-volatile memory device that includes N planes of non-volatile memory cells (where N is an integer greater than 1). Each plane of non-volatile memory cells includes a plurality of memory cells configured in rows and columns. Each of the N planes includes gate lines that extend across the rows of the memory cells therein but do not extend to others of the N planes of non-volatile memory cells. A controller is configured to divide each of a plurality of words of data into N fractional-words, and program each of the N fractional-words of each word of data into a different one of the N planes of non-volatile memory cells. The controller uses a programming current and a program time period for the programming, and can be configured to vary the programming current by a factor and inversely vary the program time period by the factor.

3. 发明公开

EP2948952A1 POWER MANAGEMENT FOR A MEMORY DEVICE 有权
标题翻译：电源管理的存储设备
公开(公告)号：EP2948952A1
公开(公告)日：2015-12-02
申请号：EP14702397.2
申请日：2014-01-15
申请人： Silicon Storage Technology Inc.
发明人： NGUYEN, Hung, Quoc , TRAN, Hieu, Van , NGUYEN, Hung, Thanh
IPC分类号： G11C7/08 , G11C7/22 , G11C5/14 , G11C7/20 , G11C7/10
CPC分类号： G06F1/32 , G11C5/14 , G11C7/08 , G11C7/1072 , G11C7/20 , G11C7/222 , G11C2207/065 , G11C2207/2227
摘要： An improved method and apparatus for performing power management in a memory device is disclosed.

4. 发明公开

EP2907137A1 NON-VOLATILE MEMORY ARRAY AND METHOD OF USING SAME FOR FRACTIONAL WORD PROGRAMMING 有权转让
标题翻译：不挥发存储器和方法及其使用分数字编程
公开(公告)号：EP2907137A1
公开(公告)日：2015-08-19
申请号：EP13780469.6
申请日：2013-10-09
申请人： Silicon Storage Technology Inc.
发明人： TRAN, Hieu, Van , LY, Anh , VU, Thuan , NGUYEN, Hung, Quoc
IPC分类号： G11C16/10 , G11C16/08 , G11C8/08 , G11C5/14 , G11C11/56
CPC分类号： G11C5/145 , G11C8/08 , G11C11/5628 , G11C16/08 , G11C16/10
摘要： A non-volatile memory device that includes N planes of non-volatile memory cells (where N is an integer greater than 1). Each plane of non-volatile memory cells includes a plurality of memory cells configured in rows and columns. Each of the N planes includes gate lines that extend across the rows of the memory cells therein but do not extend to others of the N planes of non-volatile memory cells. A controller is configured to divide each of a plurality of words of data into N fractional-words, and program each of the N fractional-words of each word of data into a different one of the N planes of non-volatile memory cells. The controller uses a programming current and a program time period for the programming, and can be configured to vary the programming current by a factor and inversely vary the program time period by the factor.
摘要翻译：一种非易失性存储器设备包括N个那样的非易失性存储器单元（其中N是一个大于1的整数）的计划。非易失性存储器单元中的每个平面包括以行和列配置的存储器单元的复数。每N个计划的包括栅极线也横跨存储单元在其中的行延伸，但不延伸到其他非易失性存储单元的N个平面的。控制器被配置为将每个数据字的多个划分成N分数词语，和程序中的每个的数据的每个字的N分数字转换为非易失性存储单元的N个平面的不同的一个。所述控制器使用编程电流和用于编程的程序的时间段，并且可以被配置以改变由一个因子编程电流和反向变化由因子程序TIMEPERIOD。

5. 发明授权

EP2774152B1 A MIXED VOLTAGE NON-VOLATILE MEMORY INTEGRATED CIRCUIT WITH POWER SAVING 有权
公开(公告)号：EP2774152B1
公开(公告)日：2019-07-31
申请号：EP12846107.6
申请日：2012-10-11
申请人： Silicon Storage Technology Inc.
发明人： TRAN, Hieu, Van , LY, Anh , VU, Thuan , NGUYEN, Hung, Quoc
IPC分类号： G11C5/14 , G11C16/26 , G11C16/30

6. 发明公开

EP3278339A1 METHOD AND APPARATUS FOR INHIBITING THE PROGRAMMING OF UNSELECTED BITLINES IN A FLASH MEMORY SYSTEM 有权
标题翻译：用于在闪存系统中禁止未被选择的二进制程序的编程的方法和设备
公开(公告)号：EP3278339A1
公开(公告)日：2018-02-07
申请号：EP16708322.9
申请日：2016-02-23
申请人： SILICON STORAGE TECHNOLOGY, INC.
发明人： TRAN, Hieu, Van , LY, Anh , VU, Thuan , NGUYEN, Hung, Quoc
IPC分类号： G11C16/04 , G11C16/10 , G11C16/34
摘要： Various embodiments for inhibiting the programming of memory cells coupled to unselected bit lines while programming a memory cell coupled to a selected bit line in a flash memory array are disclosed. Various embodiments for compensating for leakage current during the programming of memory cells coupled to a selected bit line in a flash memory array also are disclosed.

7. 发明授权

EP2973708B1 HIGH SPEED SENSING FOR ADVANCED NANOMETER FLASH MEMORY DEVICE 有权
标题翻译：高速纳米闪存设备的高速感应
公开(公告)号：EP2973708B1
公开(公告)日：2017-10-18
申请号：EP14702703.1
申请日：2014-01-14
申请人： Silicon Storage Technology Inc.
发明人： TRAN, Hieu, Van , LY, Anh , VU, Thuan , NGUYEN, Hung, Quoc , TIWARI, Vipin
IPC分类号： H01L27/115 , G11C16/00
CPC分类号： G11C16/28 , G11C7/062 , G11C7/067 , G11C7/12 , G11C16/00 , G11C16/06 , G11C16/24 , G11C16/26 , G11C2207/063 , H01L27/11519
摘要： A sensing circuit for a nanometer flash memory device comprises: a memory data read block coupled to a selected flash memory cell and comprising a bit line, a first parasitic capacitor from a first adjacent bit line and a second parasitic capacitor from a second adjacent bit line; a memory reference read block coupled to a reference memory cell; and a differential amplifier block coupled to the memory data read block and the memory reference read block for determining a value stored in the selected flash memory cell. Each of the memory data read block and the memory reference read block comprises a current source, a cascoding sensing NMOS transistor, a bitline clamp NMOS transistor, a diode connected sensing load PMOS transistor, and a capacitor. The memory data read block and memory reference read block are coupled to a precharge circuit to compensate for the first parasitic capacitor and the second parasitic capacitor.

8. 发明公开

EP2920787A1 THREE-DIMENSIONAL FLASH MEMORY SYSTEM 有权
标题翻译：幻灯片FLASHSPEICHERSYSTEM
公开(公告)号：EP2920787A1
公开(公告)日：2015-09-23
申请号：EP13783743.1
申请日：2013-10-09
申请人： Silicon Storage Technology Inc.
发明人： TRAN, Hieu, Van , NGUYEN, Hung, Quoc , REITEN, Mark
IPC分类号： G11C5/02 , G11C5/06 , G11C16/30 , H01L21/768 , H01L23/48 , H01L25/065 , H01L25/00 , G11C29/26
CPC分类号： G11C29/76 , G11C5/02 , G11C5/06 , G11C7/04 , G11C16/0483 , G11C16/06 , G11C16/08 , G11C16/10 , G11C16/26 , G11C16/30 , G11C16/3404 , G11C29/021 , G11C29/022 , G11C29/028 , G11C29/1201 , G11C29/26 , G11C2213/71 , H01L25/0652 , H01L25/18 , H01L2224/13025 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2225/06513 , H01L2225/06541 , H01L2924/15311
摘要： A three-dimensional flash memory system is disclosed.
摘要翻译：公开了三维闪存系统。

9. 发明公开

EP2774152A2 A MIXED VOLTAGE NON-VOLATILE MEMORY INTEGRATED CIRCUIT WITH POWER SAVING 有权
标题翻译：与节能混合电压不挥发存储器集成电路
公开(公告)号：EP2774152A2
公开(公告)日：2014-09-10
申请号：EP12846107.6
申请日：2012-10-11
申请人： Silicon Storage Technology Inc.
发明人： TRAN, Hieu, Van , LY, Anh , VU, Thuan , NGUYEN, Hung, Quoc
IPC分类号： G11C7/00 , G11C16/26
CPC分类号： G11C16/30 , G11C5/147 , G11C11/5628 , G11C16/08
摘要： An integrated circuit die has a first die pad for receiving a first voltage and a second die pad for receiving a second voltage. The second voltage is less than the first voltage. A first circuit which is operable at the first voltage is in the integrated circuit die. A second circuit which is operable at the second voltage is in the integrated circuit die and is connected to the second die pad. A circuit that detects current flow from the second die pad is in the integrated circuit die. A switch is interposed between the first die pad and the first circuit to disconnect the first die pad from the first circuit in response to current flow detected by the circuit for detecting current flow.

10. 发明授权

EP3248193B1 SPLIT GATE FLASH MEMORY SYSTEM USING COMPLEMENTARY VOLTAGE SUPPLIES 有权
公开(公告)号：EP3248193B1
公开(公告)日：2020-02-05
申请号：EP15813222.5
申请日：2015-12-04
申请人： Silicon Storage Technology Inc.
发明人： TRAN, Hieu, Van , LY, Anh , VU, Thuan , NGUYEN, Hung, Quoc
IPC分类号： G11C16/30 , G11C5/14 , G11C8/08 , G11C16/04 , G11C16/08 , G11C16/10 , G11C16/14 , G11C16/16 , G11C16/26

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