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1. 发明授权

EP2009687B1 Method of manufacturing an SOI substrate and method of manufacturing a semiconductor device 有权
标题翻译：一种用于生产制造半导体器件的SOI衬底和方法的工序
公开(公告)号：EP2009687B1
公开(公告)日：2016-08-17
申请号：EP08010537.2
申请日：2008-06-10
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Ohnuma, Hideto , Imahayashi, Ryota , Ilkubo, Yoichi , Makino, Kenichiro , Nagamatsu, Sho
IPC分类号： H01L21/762 , H01L29/786 , H01L27/12
CPC分类号： H01L27/1266 , H01L21/76254 , H01L27/1214 , H01L29/78654
摘要： It is an object of the present invention is to provide a method of manufacturing an SOI substrate provided with a single-crystal semiconductor layer which can be practically used even when a substrate having a low heat-resistant temperature, such as a glass substrate or the like, is used, and further, to manufacture a semiconductor device with high reliability by using such an SOI substrate. A semiconductor layer which is separated from a semiconductor substrate and bonded to a supporting substrate having an insulating surface is irradiated with electromagnetic waves, and the surface of the semiconductor layer is subjected to polishing treatment. At least part of a region of the semiconductor layer is melted by irradiation with electromagnetic waves, and a crystal defect in the semiconductor layer can be reduced. Further, the surface of the semiconductor layer can be polished and planarized by polishing treatment.

2. 发明公开

EP1993126A2 Manufacturing methods of semiconductor substrate, thin film transistor and semiconductor device 有权
标题翻译：半导体衬底，薄膜晶体管和半导体器件的制造方法
公开(公告)号：EP1993126A2
公开(公告)日：2008-11-19
申请号：EP08005222.8
申请日：2008-03-19
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： Ohnuma, Hideto
IPC分类号： H01L21/762 , H01L27/12 , H01L29/786 , H01L21/336
CPC分类号： H01L27/1266 , H01L21/76254 , H01L27/1214
摘要： In manufacturing an SOI substrate, in a case where a step is present in a surface to be bonded, a substrate may warp and the contact area becomes small due to the step, an SOI layer having a desired shape cannot be obtained in some cases. However, the present invention provides an SOI substrate having a desired shape even when a step is produced on a surface to be bonded. Between steps on the surface to be bonded, dummy patterns 302 are formed at predetermined intervals, and thus the warp of the substrate to be bonded can be suppressed, the adhesion between the bonded substrates can be ensured, and an SOI layer having a desired shape can be obtained.
摘要翻译：在制造SOI衬底时，在待接合表面中存在台阶的情况下，由于该台阶，衬底可能翘曲并且接触面积变小，有时不能获得具有期望形状的SOI层。然而，本发明即使在要被接合的表面上产生台阶时也提供具有期望形状的SOI衬底。在要被接合的表面上的台阶之间，以预定间隔形成虚设图案302，并且因此可以抑制待接合的衬底的翘曲，可以确保接合衬底之间的粘附性，并且可以确保具有期望形状的SOI层可以获得。

3. 发明授权

EP0645802B1 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：EP0645802B1
公开(公告)日：2007-11-21
申请号：EP94306862.7
申请日：1994-09-20
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： Konuma, Toshimitsu , Sugawara, Akira , Uehara, Yukiko , Zhang, Hongyong , Suzuki, Atsunori , Ohnuma, Hideto , Yamaguchi, Naoaki , Suzawa, Hideomi , Uochi, Hideki , Takemura, Yasuhiko
IPC分类号： H01L21/316 , H01L21/336 , H01L29/786 , H01L29/45
CPC分类号： H01L29/665 , H01L21/02145 , H01L21/02244 , H01L21/02258 , H01L21/31116 , H01L21/31144 , H01L21/31683 , H01L21/31687 , H01L21/321 , H01L27/124 , H01L27/127 , H01L29/458 , H01L29/66598 , H01L29/66757 , H01L29/78621 , H01L29/78627

4. 发明公开

EP0645802A3 Semiconductor device and method for manufacturing the same 失效
标题翻译： Halbleiter-Anordnung und Herstellungsverfahrendafür。
公开(公告)号：EP0645802A3
公开(公告)日：1998-03-11
申请号：EP94306862.7
申请日：1994-09-20
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： Konuma, Toshimitsu , Sugawara, Akira , Uehara, Yukiko , Zhang, Hongyong , Suzuki, Atsunori , Ohnuma, Hideto , Yamaguchi, Naoaki , Suzawa, Hideomi , Uochi, Hideki , Takemura, Yasuhiko
IPC分类号： H01L21/316 , H01L21/336
CPC分类号： H01L29/665 , H01L21/02145 , H01L21/02244 , H01L21/02258 , H01L21/31116 , H01L21/31144 , H01L21/31683 , H01L21/31687 , H01L21/321 , H01L27/124 , H01L27/127 , H01L29/458 , H01L29/66598 , H01L29/66757 , H01L29/78621 , H01L29/78627
摘要： A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an loff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode ; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.
摘要翻译：形成在绝缘基板源极，漏极和沟道区上的TFT，至少形成在沟道区上的栅极绝缘膜和形成在栅极绝缘膜上的栅电极。在沟道区域和漏极区域之间，提供具有较高电阻率的区域以便减小偏转电流。形成该结构的方法包括以下步骤：在栅电极侧阳极氧化栅电极以形成多孔阳极氧化膜; 使用多孔阳极氧化膜作为掩模去除栅极绝缘的一部分，使得栅极绝缘膜延伸超过栅极电极但不完全覆盖源极和漏极区域。此后，进行一个导电性元素的离子掺杂。高电阻率区域被定义在栅极绝缘膜下面。

5. 发明公开

EP2284605A2 Semiconductor device and fabrication method thereof 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：EP2284605A2
公开(公告)日：2011-02-16
申请号：EP10012988.1
申请日：2000-02-22
申请人： Semiconductor Energy Laboratory Co, Ltd.
发明人： Yamazaki, Shunpei , Murakami, Satoshi , Koyama, Jun , Tanaka, Yukio , Kitakado, Hidehito , Ohnuma, Hideto
IPC分类号： G02F1/1362 , H01L27/12 , H01L29/786
CPC分类号： G02F1/1368 , G02F1/133345 , G02F1/13454 , G02F1/136227 , G02F1/136286 , G02F2201/123 , G02F2202/104 , H01L27/12 , H01L27/1222 , H01L27/124 , H01L27/1248 , H01L27/1259 , H01L27/3248 , H01L27/3258 , H01L27/3262 , H01L27/3272 , H01L27/3276 , H01L29/458 , H01L29/78621 , H01L29/78627 , H01L29/78675 , H01L2029/7863 , H01L2227/323
摘要： The invention provides a display device comprising a TFT comprising:
a semiconductor layer, an insulating layer over the semiconductor layer, and a gate electrode over the insulating layer;
a current supply line electrically connected to the semiconductor layer; and a holding capacitance, wherein the current supply line overlaps with the holding capacitance.
摘要翻译：本发明提供了一种包括TFT的显示装置，该TFT包括：半导体层，半导体层上的绝缘层以及绝缘层上的栅电极; 电连接到所述半导体层的电流供应线; 和保持电容，其中，电流供给线与保持电容重叠。

6. 发明公开

EP1978553A3 SOI substrate, method for manufacturing the same, and semiconductor device 审中-公开
标题翻译： SOI衬底，所述半导体器件的制造方法和
公开(公告)号：EP1978553A3
公开(公告)日：2010-06-16
申请号：EP08004498.5
申请日：2008-03-11
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： Ohnuma, Hideto , Kakehata, Tetsuya , Iikubo, Yoichi
IPC分类号： H01L21/762 , H01L27/12
CPC分类号： H01L21/76254 , H01L21/84
摘要： An SOI substrate having an SOI layer that can be used in practical applications even when a substrate with low upper temperature limit, such as a glass substrate, is used, is provided. A semiconductor device using such an SOI substrate, is provided. In bonding a single-crystal semiconductor layer to a substrate having an insulating surface or an insulating substrate, a silicon oxide film formed using organic silane as a material on one or both surfaces that are to form a bond is used. According to the present invention, a substrate with an upper temperature limit of 700 °C or lower, such as a glass substrate, can be used, and an SOI layer that is strongly bonded to the substrate can be obtained. In other words, a single-crystal semiconductor layer can be formed over a large-area substrate that is longer than one meter on each side.

7. 发明公开

EP2048705A2 Manufacturing method of SOI substrate 审中-公开
标题翻译： SOI衬底的制造方法
公开(公告)号：EP2048705A2
公开(公告)日：2009-04-15
申请号：EP08017568.0
申请日：2008-10-07
申请人： Semiconductor Energy Laboratory Co, Ltd.
发明人： Ohnuma, Hideto , Kakehata, Tetsuya , Shimomura, Akihisa , Sasagawa, Shinya , Kurara, Motomu
IPC分类号： H01L21/762
CPC分类号： H01L21/76254 , H01L21/02532 , H01L21/02686 , H01L21/268 , H01L21/302 , H01L21/3065 , H01L21/84
摘要： A damaged region is formed by generation of plasma by excitation of a source gas, and by addition of ion species contained in the plasma from one of surfaces of a single crystal semiconductor substrate; an insulating layer is formed over the other surface of the single crystal semiconductor substrate; a supporting substrate is firmly attached to the single crystal semiconductor substrate so as to face the single crystal semiconductor substrate with the insulating layer interposed therebetween; separation is performed at the damaged region into the supporting substrate to which a single crystal semiconductor layer is attached and part of the single crystal semiconductor substrate by heating of the single crystal semiconductor substrate; dry etching is performed on a surface of the single crystal semiconductor layer attached to the supporting substrate; the single crystal semiconductor layer is recrystallized by irradiation of the single crystal semiconductor layer with a laser beam to melt at least part of the single crystal semiconductor layer.
摘要翻译：通过源气体的激发产生等离子体并且通过从单晶半导体衬底的一个表面添加包含在等离子体中的离子种类形成损伤区域; 在单晶半导体衬底的另一个表面上形成绝缘层; 支撑衬底牢固地附着到单晶半导体衬底上，以隔着绝缘层面向单晶半导体衬底; 通过单晶半导体衬底的加热，在损伤区域进行单晶半导体衬底附着的支撑衬底和部分单晶半导体衬底的分离; 在附着于支撑衬底的单晶半导体层的表面上执行干蚀刻; 单晶半导体层通过用激光束照射单晶半导体层而再结晶，以熔化至少部分单晶半导体层。

8. 发明公开

EP1986230A2 Method of manufacturing SOI substrate and method of manufacturing semiconductor device 审中-公开
标题翻译：一种用于生产制造半导体器件的SOI衬底和方法的工序
公开(公告)号：EP1986230A2
公开(公告)日：2008-10-29
申请号：EP08004781.4
申请日：2008-03-14
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： Yamazaki, Shunpei , Ohnuma, Hideto
IPC分类号： H01L21/762
CPC分类号： H01L21/2007 , H01L21/76254
摘要： A first substrate of single-crystal silicon within which is formed an embrittled layer and over a surface of which is formed a first insulating film is provided; a second insulating film is formed over a surface of a second substrate; at least one surface of either the first insulating film or the second insulating film is exposed to a plasma atmosphere or an ion atmosphere, and that surface of the first insulating film or the second insulating film is activated; the first substrate and the second substrate are bonded together with the first insulating film and the second insulating film interposed therebetween; a single-crystal silicon film is separated from the first substrate at an interface of the embrittled layer of the first substrate, and a thin film single-crystal silicon film is formed over the second substrate with the first insulating film and the second insulating film interposed therebetween.
摘要翻译：内的所有单晶硅的第一衬底，其上形成的所有的其上形成膜，提供了一种第一绝缘表面脆化层的和; 的第二绝缘膜被形成在第二衬底的表面上; 第一绝缘要么电影中的至少一个表面或所述第二绝缘膜被暴露于等离子体气氛或离子气氛，并做第一绝缘膜或第二绝缘膜，被激活的表面上; 所述第一基板和所述第二基板与所述第一绝缘膜和第二绝缘膜之间夹有粘结在一起; 单晶硅膜从第一基板在所述第一基片的脆化层的界面分离，并且一个薄膜单晶硅膜被形成在与所述第一绝缘膜和所述第二绝缘膜夹在第二基板有间。

9. 发明公开

EP1978553A2 SOI substrate, method for manufacturing the same, and semiconductor device 审中-公开
标题翻译： SOI-Substrat，Verfahren zu seiner Herstellung und Halbleiterbauelement
公开(公告)号：EP1978553A2
公开(公告)日：2008-10-08
申请号：EP08004498.5
申请日：2008-03-11
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： Ohnuma, Hideto , Kakehata, Tetsuya , Iikubo, Yoichi
IPC分类号： H01L21/762 , H01L27/12
CPC分类号： H01L21/76254 , H01L21/84
摘要： An SOI substrate having an SOI layer that can be used in practical applications even when a substrate with low upper temperature limit, such as a glass substrate, is used, is provided. A semiconductor device using such an SOI substrate, is provided. In bonding a single-crystal semiconductor layer to a substrate having an insulating surface or an insulating substrate, a silicon oxide film formed using organic silane as a material on one or both surfaces that are to form a bond is used. According to the present invention, a substrate with an upper temperature limit of 700 °C or lower, such as a glass substrate, can be used, and an SOI layer that is strongly bonded to the substrate can be obtained. In other words, a single-crystal semiconductor layer can be formed over a large-area substrate that is longer than one meter on each side.
摘要翻译：提供了即使使用诸如玻璃基板的具有低温度下限的基板也可用于实际应用中的具有SOI层的SOI衬底。提供了使用这种SOI衬底的半导体器件。在将单晶半导体层接合到具有绝缘表面的基板或绝缘基板上时，使用在一个或两个表面上形成键的有机硅烷作为材料形成的氧化硅膜。根据本发明，可以使用具有700℃以下的上限温度的基板，例如玻璃基板，并且可以获得与基板牢固结合的SOI层。换句话说，单晶半导体层可以形成在每侧长于1米的大面积基板上。

10. 发明公开

EP2284605A3 Semiconductor device and fabrication method thereof 审中-公开
公开(公告)号：EP2284605A3
公开(公告)日：2017-10-18
申请号：EP10012988.1
申请日：2000-02-22
申请人： Semiconductor Energy Laboratory Co, Ltd.
发明人： Yamazaki, Shunpei , Murakami, Satoshi , Koyama, Jun , Tanaka, Yukio , Kitakado, Hidehito , Ohnuma, Hideto
IPC分类号： G02F1/1362 , H01L27/12 , H01L29/786 , G02F1/1333 , G02F1/1368 , H01L29/45 , G02F1/1345 , H01L27/32
CPC分类号： G02F1/1368 , G02F1/133345 , G02F1/13454 , G02F1/136227 , G02F1/136286 , G02F2201/123 , G02F2202/104 , H01L27/12 , H01L27/1222 , H01L27/124 , H01L27/1248 , H01L27/1259 , H01L27/3248 , H01L27/3258 , H01L27/3262 , H01L27/3272 , H01L27/3276 , H01L29/458 , H01L29/78621 , H01L29/78627 , H01L29/78675 , H01L2029/7863 , H01L2227/323
摘要： The invention provides a display device comprising a TFT comprising:
a semiconductor layer, an insulating layer over the semiconductor layer, and a gate electrode over the insulating layer;
a current supply line electrically connected to the semiconductor layer; and a holding capacitance, wherein the current supply line overlaps with the holding capacitance.

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