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1. 发明授权

EP0902459B1 An apparatus for fabricating a semiconductor device and a method for fabricating a polysilicon film using the same 失效
标题翻译：用于制造半导体装置和设备的装置使用这种方法制造的多晶硅层
公开(公告)号：EP0902459B1
公开(公告)日：2005-12-14
申请号：EP97307010.5
申请日：1997-09-10
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Park, Young-wook , Yoo, Cha-young , Kim, Young-sun , Nam, Seung-hee
IPC分类号： H01L21/00
CPC分类号： H01L21/6719 , H01L21/67109 , H01L28/84

2. 发明公开

EP1455384A2 An apparatus for fabricating a semiconductor device and a method for fabricating a polysilicon film using the same 失效
标题翻译：用于制造半导体装置和设备的装置使用这种方法制造的多晶硅层
公开(公告)号：EP1455384A2
公开(公告)日：2004-09-08
申请号：EP04076537.2
申请日：1997-09-10
申请人： Samsung Electronics Co., Ltd.
发明人： Park, Young-wook , Yoo, Cha-young , Kim, Young-sun , Nam, Seung-hee
IPC分类号： H01L21/00
CPC分类号： H01L21/6719 , H01L21/67109 , H01L28/84
摘要： An apparatus for fabricating a semiconductor device having cooling jackets for preventing a gas being exuded in a reaction chamber and minimizing the generation of contaminant particles includes a reaction chamber (220) having first to fourth cooling jackets (400,410,420,430) mounted on a first side wall (300) adjacent to a wafer transfer chamber (210), a second side wall (320) opposite to the first side wall (300), an upper wall (340) and a bottom wall (360), respectively. A gate valve (310) is equipped between the reaction chamber (220) and the wafer transfer chamber (210) with a fifth cooling jacket (440). The method, the pressure of a cassette chamber (200) is controlled to be less than 0.05mtorr or the pressure of a cooling chamber (230) and the wafer transfer chamber (210) are controlled to be less than 1.0µtorr by controlling pumping down time.
摘要翻译：用于具有冷却套，用于防止气体被渗出在反应室中并最小化污染物颗粒的产生的半导体装置的制造的装置，包括具有反应室（220），第一到安装在第一侧壁（400410420430）第四冷却套（ 300）邻近的晶片搬送室（210），第二侧壁（320）相对的上壁（340）和分别的底壁（360）的第一侧壁（300）。的闸阀（310）配备所述反应室（220）和在晶片搬送室（210）与第五冷却套（440）之间。该方法中，盒室（200）的压力被控制为小于或0.05mtorr冷却室（230）和在晶片搬送室（210）的压力，通过控制泵被控制为小于1.0亩托停机时间。

3. 发明公开

EP0902462A1 A method for manufacturing a capacitor lower electrode of a semiconductor memory device 失效
标题翻译：一种制造半导体存储器件的下电极的方法
公开(公告)号：EP0902462A1
公开(公告)日：1999-03-17
申请号：EP97306946.1
申请日：1997-09-08
申请人： Samsung Electronics Co., Ltd.
发明人： Nam, Seung-hee , Kim, Young-sun , Park, Young-wook
IPC分类号： H01L21/3205
CPC分类号： H01L28/84
摘要： In a method for manufacturing a capacitor lower electrode of a semiconductor memory device, an insulation film pattern (112) is formed on a semiconductor substrate (100) with a contact hole (h 1 ) to expose a predetermined area of the semiconductor substrate. An impurity-doped amorphous silicon film is deposited on the overall surface of the resultant. A lower electrode pattern (120) is formed by patterning the amorphous silicon film. Contaminants and a surface oxide film are removed from the surface of the resultant by cleaning the resultant. An amorphous silicon thin layer (125) is deposited on the surface of the lower electrode pattern (120) by loading the cleaned resultant into the process chamber maintained in vacuum, and supplying a predetermined gas into the process chamber for a predetermined time. A plurality of silicon crystal nuclei (128) are formed and grown on the amorphous silicon thin layer (125) to form a lower electrode (130) having a rugged surface.
摘要翻译：在用于制造半导体存储器件的电容器下电极，以绝缘膜图案（112）的方法，是形成在与接触孔（H1）的半导体基板（100）以暴露所述半导体衬底的预定区域。掺杂有杂质的非晶硅薄膜沉积在所得物的整个表面上。下电极图案（120）通过图案化所述非晶硅薄膜 - 形成。污染物和表面氧化物薄膜是从所得到的表面通过清洗所得除去。非晶硅薄层（125）通过装载清洗生成物到保持在真空处理室，和供给预定的气体到处理腔室在预定时间内沉积在下电极图案（120）的表面上。硅晶核（128）的形成有多个和生长的非晶硅薄膜层（125）上，以形成下部电极（130），其具有凹凸不平的表面。

4. 发明公开

EP0902459A1 An apparatus for fabricating a semiconductor device and a method for fabricating a polysilicon film using the same 失效
标题翻译：用于制造半导体装置和设备的装置使用这种方法制造的多晶硅层
公开(公告)号：EP0902459A1
公开(公告)日：1999-03-17
申请号：EP97307010.5
申请日：1997-09-10
申请人： Samsung Electronics Co., Ltd.
发明人： Park, Young-wook , Yoo, Cha-young , Kim, Young-sun , Nam, Seung-hee
IPC分类号： H01L21/00
CPC分类号： H01L21/6719 , H01L21/67109 , H01L28/84
摘要： An apparatus for fabricating a semiconductor device having cooling jackets for preventing a gas being exuded in a reaction chamber and minimizing the generation of contaminant particles includes a reaction chamber (220) having first to fourth cooling jackets (400,410,420,430) mounted on a first side wall (300) adjacent to a wafer transfer chamber (210), a second side wall (320) opposite to the first side wall (300), an upper wall (340) and a bottom wall (360), respectively. A gate valve (310) is equipped between the reaction chamber (220) and the wafer transfer chamber (210) with a fifth cooling jacket (440). The method, the pressure of a cassette chamber (200) is controlled to be less than 0.05mtorr or the pressure of a cooling chamber (230) and the wafer transfer chamber (210) are controlled to be less than 1.0µtorr by controlling pumping down time.
摘要翻译：用于具有冷却套，用于防止气体被渗出在反应室中并最小化污染物颗粒的产生的半导体装置的制造的装置，包括具有反应室（220），第一到安装在第一侧壁（400410420430）第四冷却套（ 300）邻近的晶片搬送室（210），第二侧壁（320）相对的上壁（340）和分别的底壁（360）的第一侧壁（300）。的闸阀（310）配备所述反应室（220）和在晶片搬送室（210）与第五冷却套（440）之间。该方法中，盒室（200）的压力被控制为小于或0.05mtorr冷却室（230）和在晶片搬送室（210）的压力，通过控制泵被控制为小于1.0亩托停机时间。

5. 发明授权

EP0902462B1 A method for manufacturing a capacitor lower electrode of a semiconductor memory device 失效
标题翻译：一种制造半导体存储器件的下电极的方法
公开(公告)号：EP0902462B1
公开(公告)日：2006-08-30
申请号：EP97306946.1
申请日：1997-09-08
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Nam, Seung-hee , Kim, Young-sun , Park, Young-wook
IPC分类号： H01L21/3205
CPC分类号： H01L28/84

6. 发明公开

EP1455384A3 An apparatus for fabricating a semiconductor device and a method for fabricating a polysilicon film using the same 失效
标题翻译：用于制造半导体装置和设备的装置使用这种方法制造的多晶硅层
公开(公告)号：EP1455384A3
公开(公告)日：2004-10-20
申请号：EP04076537.2
申请日：1997-09-10
申请人： Samsung Electronics Co., Ltd.
发明人： Park, Young-wook , Yoo, Cha-young , Kim, Young-sun , Nam, Seung-hee
IPC分类号： H01L21/00 , H01L21/02
CPC分类号： H01L21/6719 , H01L21/67109 , H01L28/84
摘要： An apparatus for fabricating a semiconductor device having cooling jackets for preventing a gas being exuded in a reaction chamber and minimizing the generation of contaminant particles includes a reaction chamber (220) having first to fourth cooling jackets (400,410,420,430) mounted on a first side wall (300) adjacent to a wafer transfer chamber (210), a second side wall (320) opposite to the first side wall (300), an upper wall (340) and a bottom wall (360), respectively. A gate valve (310) is equipped between the reaction chamber (220) and the wafer transfer chamber (210) with a fifth cooling jacket (440). The method, the pressure of a cassette chamber (200) is controlled to be less than 0.05mtorr or the pressure of a cooling chamber (230) and the wafer transfer chamber (210) are controlled to be less than 1.0µtorr by controlling pumping down time.

7. 发明授权

EP0734060B1 Manufacture method of a DRAM capacitor storage electrode with textured surface 失效
标题翻译：具有结构化表面的DRAM电容器存储电极的制造过程的
公开(公告)号：EP0734060B1
公开(公告)日：2002-06-12
申请号：EP96302012.8
申请日：1996-03-22
申请人： Samsung Electronics Co., Ltd.
发明人： Kim, Kyung-hoon , Park, Young-wook , Yoo, Cha-young
IPC分类号： H01L21/8242 , H01L27/108
CPC分类号： H01L27/10852 , Y10S438/964

8. 发明公开

EP0734060A1 DRAM capacitor storage electrode with textured surface 失效
标题翻译： DRAM-Kondensaotr-Speicherelektrode mit strukturierterOberfläche
公开(公告)号：EP0734060A1
公开(公告)日：1996-09-25
申请号：EP96302012.8
申请日：1996-03-22
申请人： Samsung Electronics Co., Ltd.
发明人： Kim, Kyung-hoon , Park, Young-wook , Yoo, Cha-young
IPC分类号： H01L21/8242 , H01L27/108
CPC分类号： H01L27/10852 , Y10S438/964
摘要： A capacitor of a highly integrated semiconductor device and a manufacturing method therefor are provided. In the highly integrated semiconductor device, an HSG polysilicon layer pattern (46a) is formed having a multitude of hemispherical grains (50a) (HSG) on the top and side surfaces of the storage electrode.
Electrode separation is performed by selectively removing a silicide layer (52) that has been formed of a sacrificial metal layer (38) after the HSG step. The HSG polysilicon layer pattern does not have to be etched so that HSG polysilicon layer pattern (50a) on the top and side surfaces of conductive layer pattern (46a) remains intact.
摘要翻译：提供了一种高度集成的半导体器件的电容器及其制造方法。在高度集成的半导体器件中，在存储电极的顶表面和侧表面上形成有多个半球形晶粒（HSG）的HSG多晶硅层图案（46a）。通过选择性地去除在HSG步骤之后由牺牲金属层（38）形成的硅化物层（52）来进行电极分离。不需要蚀刻HSG多晶硅层图案，使得导电层图案（46a）的顶表面和侧表面上的HSG多晶硅层图案（50a）保持完整。

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