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1. 发明公开

EP1635400A4 FIELD EFFECT TRANSISTOR 有权
标题翻译： FELDEFFEKTTRANSISTOR
公开(公告)号：EP1635400A4
公开(公告)日：2007-09-26
申请号：EP04734415
申请日：2004-05-21
申请人： SUMITOMO ELECTRIC INDUSTRIES
发明人： FUJIKAWA KAZUHIRO , HARADA SHIN , MATSUNAMI HIROYUKI , KIMOTO TSUNENOBU
IPC分类号： H01L29/808 , H01L21/337 , H01L29/06 , H01L29/24
CPC分类号： H01L29/66901 , H01L29/0634 , H01L29/1608 , H01L29/808
摘要： An electric-field moderating layer (12) and a p-type buffer layer (2) are formed on an SiC single crystal substrate (1). The electric-field moderating layer (12) is so formed between the p-type buffer layer (2) and the SiC single crystal substrate (1) that it is in contact with the SiC single crystal substrate (1). An n-type semiconductor layer (3) is formed on the p-type buffer layer (2). A p-type semiconductor layer (10) is formed on the n-type semiconductor layer (3). An n+-type source region layer (4) and an n+-type drain region layer (5) are formed at a certain distance from each other within the p-type semiconductor layer (10). A p+-type gate region layer (6) is formed in a portion of the p-type semiconductor layer (10) lying between the n+-type source region layer (4) and the n+-type drain region layer (5).
摘要翻译：在SiC单晶衬底（1）上形成电场缓和层（12）和p型缓冲层（2）。在p型缓冲层（2）与SiC单晶衬底（1）之间形成电场缓和层（12），使其与SiC单晶衬底（1）接触。在p型缓冲层（2）上形成n型半导体层（3）。在n型半导体层（3）上形成p型半导体层（10）。在p型半导体层（10）内以一定距离形成n +型源极区域层（4）和n +型漏极区域层（5）。在位于n +型源极区域层（4）和n +型漏极区域层（5）之间的p型半导体层（10）的一部分上形成p +型栅极区域层（6）。

2. 发明公开

EP1306903A4 INVERTER 审中-公开
公开(公告)号：EP1306903A4
公开(公告)日：2005-02-09
申请号：EP00948304
申请日：2000-07-28
申请人： SUMITOMO ELECTRIC INDUSTRIES
发明人： HARADA SHIN , HIROTSU KENICHI , MATSUNAMI HIROYUKI , KIMOTO TSUNENOBU
IPC分类号： H01L21/337 , H01L27/098 , H01L29/24 , H01L29/808 , H02M7/515 , H02M7/537 , H01L27/06 , H01L21/338 , H01L21/8232 , H01L29/812 , H02M7/5387
CPC分类号： H02M7/515 , H01L27/098 , H01L29/1608 , H01L29/808 , Y02B70/1483
摘要： A low-loss inverter with high switching frequency is provided using inverter elements (S1-S6), which are SiC (Silicon Carbide) JFETs.
摘要翻译：使用SiC（碳化硅）JFET的反相器元件（S1-S6）提供具有高开关频率的低损耗逆变器。

3. 发明公开

EP1249521A4 SiC SINGLE CRYSTAL AND METHOD FOR GROWING THE SAME 有权
标题翻译： SiC单晶及其制造方法
公开(公告)号：EP1249521A4
公开(公告)日：2003-02-05
申请号：EP00956968
申请日：2000-09-06
申请人： SIXON INC , KANSAI ELECTRIC POWER CO , MITSUBISHI CORP , SUMITOMO ELECTRIC INDUSTRIES
发明人： SHIOMI HIROMU , KIMOTO TSUNENOBU , MATSUNAMI HIROYUKI
IPC分类号： C30B29/36 , C30B23/00 , C30B25/00 , C30B23/02 , C30B25/02 , C30B25/20 , H01L21/205
CPC分类号： C30B23/005 , C30B23/00 , C30B25/00 , C30B29/36
摘要： The growth of a silicon carbide single crystal comprises growing a SiC single crystal on a seed crystal comprising a SiC single crystal at an angle alpha (20 [deg] less than alpha less than 60 [deg]) to the {0001} surface and at an angle beta of = 15[deg] of the vector obtained by projecting the normal vector onto the {0001} surface and the (11-20) direction. An independent claim is also included for a silicon carbide single crystal grown by this method.

4. 发明公开

EP1233085A4 SiC SINGLE CRYSTAL AND METHOD FOR GROWING THE SAME 有权
标题翻译： SIC-EINKRISTALL UND HERSTELLUNGSVERFAHRENDAFÜR
公开(公告)号：EP1233085A4
公开(公告)日：2003-02-05
申请号：EP00956967
申请日：2000-09-06
申请人： SIXON INC , KANSAI ELECTRIC POWER CO , MITSUBISHI CORP , SUMITOMO ELECTRIC INDUSTRIES
发明人： SHIOMI HIROMU , KIMOTO TSUNENOBU , MATSUNAMI HIROYUKI
IPC分类号： C30B29/36 , C30B23/00 , C30B23/02 , C30B25/00 , C30B25/02 , C30B25/20 , H01L21/205
CPC分类号： C30B23/00 , C30B23/02 , C30B23/025 , C30B29/36
摘要： Provided is a method for growing a 6H-poly-type SiC single crystal 40, in which method a 6H-poly-type SiC single crystal 40 is grown on a seed crystal 30 composed from an SiC single crystal in which a plane ä01-14ü 30u or a plane inclined by an off angle alpha equal to or less than approximately 10 DEG with respect to the plane ä01-14ü is exposed.
摘要翻译：提供了一种用于生长6H-多晶型SiC单晶40的方法，其中在由SiC单晶组成的晶种30上生长6H-多晶型SiC单晶40，其中平面ä01-14ü 30u或相对于平面ä01-14ü等于或小于10°的偏角α倾斜的平面被暴露。

5. 发明公开

EP1487024A4 LATERAL JUNCTIION FIELD-EFFECT TRANSISTOR AND ITS MANUFACTURING METHOD 审中-公开
标题翻译： LATERAL-BARRIER场效应晶体管及其制造方法
公开(公告)号：EP1487024A4
公开(公告)日：2009-10-21
申请号：EP02786001
申请日：2002-12-02
申请人： SUMITOMO ELECTRIC INDUSTRIES
发明人： FUJIKAWA KAZUHIRO , HARADA SHIN , HIROTSU KENICHI , HATSUKAWA SATOSHI , HOSHINO TAKASHI , MATSUNAMI HIROYUKI , KIMOTO TSUNENOBU
IPC分类号： H01L29/808 , H01L21/337 , H01L29/10 , H01L29/423
CPC分类号： H01L29/0634 , H01L29/1058 , H01L29/1066 , H01L29/42316 , H01L29/66893 , H01L29/808

6. 发明公开

EP1396890A4 LATERAL JUNCTION TYPE FIELD EFFECT TRANSISTOR 有权
标题翻译：场效应晶体管横向屏障型
公开(公告)号：EP1396890A4
公开(公告)日：2007-10-10
申请号：EP02736054
申请日：2002-06-11
申请人： SUMITOMO ELECTRIC INDUSTRIES
发明人： HARADA SHIN , HIROTSU KENICHI , MATSUNAMI HIROYUKI , KIMOTO TSUNENOBU
IPC分类号： H01L29/808 , H01L21/337 , H01L29/06 , H01L29/10 , H01L29/24 , H01L29/772
CPC分类号： H01L29/808 , H01L29/0623 , H01L29/1066 , H01L29/1608
摘要： The basic structure of this lateral JFET comprises an n type semiconductor layer (3) consisting of an n type impurity area, and a p type semiconductor layer consisting of a p type impurity area and formed on this n type semiconductor layer (3). In addition, provided in this p type semiconductor layer are a p+ type gate area layer (7) extending up to the n type semiconductor layer (3) and containing a p type impurity concentration higher than that of the n type semiconductor layer (3), and an n+ type drain area layer (9) positioned a specified distance apart from the p+ type gate area layer (7) and containing an n type impurity concentration higher than that of the n type semiconductor layer (3). This arrangement can provide a lateral JFET capable of retaining a high withstand voltage performance and reducing an on−resistance.

7. 发明公开

EP1215730A4 SiC WAFER, SiC SEMICONDUCTOR DEVICE AND PRODUCTION METHOD OF SiC WAFER 有权
标题翻译： SiC-HALBLEITERCHEIBE，SiC-HALBLEITERBAUELEMENT SOWIE HERSTELLUNGSVERFAHRENFÜREINE SiC-HALBLEITERCHEIBE
公开(公告)号：EP1215730A4
公开(公告)日：2003-02-05
申请号：EP00956966
申请日：2000-09-06
申请人： SIXON INC , KANSAI ELECTRIC POWER C C INC , MITSUBISHI CORP , SUMITOMO ELECTRIC INDUSTRIES
发明人： SHIOMI HIROMU , KIMOTO TSUNENOBU , MATSUNAMI HIROYUKI
IPC分类号： C30B23/00 , C30B23/02 , H01L21/04 , H01L29/04 , H01L29/24 , H01L29/78 , H01L29/16 , C30B25/00 , C30B25/02 , C30B25/20 , C30B29/36 , H01L29/47
CPC分类号： H01L29/1608 , C30B23/00 , C30B23/02 , C30B29/36 , H01L21/02378 , H01L21/02447 , H01L21/02516 , H01L21/02529 , H01L21/02579 , H01L21/02587 , H01L21/0262 , H01L21/02658 , H01L29/045 , H01L29/78
摘要： A SiC wafer comprises a 4H polytype SiC substrate 2 in which the crystal plane orientation is substantially ä03-38ü, and a buffer layer 4 composed of SiC formed over this SiC substrate 2. The ä03-38ü plane forms an angle of approximately 35 DEG with respect to the axial direction in which micropipes and so forth extend, so micropipes and so forth are eliminated at the crystal sides, and do not go through to an active layer 6 on the buffer layer 4. Lattice mismatching between the SiC substrate 2 and the active layer 6 is suppressed by the buffer layer 4. Furthermore, anisotropy in the electron mobility is low because a 4H polytype is used. Therefore, it is possible to obtain a SiC wafer and a SiC semiconductor device with which there is little anisotropy in the electron mobility, and strain caused by lattice mismatching can be lessened, as well as a method for manufacturing these.
摘要翻译： SiC晶片包括4H多型SiC衬底2，其中晶面取向基本上为ä03-38ü，以及由该SiC衬底2上形成的由SiC构成的缓冲层4.ä03-38ü平面形成大约35°的角度，相对于其中微孔等的<0001>轴向方向延伸，因此在晶体侧消除微管等，并且不会通过缓冲层4上的有源层6.晶片在SiC衬底之间不匹配而且由于使用了4H多型，因此电子迁移率的各向异性低。因此，可以获得在电子迁移率中几何异向性小的SiC晶片和SiC半导体器件，并且可以减小由晶格失配引起的应变以及其制造方法。

8. 发明公开

EP2056340A4 METHOD FOR PRODUCING SILICON CARBIDE SUBSTRATE AND SILICON CARBIDE SUBSTRATE 审中-公开
标题翻译：用于生产碳化硅衬底和碳化硅
公开(公告)号：EP2056340A4
公开(公告)日：2011-01-12
申请号：EP07792921
申请日：2007-08-23
申请人： SUMITOMO ELECTRIC INDUSTRIES
发明人： KINOSHITA HIROYUKI , SUDA JUN , KIMOTO TSUNENOBU
IPC分类号： H01L21/302 , H01L21/205 , H01L33/00
CPC分类号： C30B29/36 , C30B33/12 , H01L21/0475 , H01L29/045 , H01L29/1608

9. 发明公开

EP1284496A4 JUNCTION FIELD-EFFECT TRANSISTOR AND METHOD OF MANUFACTURE THEREOF 有权
标题翻译：过渡性及场效应晶体管的制造方法
公开(公告)号：EP1284496A4
公开(公告)日：2007-06-27
申请号：EP00957106
申请日：2000-09-11
申请人： SUMITOMO ELECTRIC INDUSTRIES
发明人： HARADA SHIN , HIROTSU KENICHI , MATSUNAMI HIROYUKI , KIMOTO TSUNENOBU
IPC分类号： H01L21/337 , H01L29/24 , H01L29/772 , H01L29/808 , H01L21/338 , H01L27/095 , H01L29/778 , H01L29/80 , H01L29/812
CPC分类号： H01L29/0843 , H01L29/1058 , H01L29/1066 , H01L29/1608 , H01L29/66901 , H01L29/66909 , H01L29/7722 , H01L29/808 , H01L29/8083
摘要： A low-loss junction field-effect transistor (JFET) capable of switching at high voltage and high current comprises a gate region (2) of a second conductivity type provided on the surface of a semiconductor substrate, a source region (1) of a first conductivity type, a channel region (10) of the first conductivity type extending continuously from the source region, a region (5) of the second conductivity type extending continuously from the gate region to define the channel region, a drain region (3) of the first conductivity type provided on the backside, and a drift region (4) of the first conductivity type extending continuously from the channel to the drain in the direction of the substrate thickness. The concentrations of the first conductivity type dopant in the drift region and the channel region are lower than the concentrations of the first conductivity type dopant in the source region and the drain region and the concentration of the second conductivity type dopant in the defining region.

10. 发明公开

EP1243674A4 SiC SINGLE CRYSTAL AND METHOD FOR GROWING THE SAME 有权
标题翻译： SIC-EINKRISTALL UND HERSTELLUNGSVERFAHRENDAFÜR
公开(公告)号：EP1243674A4
公开(公告)日：2003-02-05
申请号：EP00956965
申请日：2000-09-06
申请人： SIXON INC , KANSAI ELECTRIC POWER C C INC , MITSUBISHI CORP , SUMITOMO ELECTRIC INDUSTRIES
发明人： SHIOMI HIROMU , KIMOTO TSUNENOBU , MATSUNAMI HIROYUKI
IPC分类号： C30B23/00 , C30B23/02 , C30B29/36 , C30B25/00 , C30B25/02
CPC分类号： C30B23/00 , C30B23/02 , C30B29/36
摘要： A method of growing a 4H-poly type SiC single crystal 40, characterized in that the 4H-poly type SiC single crystal 40 is grown on a seed crystal 30 comprised of an SiC single crystal where a ä03-38ü plane 30u or a plane which is inclined at off angle alpha , within about 10 DEG , with respect to the ä03-38ü plane, is exposed.
摘要翻译：一种生长4H多型SiC单晶（40）的方法，其特征在于4H多型SiC单晶（40）在包含暴露{03-38} SiC单晶的SiC单晶的籽晶（30）上生长，平面（30u）或从{03-38}平面倾斜小于大约10°的偏离角（β）的平面。用于生长SiC单晶的方法可以减少暴露在SiC单晶表面上的微管和堆垛层错，并且因此通过该方法制备的SiC单晶几乎没有暴露在其表面上的微管和堆垛层错。

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