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1. 发明公开

EP3550710A1 A GALVANIC ISOLATION CIRCUIT AND SYSTEM, CORRESPONDING METHOD 有权
公开(公告)号：EP3550710A1
公开(公告)日：2019-10-09
申请号：EP19163984.8
申请日：2019-03-20
申请人： STMicroelectronics S.r.l.
发明人： PARISI, Alessandro , GRECO, Nunzio , SPINA, Nunzio , RAGONESE, Egidio , PALMISANO, Giuseppe
IPC分类号： H02M3/335 , H02M1/00 , H03B5/12 , H03K7/08 , H03L7/06 , H03L7/08 , H03L7/183
摘要： A circuit comprises a power supply oscillator (10) coupled to one side of a galvanic barrier (GB) to supply thereto an electric supply signal. The power supply oscillator is configured to be alternatively turned on and off as a function of a PWM drive signal (PWM A ) applied thereto. A receiver circuit block (12) coupled to the galvanic barrier (GB) receives therefrom a PWM power control signal (PWM B ). A signal reconstruction network (26, 28, 30) between the receiver circuit block (12) and the power supply oscillator (10) provides to the power supply oscillator (10) a PWM drive signal (PWM A ) reconstructed from the PWM power control signal (PWM B ). The signal reconstruction network (26, 28, 30) comprises a PLL circuit block (26) coupled to the receiver circuit block (12) and configured to lock to the PWM control signal (ck SAMPLE ) from the receiver circuit block (12). The PLL circuit block (26) comprises a PLL loop (262, 264, 266) sensitive to the PWM drive signal (PWM A ) applied to the power supply oscillator (10). The PLL loop (262, 264, 266) is configured (266) to be opened as a result of the power supply oscillator (10) being turned off.

2. 发明授权

EP3550710B1 A GALVANIC ISOLATION CIRCUIT AND SYSTEM, CORRESPONDING METHOD 有权
公开(公告)号：EP3550710B1
公开(公告)日：2020-11-11
申请号：EP19163984.8
申请日：2019-03-20
申请人： STMicroelectronics S.r.l.
发明人： PARISI, Alessandro , GRECO, Nunzio , SPINA, Nunzio , RAGONESE, Egidio , PALMISANO, Giuseppe
IPC分类号： H02M3/335 , H02M1/00 , H03B5/12 , H03K7/08 , H03L7/06 , H03L7/08 , H03L7/183

3. 发明公开

EP3512087A1 A GALVANICALLY ISOLATED DC-DC CIRCUIT CONVERTER WITH DATA COMMUNICATION, CORRESPONDING SYSTEM AND CORRESPONDING METHOD 有权
公开(公告)号：EP3512087A1
公开(公告)日：2019-07-17
申请号：EP18215990.5
申请日：2018-12-31
申请人： STMicroelectronics S.r.l.
发明人： PARISI, Alessandro , GRECO, Nunzio , SPINA, Nunzio , RAGONESE, Mr. Egidio , PALMISANO, Giuseppe
IPC分类号： H02M3/335 , H02M3/337 , H02M3/338 , H03B5/12
摘要： A galvanically isolated dc-dc converter (110) comprising a galvanic isolation barrier (GI) across which a power signal is transmitted, said dc-dc converter circuit (110) comprising a power oscillator (112) connected to a first winding (111p) of an isolation transformer (111), and at least a data communication channel (DT; OUT) on which a stream of data (P, D1...Dn) is conveyed through said galvanic isolation barrier (GI) by modulating the power signal (PT), comprising
a transmitter (118) performing an amplitude modulation (ASK) of said power signal (PT) at a secondary winding (Ills) of said transformer,
a rectifier (113) connected to the second winding (Ills) of the transformer configured to obtain an output DC voltage (V o ) by rectifying of the received power AC signal on said second winding (111s).
The converter circuit (110) further includes
a comparator (115) receiving as input said output DC voltage (V o ) and a reference voltage value (REF; V REF ) producing a voltage error signal (ε).
an analog to digital converter (116) configured to convert said error signal (ε) in a digital power control value (P) and
a multiplexer (117) multiplexing together said digital power control value (P) with said n-channel data obtaining a multiplexed bitstream (TBT),
a transmitter (118) configured to perform the amplitude modulation of said power signal (PT) driven by said multiplexed bitstream (TBT).
a receiver (120) connected to the first winding configured to demodulate the amplitude modulated signal (OUT) at such first winding
a demultiplexer (121) configured to demultiplex said n-data channels (D1...Dn) and digital power control value (P),
a digital to analog converter (122) configured to convert the digital power control value (P) in an analog control signal supplied as control voltage (V CTRL ) of the power oscillator (112) for power regulation.

4. 发明公开

EP3291446A1 A GALVANIC ISOLATION CIRCUIT, CORRESPONDING SYSTEM AND METHOD 审中-公开
标题翻译：一种电流隔离电路，相应的系统和方法
公开(公告)号：EP3291446A1
公开(公告)日：2018-03-07
申请号：EP17161341.7
申请日：2017-03-16
申请人： STMicroelectronics S.r.l.
发明人： RAGONESE, Egidio , SPINA, Nunzio , PARISI, Alessandro , LOMBARDO, Pierpaolo , GRECO, Nunzio , PALMISANO, Giuseppe
IPC分类号： H03F3/45 , H04L25/02 , H01F19/08
CPC分类号： H04B1/10 , H01F19/04 , H01F2019/085 , H03F3/45183 , H03F3/45632 , H03F2203/45084 , H03F2203/45621 , H03F2203/45642 , H03F2203/45704 , H04L25/02 , H04L25/0266 , H04L25/0272
摘要： A galvanic isolation circuit (GI) includes a differential transformer (20) having primary (21) and secondary (22) windings for transmission of signals over a carrier (DT) between the primary (21) and the secondary (22) windings of the transformer. The primary (21) and secondary (22) windings have a galvanic isolation oxide layer (23) therebetween and include center taps (21a, 22a) providing low-impedance paths for dc and low frequency components of common-mode currents through the differential transformer (20). A pass-band stage (24) coupled to the secondary winding (22) of the transformer (20) is configured for permitting propagation of signals over said carrier through the pass-band amplifier stage (24) while providing rejection of common-mode noise.
摘要翻译：电流隔离电路（GI）包括具有主（21）和副（22）绕组的差动变压器（20），用于通过载波（DT）传输信号在主绕组（21）和次（22）绕组之间变压器。初级绕组（21）和次级绕组（22）在它们之间具有电隔离氧化物层（23）并且包括中心抽头（21a，22a），其为通过差分变压器的共模电流的dc和低频分量提供低阻抗路径（20）。耦合到变压器（20）的次级绕组（22）的通带级（24）被配置为允许信号在所述载波上通过通带放大器级（24）传播，同时提供对共模噪声。

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