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1. 发明公开

EP2486586A1 THREE DIMENSIONAL INDUCTOR AND TRANSFORMER 有权
标题翻译：维和变压器INDUKTOR
公开(公告)号：EP2486586A1
公开(公告)日：2012-08-15
申请号：EP10771245.7
申请日：2010-10-07
申请人： Qualcomm Incorporated
发明人： KIM, Jonghae , GU, Shiqun , HENDERSON, Brian Matthew , TOMS, Thomas R. , CHUA-EOAN, Lew G. , BAZARJANI, Seyfollah S. , NOWAK, Matthew
IPC分类号： H01L21/02 , H01L23/522 , H01F17/00 , H01L27/06 , H01L23/48
摘要： A three dimensional on-chip inductor, transformer and radio frequency amplifier are disclosed. The radio frequency amplifier includes a pair of transformers and a transistor. The transformers include at least two inductively coupled inductors. The inductors include a plurality of segments of a first metal layer, a plurality of segments of a second metal layer, a first inductor input, a second inductor input, and a plurality of through silicon vias coupling the plurality of segments of the first metal layer and the plurality of segments of the second metal layer to form a continuous, non-intersecting path between the first inductor input and the second inductor input. The inductors can have a symmetric or asymmetric geometry. The first metal layer can be a metal layer in the back-end-of-line section of the chip. The second metal layer can be located in the redistributed design layer of the chip.

2. 发明公开

EP2374151A1 PARALLEL PLANE MEMORY AND PROCESSOR COUPLING IN A 3-D MICRO-ARCHITECTURAL SYSTEM 审中-公开
标题翻译：平行平面内存和处理器联接而在微建筑3D系统
公开(公告)号：EP2374151A1
公开(公告)日：2011-10-12
申请号：EP09796885.3
申请日：2009-12-10
申请人： QUALCOMM Incorporated
发明人： TOMS, Thomas R.
IPC分类号： H01L25/18 , H01L25/065
CPC分类号： G06F13/42 , H01L25/0652 , H01L25/0657 , H01L25/18 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2924/0002 , H01L2924/00
摘要： An IC device (10) is constructed in a manner that allows for the memory (12), (13) and processor elements (11), (14) to be positioned one above the other on parallel planes of a 3-D structure. Interconnections (31), (32), (33) between the memory (s) and the processor (s) are accomplished by using through substrate stacking (TSS) techniques. This arrangement provides the processor with direct access to the memory by reducing the distance between the memory and the processor.

3. 发明公开

EP2347441A1 ELECTROSTATIC DISCHARGE (ESD) SHIELDING FOR STACKED ICS 审中-公开
标题翻译： SHIELD静电放电（ESD）FOR堆叠式IC
公开(公告)号：EP2347441A1
公开(公告)日：2011-07-27
申请号：EP09740237.4
申请日：2009-10-15
申请人： QUALCOMM Incorporated
发明人： TOMS, Thomas R. , JALILIZEINALI, Reza , GU, Shiqun
IPC分类号： H01L25/065 , H01L23/60
CPC分类号： H01L23/60 , H01L25/0657 , H01L2224/274 , H01L2924/01055 , H01L2924/12044
摘要： An unassembled stacked IC device (60) includes an unassembled tier. (41) The unassembled stacked IC device also includes a first unpatterned layer (610) on the unassembled tier. The first unpatterned layer protects the unassembled tier from ESD events.

4. 发明公开

EP2304792A1 ACTIVE THERMAL CONTROL FOR STACKED IC DEVICES 有权
标题翻译：主动热控制研究的堆叠式IC地层
公开(公告)号：EP2304792A1
公开(公告)日：2011-04-06
申请号：EP09770821.8
申请日：2009-06-19
申请人： QUALCOMM Incorporated
发明人： GU, Shiqun , NOWAK, Matthew , TOMS, Thomas R.
IPC分类号： H01L25/065 , H01L23/38
摘要： Thermal conductivity in a stacked IC device can be improved by constructing one or more active temperature control devices within the stacked IC device. In one embodiment, the control devices are thermal electric (TE) devices, such as Peltier devices. The TE devices can then be selectively controlled to remove or add heat, as necessary, to maintain the stacked IC device within a defined temperature range. The active temperature control elements can be P-N junctions created in the stacked IC device and can serve to move the heat laterally and/or vertically, as desired.

5. 发明公开

EP3694092A1 SYSTEM AND METHOD OF POWER DISTRIBUTION CONTROL OF AN INTEGRATED CIRCUIT 审中-实审
公开(公告)号：EP3694092A1
公开(公告)日：2020-08-12
申请号：EP20166805.0
申请日：2007-04-23
申请人： QUALCOMM Incorporated
发明人： CHUA-EOAN, Lew G. , ANDREEV, Boris , RIDDLE, Christopher C. , SHI, Chunlei , JUNG, Seong-ook , TOMS, Thomas R. , GAGNE, Justin Joseph Rosen
IPC分类号： H02M3/158 , H03K19/00 , H02M1/00
摘要： A device is disclosed that includes a first pin to supply power to a first power domain of an integrated circuit, a second pin to supply power to a second power domain of the integrated circuit and a controller, comprising a logic and a low drop out regulator. The controller is coupled to the first pin and to the second pin. The logic determines the operating mode and provides at least one control signal. The low drop out regulator is responsive to the logic to selectively reduce current flow to the second pin.

6. 发明授权

EP2025059B1 SYSTEM AND METHOD OF POWER DISTRIBUTION CONTROL OF AN INTEGRATED CIRCUIT 有权
公开(公告)号：EP2025059B1
公开(公告)日：2020-05-06
申请号：EP07761131.7
申请日：2007-04-23
申请人： Qualcomm Incorporated
发明人： CHUA-EOAN, Lew G. , ANDREEV, Boris , RIDDLE, Christopher C. c/o Qualcomm Incorporated , SHI, Chunlei , JUNG, Seong-ook , TOMS, Thomas R. , GAGNE, Justin Joseph Rosen
IPC分类号： H02M3/158 , H03K19/00 , H02M1/00

7. 发明公开

EP2025059A1 SYSTEM AND METHOD OF POWER DISTRIBUTION CONTROL OF AN INTEGRATED CIRCUIT 有权
标题翻译：系统在维也纳ZER ENERGIEVERTEILUNGSSTEUERUNG EINER INTEGRIERTEN SCHALTUNG
公开(公告)号：EP2025059A1
公开(公告)日：2009-02-18
申请号：EP07761131.7
申请日：2007-04-23
申请人： Qualcomm Incorporated
发明人： CHUA-EOAN, Lew G. , ANDREEV, Boris , RIDDLE, Christopher C. , SHI, Chunlei , JUNG, Seong-ook , TOMS, Thomas R. , GAGNE, Justin Joseph Rosen
IPC分类号： H03K19/00
摘要： A device is disclosed that includes a first pin to supply power to a first power domain of an integrated circuit, a second pin to supply power to a second power domain of the integrated circuit, a switching regulator and a controller. The switching regulator is coupled to the first pin to provide a first regulated power supply to the first power domain and is coupled to the second pin to provide a second regulated power supply to the second power domain. The controller is coupled to the first pin and to the second pin to selectively reduce current flow to at least the second pin during a low power event.
摘要翻译：公开了一种器件，其包括：向集成电路的第一电源域供电的第一引脚，向集成电路的第二电源域供电的第二引脚，开关稳压器和控制器。开关稳压器耦合到第一引脚以向第一功率域提供第一稳压电源，并且耦合到第二引脚以向第二功率域提供第二稳压电源。控制器耦合到第一引脚和第二引脚，以在低功率事件期间选择性地减少至少第二引脚的电流。

8. 发明授权

EP2486586B1 THREE DIMENSIONAL ON-CHIP RADIO-FREQUENCY AMPLIFIER 有权
公开(公告)号：EP2486586B1
公开(公告)日：2020-11-18
申请号：EP10771245.7
申请日：2010-10-07
申请人： Qualcomm Incorporated
发明人： KIM, Jonghae , GU, Shiqun , HENDERSON, Brian Matthew , TOMS, Thomas R. , CHUA-EOAN, Lew G. , BAZARJANI, Seyfollah S. , NOWAK, Matthew
IPC分类号： H01L21/02 , H01L23/522 , H01F17/00 , H01L27/06 , H01L23/48

9. 发明公开

EP2534687A2 SYSTEMS AND METHODS PROVIDING ARRANGEMENTS OF VIAS 审中-公开
标题翻译：系统和连续性安排方法
公开(公告)号：EP2534687A2
公开(公告)日：2012-12-19
申请号：EP11705745.5
申请日：2011-02-08
申请人： Qualcomm Incorporated
发明人： GU, Shiqun , NOWAK, Matthew Michael , LISK, Durodami J. , TOMS, Thomas R. , RAY, Urmi , SUH, Jungwon , CHANDRASEKARAN, Arvind
IPC分类号： H01L25/065 , H01L23/48 , H01L23/00 , H01L23/367 , H01L23/528 , H01L21/60 , H01L23/50
CPC分类号： H01L23/5286 , H01L23/3677 , H01L23/481 , H01L24/05 , H01L24/13 , H01L24/14 , H01L24/48 , H01L24/81 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/05093 , H01L2224/13009 , H01L2224/13025 , H01L2224/13028 , H01L2224/131 , H01L2224/14505 , H01L2224/16145 , H01L2224/16146 , H01L2224/17517 , H01L2224/48091 , H01L2224/48227 , H01L2224/81136 , H01L2224/81193 , H01L2224/81801 , H01L2225/06513 , H01L2225/06541 , H01L2225/06562 , H01L2924/00014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/014 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor chip includes an array of electrical contacts and multiple vias coupling at least one circuit in the semiconductor chip to the array of electrical contacts. A first one of the electrical contacts of the array of electrical contacts is coupled to N vias, and a second one of the electrical contacts of the array of electrical contacts is coupled to M vias. M and N are positive integers of different values.

10. 发明公开

EP2025060A2 SYSTEM AND METHOD OF SILICON SWITCHED POWER DELIVERY USING A PACKAGE 有权
标题翻译：系统在维也纳FÜRSILIZIUMGESCHALTETE LEISTUNGSZUFUHR MITTELSGEHÄUSE
公开(公告)号：EP2025060A2
公开(公告)日：2009-02-18
申请号：EP07797397.2
申请日：2007-05-09
申请人： Qualcomm Incorporated
发明人： CHUA-EOAN, Lew G. , TOMS, Thomas R. , ANDREEV, Boris Dimitrov , GAGNE, Justin Joseph Rosen , SHI, Chunlei
IPC分类号： H03K19/00
CPC分类号： H03K17/223 , H01L2924/0002 , H01L2924/00
摘要： In one particular embodiment, an integrated circuit includes a package and a substrate electrically and physically coupled to the package. The package includes a first pin, a second pin, and metallization coupling the first pin to the second pin. The substrate is coupled to the package via the first pin and the second pin. The substrate includes a plurality of power domains and a power control unit. The second pin of the package is coupled to a particular power domain of the plurality of power domains. The power control unit includes logic and a switch, where the switch includes a first terminal coupled to a voltage supply terminal, a control terminal coupled to the logic, and a second terminal coupled to the first pin of the package. The logic selectively activates the switch to distribute power to the particular power domain via the metallization of the package.
摘要翻译：在一个特定实施例中，集成电路包括电气和物理耦合到封装的封装和衬底。封装包括第一引脚，第二引脚和将第一引脚耦合到第二引脚的金属化。衬底经由第一引脚和第二引脚耦合到封装。基板包括多个电力域和功率控制单元。封装的第二引脚耦合到多个电源域的特定电源域。功率控制单元包括逻辑和开关，其中开关包括耦合到电压源端子的第一端子，耦合到逻辑电路的控制端子和耦合到封装的第一引脚的第二端子。该逻辑选择性地激活开关以通过封装的金属化将功率分配给特定的功率域。

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