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1. 发明公开

EP3072170A1 HIGH DENSITY LINEAR CAPACITOR 审中-公开
标题翻译：高密度线性电容
公开(公告)号：EP3072170A1
公开(公告)日：2016-09-28
申请号：EP14780735.8
申请日：2014-09-23
申请人： Qualcomm Incorporated
发明人： LEE, Bruce Sokki , BAZARJANI, Seyfollah Seyfollahi , DAI, Liang
IPC分类号： H01L49/02 , H01L23/522 , H01L27/07
CPC分类号： H01L27/0629 , H01L23/5223 , H01L27/0733 , H01L28/60 , H01L28/86 , H01L28/92 , H01L29/66795 , H01L2924/0002 , H01L2924/00
摘要： A methods for fabricating a capacitor structure includes fabricating polysilicon structures (PO) on a semiconductor substrate. The method further includes fabricating Ml to diffusion (MD) interconnects on the semiconductor substrate. The polysilicon structures are disposed in an interleaved arrangement with the MD interconnects. The method also includes selectively connecting the interleaved arrangement of the MD interconnects and/or the polysilicon structures as the capacitor structure.

2. 发明授权

EP3332484B1 CASCADED SWITCH BETWEEN PLURALITIES OF LNAS 有权
公开(公告)号：EP3332484B1
公开(公告)日：2019-08-21
申请号：EP16745913.0
申请日：2016-07-01
申请人： Qualcomm Incorporated
发明人： CHANG, Li-Chung , DAI, Liang , GUDEM, Prasad Srinivasa Siva
IPC分类号： H04B1/00

3. 发明公开

EP3262480A1 CALIBRATED TEMPERATURE SENSING SYSTEM 无效
标题翻译：校准温度传感系统
公开(公告)号：EP3262480A1
公开(公告)日：2018-01-03
申请号：EP16703415.6
申请日：2016-01-27
申请人： Qualcomm Incorporated
发明人： LU, Li , ROHAM, Masoud , DAI, Liang , MERUVA, Anand
IPC分类号： G05F3/22 , G01K7/00
CPC分类号： G01K19/00 , G01K7/01 , G01K7/22 , G01K15/005 , G05F3/225
摘要： Systems and methods for sensing temperature on a chip are described herein. In one aspect, a temperature sensing system includes a sensing circuit with matching diode devices for providing corresponding diode voltages proportional to currents through the diode devices. The system also includes a digital code calculation unit for generating a plurality of digital code values based on first and second reference voltages and the diode voltages and a digital calibration engine configured for computing a calibrated temperature based on the plurality of digital codes. The system further includes a switching circuit for routing the diode voltages, during first and second times, to diode voltage input terminals of the digital code calculation unit.

4. 发明授权

EP2115871B1 METHODS AND APPARATUS FOR DYNAMIC FREQUENCY SCALING OF PHASE LOCKED LOOPS FOR MICROPROCESSORS 有权
标题翻译：方法和设备，用于微处理器相位控制圈动态频率调整
公开(公告)号：EP2115871B1
公开(公告)日：2012-05-16
申请号：EP08727967.5
申请日：2008-01-18
申请人： QUALCOMM Incorporated
发明人： DAI, Liang , LEWIS, Brandon Wayne , BRIDGES, Jeffrey Todd , CHEN, Weihua
IPC分类号： H03L7/189
CPC分类号： H03L7/189 , H03L2207/06
摘要： A phase-locked loop employing a plurality of oscillator complexes is disclosed. The phase-locked loop includes a clock output and a plurality of oscillator complexes operable to generate output signals. The phase-locked loop further includes control logic which is configured to selectively couple an output signal of one of the plurality of oscillator complexes to the clock output.

5. 发明公开

EP2115871A1 METHODS AND APPARATUS FOR DYNAMIC FREQUENCY SCALING OF PHASE LOCKED LOOPS FOR MICROPROCESSORS 有权
标题翻译：方法和设备，用于微处理器相位控制圈动态频率调整
公开(公告)号：EP2115871A1
公开(公告)日：2009-11-11
申请号：EP08727967.5
申请日：2008-01-18
申请人： QUALCOMM Incorporated
发明人： DAI, Liang , LEWIS, Brandon Wayne , BRIDGES, Jeffrey Todd , CHEN, Weihua
IPC分类号： H03L7/189
CPC分类号： H03L7/189 , H03L2207/06
摘要： A phase-locked loop employing a plurality of oscillator complexes is disclosed. The phase-locked loop includes a clock output and a plurality of oscillator complexes operable to generate output signals. The phase-locked loop further includes control logic which is configured to selectively couple an output signal of one of the plurality of oscillator complexes to the clock output.

6. 发明授权

EP3278452B1 PUSH-PULL VOLTAGE DRIVER WITH LOW STATIC CURRENT VARIATION 有权
公开(公告)号：EP3278452B1
公开(公告)日：2018-10-03
申请号：EP16709248.5
申请日：2016-03-01
申请人： Qualcomm Incorporated
发明人： SONG, Yu , DAI, Liang
IPC分类号： H03F1/30 , H03F1/32 , H03F3/26 , H03F1/02
CPC分类号： H03K17/165 , H03F1/0233 , H03F1/307 , H03F1/3217 , H03F3/26
摘要： A push-pull driver is provided with a differential amplifier that amplifies a difference between an input voltage and an output voltage to drive a bias node coupled to a diode-connected bias transistor. The push-pull driver is configured to control the drain-to-source voltage for a source-follower output transistor having its gate tied to a gate for the diode-connected bias transistor to be proportional to the drain-to-source voltage for the diode-connected bias transistor. This proportionality prevents excessive static current variation that would otherwise be present in the source-follower output transistor.

7. 发明公开

EP3278452A1 PUSH-PULL VOLTAGE DRIVER WITH LOW STATIC CURRENT VARIATION 有权
标题翻译：具有低静态电流变化的推挽式电压驱动器
公开(公告)号：EP3278452A1
公开(公告)日：2018-02-07
申请号：EP16709248.5
申请日：2016-03-01
申请人： Qualcomm Incorporated
发明人： SONG, Yu , DAI, Liang
IPC分类号： H03F1/30 , H03F1/32 , H03F3/26 , H03F1/02
CPC分类号： H03K17/165 , H03F1/0233 , H03F1/307 , H03F1/3217 , H03F3/26
摘要： A push-pull driver is provided with a differential amplifier that amplifies a difference between an input voltage and an output voltage to drive a bias node coupled to a diode-connected bias transistor. The push-pull driver is configured to control the drain-to-source voltage for a source-follower output transistor having its gate tied to a gate for the diode-connected bias transistor to be proportional to the drain-to-source voltage for the diode-connected bias transistor. This proportionality prevents excessive static current variation that would otherwise be present in the source-follower output transistor.

8. 发明公开

EP3221966A1 LOW VOLTAGE, HIGHLY ACCURATE CURRENT MIRROR 审中-公开
标题翻译：低电压，高精度电流镜
公开(公告)号：EP3221966A1
公开(公告)日：2017-09-27
申请号：EP15790412.9
申请日：2015-10-23
申请人： Qualcomm Incorporated
发明人： ROHAM, Masoud , DAI, Liang
IPC分类号： H03F3/347 , G05F3/26 , G01R19/00 , H03F3/50
CPC分类号： G05F3/262 , G01R19/0092 , H03F3/347 , H03F3/505 , H03F2200/453 , H03F2200/456 , H03F2200/474 , H03F2200/91
摘要： Certain aspects of the present disclosure generally relate to a low voltage, accurate current mirror, which may be used for distributed sensing of a remote current in an integrated circuit (IC). One example current mirror typically includes a first pair of transistors, a second pair of transistors in cascode with the first pair of transistors, a switching network coupled to the second pair of transistors, and a third pair of transistors coupled to the switching network. An input node between the first and second pairs of transistors may be configured to receive an input current for the current mirror, and an output node at the first pair of transistors may be configured to sink an output current for the current mirror, proportional to the input current. This current mirror architecture offers a hybrid low-voltage/high-voltage solution, tolerates low input voltages, provides high output impedance, and offers low area and power consumption.
摘要翻译：本公开的某些方面一般涉及低电压精确电流镜，其可用于集成电路（IC）中远程电流的分布式感测。一个示例电流镜典型地包括第一对晶体管，与第一对晶体管共源共栅的第二对晶体管，耦合到第二对晶体管的开关网络以及耦合到开关网络的第三对晶体管。第一对晶体管和第二对晶体管之间的输入节点可以被配置为接收电流镜的输入电流，并且第一对晶体管的输出节点可以被配置为吸收电流镜的输出电流，输入电流。这种电流镜像架构提供混合低电压/高电压解决方案，能够承受低输入电压，提供高输出阻抗，并且具有较低的面积和功耗。

9. 发明公开

EP3353896A1 DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTER (ADC) WITH TIME-INTERLEAVED (TI) OR TWO-STEP SUCCESSIVE APPROXIMATION REGISTER (SAR) QUANTIZER 审中-公开
公开(公告)号：EP3353896A1
公开(公告)日：2018-08-01
申请号：EP16766119.8
申请日：2016-08-24
申请人： Qualcomm Incorporated
发明人： RAJAEE, Omid , HAN, Changsok , DAI, Liang , MIRHAJ, Seyed Arash , KIRAN, Ganesh
IPC分类号： H03M3/00 , H03M1/46 , H03M1/10
CPC分类号： H03M3/464 , H03M1/1023 , H03M1/46 , H03M3/37 , H03M3/422 , H03M3/47
摘要： Certain aspects of the present disclosure provide a delta-sigma modulator (DSM) using time-interleaved (TI) successive approximation register (SAR) analog-to-digital converters (ADCs). For example, two SAR ADCs may be configured to alternately sample and process an input signal and provide a feedback signal for the DSM using excess loop delay (ELD). In other aspects, the DSM may be implemented using a two-step SAR quantizer. For example, a first SAR ADC may sample an input signal to generate a most-significant bit (MSB) portion of an output of the DSM, while the second SAR ADC may subsequently sample a residue from the first SAR ADC conversion and generate a least-significant bit (LSB) portion of the output of the DSM. With these techniques, higher bandwidths may be obtained in high accuracy delta-sigma ADCs without using increased sampling rates.

10. 发明公开

EP3092539A1 CHARGE SHARING LINEAR VOLTAGE REGULATOR 有权
标题翻译： LINEARER SPANNUNGSREGLER MIT LASTVERTEILUNG
公开(公告)号：EP3092539A1
公开(公告)日：2016-11-16
申请号：EP15701618.9
申请日：2015-01-08
申请人： Qualcomm Incorporated
发明人： ROHAM, Masoud , ZHENG, Wei , DAI, Liang , ALLADI, Dinesh J. , GUO, Yuhua
IPC分类号： G05F1/575
CPC分类号： G05F1/56 , G05F1/575
摘要： Exemplary embodiments are related to voltage regulators. A device may include a first energy storage element coupled between a ground voltage and an output. The device may also include a second energy storage element coupled to the ground voltage and configured to selectively couple to the output. Further, the device may include a voltage regulator coupled between an input and the second energy storage element.
摘要翻译：示例性实施例涉及电压调节器。装置可以包括耦合在接地电压和输出之间的第一能量存储元件。该装置还可以包括耦合到接地电压并被配置为选择性地耦合到输出的第二能量存储元件。此外，该装置可以包括耦合在输入端和第二能量存储元件之间的电压调节器。

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