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1. 发明公开

EP3079256A1 ZERO DRIFT, LIMITLESS AND ADJUSTABLE REFERENCE VOLTAGE GENERATION 审中-公开
标题翻译：无线电无线电无线电
公开(公告)号：EP3079256A1
公开(公告)日：2016-10-12
申请号：EP16164181.6
申请日：2016-04-07
申请人： PR Electronics A/S
发明人： LINDEMANN, Stig Alnøe , MADSEN, Dan Vinge
IPC分类号： H03F3/45 , H03F1/34 , H02M3/157 , H03F3/34 , H03F3/347 , H03F3/393 , H03M1/82 , H03G3/30
CPC分类号： G05F1/468 , H02M3/157 , H03F3/347 , H03F3/393 , H03F3/45475 , H03F2200/135 , H03F2200/144 , H03F2200/156 , H03F2200/159 , H03F2200/165 , H03F2200/264 , H03F2200/297 , H03F2200/351 , H03F2200/372 , H03F2200/375 , H03F2200/528 , H03F2203/45512 , H03F2203/45526 , H03F2203/45528 , H03F2203/45531 , H03F2203/45534 , H03F2203/45536 , H03F2203/45594 , H03F2203/45631 , H03F2203/45701 , H03G3/3021 , H03K5/007 , H03K7/08 , H03M1/822
摘要： A circuit for generation of a reference voltage for an electronic system, which circuit comprises at least one digital buffer (U21, U31, U32, U41, U51), a low pass filter (R21, C21; R31, C31; R41, C41; R51, C51) and an operational amplifier (OA21, OA31, OA41, OA51)), which circuit is adapted to revive an input in the form of a bandgap reference voltage into the digital buffer, which digital buffer is adapted to receive a digital input from a Pulse Width Modulated (PWM) signal, which digital buffer is adapted to generate an output signal adapted to be fed to the low pass filter, which output signal after filtration is adapted to be fed to a positive input terminal of the operational amplifier, which operational amplifier comprises a feedback circuit, which feedback circuit comprises at least one capacitor (C22, C32, C44, C54) adapted to be connected from an output terminal of the operational amplifier towards a negative input terminal of the operational amplifier so as to form an integrator, wherein the feedback circuit further comprises at least one chopped signal path (R22, S21; R33, R34, S32; R33, R35, C35, S31), which chopped signal is adapted to be modulated by the output signal of the digital buffer.
摘要翻译：用于产生电子系统的参考电压的电路，该电路包括至少一个数字缓冲器（U21，U31，U32，U41，U51），低通滤波器（R21，C21; R31，C31; R41，C41; R51，C51）和运算放大器（OA21，OA31，OA41，OA51）），该电路适于将带隙参考电压形式的输入恢复到数字缓冲器中，该数字缓冲器适于接收数字输入来自脉宽调制（PWM）信号，该数字缓冲器适于产生适于馈送到低通滤波器的输出信号，滤波后的输出信号适于馈送到运算放大器的正输入端，该运算放大器包括反馈电路，该反馈电路包括适于从运算放大器的输出端子向运算放大器的负输入端连接的至少一个电容器（C22，C32，C44，C54），以形成一个整合其中所述反馈电路还包括至少一个斩波信号路径（R22，S21; R33，R34，S32; R33，R35，C35，S31），该斩波信号适于由数字缓冲器的输出信号进行调制。

2. 发明公开

EP2919386A1 HIGH-PERFORMANCE DIGITAL TO ANALOG CONVERTER 审中-公开
标题翻译： DIGITAL-ANALOGWANDLER MIT HOHER LEISTUNG
公开(公告)号：EP2919386A1
公开(公告)日：2015-09-16
申请号：EP15159122.9
申请日：2015-03-14
申请人： STMicroelectronics S.r.l.
发明人： Conte, Antonino , Giaquinta, Maria
IPC分类号： H03F3/45 , H03F1/34 , H03F3/347
CPC分类号： G11C16/06 , H03F1/34 , H03F3/347 , H03F3/45 , H03F3/45475 , H03F3/45977 , H03F2200/156 , H03F2200/375 , H03F2200/453 , H03F2203/45101 , H03F2203/45332 , H03F2203/45514 , H03F2203/45546 , H03F2203/45632 , H03M1/661
摘要： A digital-to-analog converter (115) is proposed. The digital-to-analog converter (115) comprises a conversion block (205) for receiving a digital value ( D D ) and providing a corresponding first analog value ( D A ), and an amplification block (210) for receiving said first analog value ( D A ) and providing a second analog value ( V P ) amplified by an amplification factor (G) with respect to said first analog value ( D A ). Said amplification block (210) comprises a first input terminal for receiving said first analog value ( D A ), a second input terminal, and an output terminal for providing said second analog value ( V P ). Said amplification block (210) further comprises a first capacitive element (C A ) having a first (T A1 ) and a second (T A2 ) terminals connected to the output terminal and the second input terminal, respectively, of the amplification block (210), and a second capacitive element (C B ) having a first (T B1 ) and a second (T B2 ) terminals connected to the second terminal (T A2 ) of the first capacitive element (C A ) and to a reference terminal, respectively, said first (C A ) and second (C B ) capacitive elements determining said amplification factor ( G ). Said amplification block (210) further comprises a circuit stage (C AR ,C BR ,S W1 -S W4 , 120 , ϕ 1 -ϕ 3 ) for recovering, at each predefined time period ( T R ) , an operative charge at the first terminal ( T B1 ) of said second capacitive element (C B ), and hence the second analog value ( V P ) to the output terminal of said amplification block (210).
摘要翻译：提出了一种数模转换器（115）。数模转换器（115）包括用于接收数字值（DD）并提供对应的第一模拟值（DA）的转换块（205），以及用于接收所述第一模拟值的放大块（210） DA），并提供相对于所述第一模拟值（DA）由放大因子（G）放大的第二模拟值（VP）。所述放大块（210）包括用于接收所述第一模拟值（D A）的第一输入端，第二输入端和用于提供所述第二模拟值（V P）的输出端。所述放大块（210）还包括具有分别连接到放大块（210）的输出端和第二输入端的第一（T A1）和第二（T A2）端的第一电容元件（CA）和具有分别连接到第一电容元件（CA）的第二端子（T A2）和参考端子的第一（T B1）和第二（T B2）端子的第二电容元件（CB），所述第二电容元件第一（CA）和第二（CB）电容元件确定所述放大因子（G）。所述放大块（210）还包括一个电路级（C AR，C BR，S W1 -S W4,120，...），用于在每个预定时间段（TR）恢复第一所述第二电容元件（CB）的端子（T B1），并且因此到所述放大块（210）的输出端的第二模拟值（VP）。

3. 发明公开

EP2409402A4 AMPLIFYING DRIVING UNIT USING GIANT MAGNETO RESISTANCE SENSOR AND DIAGNOSIS DEVICE USING THE SAME 审中-公开
标题翻译：与GMR传感器和诊断设备GAIN驱动单元
公开(公告)号：EP2409402A4
公开(公告)日：2012-12-26
申请号：EP10753723
申请日：2010-03-19
申请人： LG LIFE SCIENCES LTD
发明人： KIM YOUNG MUK , KIM JEONG RYUL , CHOI MAN HUE , LEE CHUNG WAN , YANG JI HYE , KANG MUN SUK
IPC分类号： H03F3/45 , A61B5/05 , B82Y25/00 , G01R33/09 , H03F3/347
CPC分类号： A61B5/055 , G01R33/093 , H01F10/325 , H03F3/347 , H03F3/45475 , H03F3/45928 , H03F3/45991 , H03F2200/261 , H03F2203/45101 , H03F2203/45152 , H03F2203/45154 , H03F2203/45581 , H03F2203/45596

4. 发明公开

EP2256580A3 Chopper stabilized bandgap reference circuit and methodology for voltage regulators 审中-公开
标题翻译：斩波器稳压带隙参考电路和电压调节器的方法
公开(公告)号：EP2256580A3
公开(公告)日：2011-05-11
申请号：EP10005284.4
申请日：2010-05-20
申请人： Linear Technology Corporation
发明人： Consoer, Kelly Joel
IPC分类号： G05F3/30 , H03F3/38
CPC分类号： G05F3/30 , H03F3/347 , H03F3/38 , Y10S323/907
摘要： A chopper stabilized bandgap voltage reference circuit comprises current mirror circuitry mirroring first and second currents into first and second networks to generate a forward diode voltage signal and a PTAT (proportional to absolute temperature) component signal, and a third current having a derived temperature coefficient into a third network to generate a reference voltage signal for a regulator. An amplifier amplifies a differential signal of the forward diode voltage signal and the PTAT component signal to output a fourth current to control the first and second currents. According to a chopper clock, a modulator modulates the differential signal to be supplied to the amplifier and a demodulator demodulates the fourth current. A gain loop compensation circuit is coupled to the demodulator to compensate the amplifier, and filter the fourth current for noise components, and a bypass circuit is also provided to the third network for filtering the third current.
摘要翻译：斩波器稳定的带隙电压基准电路包括电流镜电路，其将第一和第二电流镜像到第一和第二网络中以生成正向二极管电压信号和PTAT（与绝对温度成比例的）分量信号，以及第三电流，其具有导出的温度系数第三网络，用于为调节器生成参考电压信号。放大器放大正向二极管电压信号和PTAT分量信号的差分信号以输出第四电流以控制第一和第二电流。根据斩波时钟，调制器调制要提供给放大器的差分信号，解调器解调第四电流。增益环路补偿电路耦合到解调器以补偿放大器，并且过滤第四电流的噪声分量，并且还向第三网络提供旁路电路以过滤第三电流。

5. 发明公开

EP2251977A2 Low-noise, low-power, low drift offset correction in operational and instrumentation amplifiers 有权
标题翻译：低噪音，低功耗和低偏离的校正在操作和仪表放大器偏移
公开(公告)号：EP2251977A2
公开(公告)日：2010-11-17
申请号：EP10162279.3
申请日：2010-05-07
申请人： Number 14 B.V.
发明人： Eschauzier, Rudy , Van Rijn, Nico
IPC分类号： H03F3/347 , H03F3/45
CPC分类号： H03F3/45475 , H03F3/347 , H03F3/45968 , H03F2200/261 , H03F2203/45138 , H03F2203/45212
摘要： Low-noise, low-power, low drift offset correction in operational and instrumentation amplifiers and amplifiers using the same are disclosed. The amplifiers disclosed use different combinations of chopping and auto-zero techniques. Also disclosed are amplifiers using on-off switches (S1,S2) to affect the chopping and auto-zeroing, with unique circuits for driving the switches on the differential input to provide boot-strapped switch controls. Other features are disclosed.
摘要翻译：低噪声，低功率，低漂移使用相同的光盘偏移游离缺失在操作和仪表放大器和放大器的校正。放大器游离缺失盘使用斩波和自动调零技术的不同组合。所以圆盘游离缺失是使用放大器通断开关（S1，S2）以影响斩波和自动调零，以用于驱动的差动输入端的开关，以提供自举开关控制独特电路。其他功能游离缺失盘。

6. 发明公开

EP1977507A1 MULTIPLE-INPUT AND MULTIPLE-OUTPUT AMPLIFIER 审中-公开
标题翻译：具有多个输入多输出放大器
公开(公告)号：EP1977507A1
公开(公告)日：2008-10-08
申请号：EP06842372.2
申请日：2006-12-19
申请人： Excem
发明人： BROYDE, Frederic , CLAVELIER, Evelyne
IPC分类号： H03F3/21
CPC分类号： H03F3/211 , H03F1/327 , H03F1/34 , H03F3/347 , H03F3/50 , H03F3/68 , H03F2200/549
摘要： The invention relates to an amplifier capable of producing a plurality of currents at its output terminals, these currents being controlled by a plurality of input voltages. A multiple-input and multiple-output amplifier of the invention comprises 4 signal input terminals (11) (12) (13) (14), 4 signal output terminals (21) (22) (23) (24), 4 active sub-circuits (30) and a feedback network (40). Each active sub-circuit has a sub-circuit input terminal connected to one of the signal input terminals (11) (12) (13) (14), a sub-circuit output terminal connected to one of the signal output terminals (21) (22) (23) (24) and a sub-circuit common terminal. The feedback network (40) has terminals connected to the sub-circuit common terminal of each active sub-circuit (30). The feedback network (40) presents, in a known frequency band, an impedance matrix producing a negative feedback such that the transfer admittance matrix of the multiple-input and multiple-output amplifier approximates a given admittance matrix.

7. 发明公开

EP1762853A2 Device and method for determining a load current 审中-公开
标题翻译： Einrichtung und Verfahren zur Bestimmung vonLastströmen
公开(公告)号：EP1762853A2
公开(公告)日：2007-03-14
申请号：EP06076636.7
申请日：2006-08-29
申请人： Delphi Technologies, Inc.
发明人： Gose, Mark W. , Osborn, Douglas B.
IPC分类号： G01R19/00 , G01R31/00
CPC分类号： H03F3/347 , G01R19/0092 , H03F2200/321 , H03F2200/462
摘要： An integrated driver (200) with improved load current sense capability includes a first transistor (M1), a first amplifier (OA1), a second transistor (M3), a third transistor (M2), a second amplifier (OA2) and a fourth transistor (M4). The integrated driver (200) allows for significantly better fault handling capability, provides accurate thermal and current sensing capability and reduces I/O pin count over prior designs.
摘要翻译：具有改善的负载电流检测能力的集成驱动器（200）包括第一晶体管（M1），第一放大器（OA1），第二晶体管（M3），第三晶体管（M2），第二放大器（OA2）和第四晶体管（M4）。集成驱动器（200）允许显着更好的故障处理能力，提供精确的热和电流感测能力，并减少I / O引脚数量超过以前的设计。

8. 发明公开

EP1315289A4 POWER AMPLIFIER MODULE 有权
标题翻译：功率放大器模块
公开(公告)号：EP1315289A4
公开(公告)日：2005-08-10
申请号：EP01956962
申请日：2001-08-20
申请人： HITACHI LTD
发明人： YAMASHITA KIICHI , TANOUE TOMONORI , OHBU ISAO , SEKINE KENJI
IPC分类号： H03F1/02 , H03F1/30 , H03F1/52 , H03F3/19 , H03F3/21 , H03F3/24 , H03F3/347 , H04B1/04 , H04B1/3822 , H04B1/40
CPC分类号： H03F3/19 , H03F1/0261 , H03F1/302 , H03F3/347 , H03F2200/444
摘要： A high-efficiency power amplifier module having a high breakdown resistance and a function of preventing an amplifier device from breaking down because of the standing wave due to reflection from an antenna end when the load varies. When the load varies, the overcurrent flowing through the base of a final-stage amplifying section GaAs-HBT is detected and canceled to suppress the collector current. Therefore an increase of the output is prevented, and the GaAs-HBT is prevented from breaking down. By using both the function that the idling current decreases with an increase of the power supply voltage and the clipping function of a diode parallel connected to the output-stage GaAs-HBT, an overvoltage higher than necessary and an overcurrent larger than necessary are prevented from being applied to the output-stage GaAs-HBT. The breakdown resistance of the power amplifier module is improved, and the device breakdown when the load varies is prevented. The manufacturing variation of the current amplification factor of the GaAs-HBT and the influence of the temperature variation are reduced. Therefore manufacturing yield is high and the manufacturing cost is low.

9. 发明公开

EP1220444A1 Differential output amplifier arrangement 审中-公开
标题翻译： Differenzausgangsverstärkeranordnung
公开(公告)号：EP1220444A1
公开(公告)日：2002-07-03
申请号：EP00403709.9
申请日：2000-12-28
申请人： ALCATEL
发明人： Jeanjean, François , Verbist, Rudi
IPC分类号： H03F3/347 , H03F3/45
CPC分类号： H03F3/347
摘要： A differential output amplifier arrangement (DOA) comprises two operational amplifier (OA1, OA2) each having a feedback resistor (R2, R4). A pair of output resistors (R1, R3) couples the output terminals (OUT1, OUT2) of the operational amplifiers (OA1, OA2) to respective output terminals (ZOUTI, ZOUT2) of the arrangement (DOA), and a pair of input terminals (R7, R8) couples input terminals (IN1, IN2) of the arrangement (DOA) to negative polarity type input terminals (INN1, INN2) of the respective operational amplifiers (OA1, OA2). The positive polarity type input terminals (INP1, INP2) of the operational amplifiers (OA1, OA2) are grounded. Two additional resistors (R5, R6) cross-couple the output terminals (ZOUT1, ZOUT2) of the arrangement (DOA) to the negative polarity type input terminals (INN2, INN1) of the cross-coupled operational amplifiers (OA2, OA1).
摘要翻译：差分输出放大器装置（DOA）包括每个具有反馈电阻器（R2，R4）的两个运算放大器（OA1，OA2）。一对输出电阻器（R1，R3）将运算放大器（OA1，OA2）的输出端子（OUT1，OUT2）与装置（DOA）的各个输出端子（ZOUTI，ZOUT2）和一对输入端子（R7，R8）将配置（DOA）的输入端子（IN1，IN2）耦合到各个运算放大器（OA1，OA2）的负极型输入端子（INN1，INN2）。运算放大器（OA1，OA2）的正极性输入端子（INP1，INP2）接地。两个附加电阻器（R5，R6）将布置（DOA）的输出端子（ZOUT1，ZOUT2）交叉耦合到交叉耦合运算放大器（OA2，OA1）的负极型输入端子（INN2，INN1）。

10. 发明公开

EP0821474A1 Eingangsstufe für einen Transimpedanzverstärker 失效转让
标题翻译： EinangsstufefüreinenTransimpedanzverstärker
公开(公告)号：EP0821474A1
公开(公告)日：1998-01-28
申请号：EP97112722.0
申请日：1997-07-24
申请人： SIEMENS AKTIENGESELLSCHAFT
发明人： Herrle, Jürgen, Dipl.-Ing.
IPC分类号： H03F3/08 , H03F3/347
CPC分类号： H03F3/347 , H03F3/087
摘要： Schaltungsanordnung zur Erzeugung zweier symmetrischer Ausgangssignale aus einem unsymmetrischen Eingangssignal
Eingangsstufe für einen Transimpedanzverstärker mit einer invertierenden (I1 bis I4) und nichtinvertierenden (V1 bis V4) Verstärkerstufe, die jeweils durch ein zu einem unsymmetrischen Eingangssignal (E1 bis E4) proportionalen Signal (Sa2, Sb3) angesteuert werden und an deren Ausgängen zueinander symmetrische Signale (Sa1 bis Sa4, Sb1 bis Sb4) abnehmbar sind.
摘要翻译：输入级具有反相（I1-I3）和非反相（V1-V3）放大器级，每个由与非对称输入信号（E1-E4）成比例的信号驱动。可以从级的输出中抽取相互对称的信号（sa1-sa4，sb1-sb4）。反相和非反相级（I1，V1）可以在输入端并联连接。可以将同相和反相放大器级（V2，I2）串联连接，或者将两个反相放大器级（I3，I3'）串联连接。反相放大器级具有公共集电极晶体管（T1），随后是公共发射极晶体管，反相放大器级的输入和输出通过反馈电阻（R5）连接。

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