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1. 发明授权

EP2936691B1 DIVERSITY RECEIVER WITH SHARED LOCAL OSCILLATOR SIGNAL IN DIVERSITY MODE 有权转让
标题翻译：具有共享局部振荡器信号的多样性接收器在多样性模式下
公开(公告)号：EP2936691B1
公开(公告)日：2018-02-07
申请号：EP13821595.9
申请日：2013-12-20
申请人： Qualcomm Incorporated
发明人： GUDEM, Prasad Srinivasa Siva , LIU, Li , BOSSU, Frederic
IPC分类号： H04B1/00 , H04B7/08 , H04B1/26 , H03D7/14
CPC分类号： H03D7/1466 , H04B1/005 , H04B1/0064 , H04B7/0871 , Y02D70/40 , Y02D70/444
摘要： A multi-mode receiver is disclosed that is reconfigurable to share a local oscillator signal in diversity mode to save power consumption. In an exemplary embodiment, an apparatus includes a primary receiver having a primary mixer configured to down-convert a primary signal and a secondary mixer configured to down-convert a secondary signal in carrier aggregation mode. The apparatus also includes a supplemental mixer that uses a shared primary local oscillator (LO) signal generated by a shared primary frequency synthesizer in diversity mode to reduce power consumption. The apparatus further includes a controller configured to disable the secondary mixer and to enable the supplemental mixer to down-convert the secondary signal when operating in the diversity mode.

2. 发明公开

EP3116121A1 MIXER ARCHITECTURES 有权
标题翻译： MISCHERARCHITECTUREN
公开(公告)号：EP3116121A1
公开(公告)日：2017-01-11
申请号：EP16184401.4
申请日：2009-10-30
申请人： QUALCOMM Incorporated
发明人： KHATRI, Himanshu , LIU, Li
IPC分类号： H03D7/14
摘要： Techniques for designing a single-balanced mixer coupled to a dummy portion with a dummy load to improve noise rejection. In an aspect, a single-ended signal (RF) from a stage preceding the mixer, e.g., a low-noise amplifier (LNA), is coupled to the input of the single-balanced mixer to be mixed with a local oscillator (LO) signal. A dummy portion replicating the topology of the single-balanced mixer is coupled to the single-balanced mixer to improve noise rejection, with the LO signal also provided to the dummy portion. The input of the dummy portion may be coupled, e.g., to a dummy load, which is designed to replicate the loading characteristics of the preceding stage, e.g., the LNA.
摘要翻译：用于设计耦合到具有虚拟负载的虚拟部分以改善噪声抑制的单平衡混频器的技术。在一个方面，来自混频器之前的级（例如低噪声放大器（LNA））的单端信号（RF）耦合到单平衡混频器的输入端，以与本地振荡器（LO ）信号。将单平衡混频器的拓扑复制的虚拟部分耦合到单平衡混频器以改善噪声抑制，同时LO信号也提供给虚拟部分。虚拟部分的输入可以例如耦合到虚拟负载，其被设计为复制前一级的负载特性，例如LNA。

3. 发明授权

EP2294699B1 METHOD AND APPARATUS FOR PROCESSING A COMMUNICATION SIGNAL IN A RECEIVER 有权
标题翻译：方法和设备用于处理通信信号接收器
公开(公告)号：EP2294699B1
公开(公告)日：2016-09-14
申请号：EP09731682.2
申请日：2009-04-15
申请人： QUALCOMM Incorporated
发明人： GUDEM, Prasad, S. , CABANILLAS, Jose , CHANG, Li-Chung , LIU, Li
IPC分类号： H04B1/10
CPC分类号： H04B1/109 , H03F1/3205 , H03F1/3211 , H03F3/193 , H03F3/245

4. 发明公开

EP2371064A1 DUTY CYCLE ADJUSTMENT FOR A LOCAL OSCILLATOR SIGNAL 有权
标题翻译：本地振荡器信号的占空比调整
公开(公告)号：EP2371064A1
公开(公告)日：2011-10-05
申请号：EP09760441.7
申请日：2009-11-25
申请人： QUALCOMM Incorporated
发明人： PANIKKATH, Vinod, V. , LIU, Li
IPC分类号： H03L7/08
CPC分类号： H03K5/1565 , H03K3/017 , H03L7/08
摘要： A local oscillator (LO) module comprises a local oscillator and a feedback circuit. The local oscillator, biased at a supply voltage, generates a local oscillator signal having a duty cycle. The feedback circuit makes an absolute adjustment of the duty cycle of the local oscillator signal in response to a difference between a first voltage signal, representing a voltage level of the local oscillator signal, and a second voltage signal, representing a voltage level of a portion of the supply voltage corresponding to a desired duty cycle for the local oscillator signal.
摘要翻译：本地振荡器（LO）模块包括本地振荡器和反馈电路。偏置在电源电压的本地振荡器产生具有占空比的本地振荡器信号。响应于表示本地振荡器信号的电压电平的第一电压信号与表示本地振荡器信号的电压电平的第二电压信号之间的差异，反馈电路对本地振荡器信号的占空比进行绝对调整的电源电压对应于本地振荡器信号的期望占空比。

5. 发明公开

EP2351208A2 MIXER ARCHITECTURES 有权
标题翻译：混合器架构
公开(公告)号：EP2351208A2
公开(公告)日：2011-08-03
申请号：EP09749276.3
申请日：2009-10-30
申请人： QUALCOMM Incorporated
发明人： KHATRI, Himanshu , LIU, Li
IPC分类号： H03D7/14
CPC分类号： H03D7/1441 , H03D7/1433 , H03D7/1466 , H03D2200/0043
摘要： Techniques for designing a single-balanced mixer coupled to a dummy portion with a dummy load to improve noise rejection. In an aspect, a single-ended signal (RF) from a stage preceding the mixer, e.g., a low-noise amplifier (LNA), is coupled to the input of the single-balanced mixer to be mixed with a local oscillator (LO) signal. A dummy portion replicating the topology of the single-balanced mixer is coupled to the single-balanced mixer to improve noise rejection, with the LO signal also provided to the dummy portion. The input of the dummy portion may be coupled, e.g., to a dummy load, which is designed to replicate the loading characteristics of the preceding stage, e.g., the LNA.
摘要翻译：用虚拟负载设计耦合到虚拟部分的单平衡混频器以改善噪声抑制的技术。在一个方面，来自混频器之前的级（例如低噪声放大器（LNA））的单端信号（RF）耦合到单平衡混频器的输入端以与本地振荡器（LO ）信号。复制单平衡混频器的拓扑结构的虚拟部分耦合到单平衡混频器以改善噪声抑制，LO信号也提供给虚拟部分。虚设部分的输入可以例如耦合到虚设负载，虚设负载被设计为复制前级的负载特性，例如LNA。

6. 发明公开

EP4393065A1 DOHERTY TRANSCEIVER INTERFACE 审中-实审
公开(公告)号：EP4393065A1
公开(公告)日：2024-07-03
申请号：EP22777796.8
申请日：2022-08-30
申请人： QUALCOMM INCORPORATED
发明人： WANG, Chuan , LIU, Li , ASURI, Bhushan Shanti , SAHOTA, Gurkanwal Singh , BELLAOUAR, Abdellatif , PANIKKATH, Vinod
IPC分类号： H04B1/38 , H03F1/02 , H03F3/24 , H04B1/48 , H03F3/72
CPC分类号： H03F2200/45120130101 , H03F1/0288 , H03F3/72 , H03F3/24 , H03F2200/53720130101 , H03F2200/29420130101 , H04B1/38 , H04B1/48

7. 发明授权

EP2973998B1 PHASE DETECTION AND CORRECTION FOR A LOCAL OSCILLATOR GENERATOR OPERATING IN A NON-CONTINUOUS MANNER 有权
标题翻译：以非连续方式工作的局部振荡发生器的相位检测和校正
公开(公告)号：EP2973998B1
公开(公告)日：2017-05-10
申请号：EP14715750.7
申请日：2014-03-07
申请人： Qualcomm Incorporated
发明人： LIU, Li , SAMPATH, Praveen-Kumar , LEUNG, Lai Kan , NARATHONG, Chiewcharn , LAU, Soon-Seng , HUMNABADKAR, Ketan , CHALLA, Raghu Narayan , GODBOLE, Devavrata Vasant
IPC分类号： H03D3/00 , H03B21/01 , H04W52/02
CPC分类号： H04L7/0331 , H03B21/01 , H03D3/009 , H04W52/02 , H04W52/0209 , Y02D70/1222 , Y02D70/1262 , Y02D70/142 , Y02D70/144 , Y02D70/164
摘要： Techniques for detecting and correcting phase discontinuity of a local oscillator (LO) signal are disclosed. In one design, a wireless device includes an LO generator and a phase detector. The LO generator generates an LO signal used for frequency conversion and is periodically powered on and off. The phase detector detects the phase of the LO signal when the LO generator is powered on. The detected phase of the LO signal is used to identify phase discontinuity of the LO signal. The wireless device may further include (i) a single-tone generator that generates a single-tone signal used to detect the phase of the LO signal, (ii) a downconverter that downconverts the single-tone signal with the LO signal and provides a downconverted signal used by the phase detector to detect the phase of LO signal, and (iii) phase corrector that corrects phase discontinuity of the LO signal in the analog domain or digital domain.
摘要翻译：公开了用于检测和校正本地振荡器（LO）信号的相位不连续性的技术。在一种设计中，无线设备包括LO发生器和相位检测器。 LO发生器产生用于频率转换的LO信号并周期性地开启和关闭。当LO发生器通电时，相位检测器检测LO信号的相位。 LO信号的检测到的相位用于识别LO信号的相位不连续性。该无线设备可以进一步包括（i）产生用于检测LO信号的相位的单音信号的单音产生器，（ii）下变频器，用LO信号下变频单音信号并提供由相位检测器用于检测LO信号的相位的下变频信号，以及（iii）校正模拟域或数字域中的LO信号的相位不连续性的相位校正器。

8. 发明授权

EP2351208B1 MIXER ARCHITECTURES 有权
标题翻译：混合器架构
公开(公告)号：EP2351208B1
公开(公告)日：2016-09-28
申请号：EP09749276.3
申请日：2009-10-30
申请人： QUALCOMM Incorporated
发明人： KHATRI, Himanshu , LIU, Li
IPC分类号： H03D7/14
CPC分类号： H03D7/1441 , H03D7/1433 , H03D7/1466 , H03D2200/0043

9. 发明公开

EP2974028A1 LOCAL OSCILLATOR (LO) GENERATOR WITH MULTI-PHASE DIVIDER AND PHASE LOCKED LOOP 审中-公开
标题翻译：采用了一块和多相位锁相环机振荡发生器
公开(公告)号：EP2974028A1
公开(公告)日：2016-01-20
申请号：EP14715181.5
申请日：2014-03-11
申请人： Qualcomm Incorporated
发明人： LIU, Li , NARATHONG, Chiewcharn
IPC分类号： H03L7/18
CPC分类号： H04B1/16 , H03L7/099 , H03L7/18
摘要： In one design, an apparatus includes an oscillator, a divider, and a phase locked loop (PLL). The oscillator receives a control signal and provides an oscillator signal having a frequency determined by the control signal. The divider receives the oscillator signal and generates multiple divided signals of different phases. The PLL receives a reference signal and a selected divided signal and generates the control signal for the oscillator. The divider is powered on and off periodically and wakes up in one of multiple possible states, with each state being associated with a different phase of the selected divided signal. Phase continuity of the selected divided signal is ensured by using the divider as part of the PLL. The PLL locks the selected divided signal to the reference signal, and the selected divided signal has continuous phase due to the reference signal having continuous phase.

10. 发明公开

EP2974020A1 CURRENT-MODE BUFFER WITH OUTPUT SWING DETECTOR FOR HIGH FREQUENCY CLOCK INTERCONNECT 审中-公开
标题翻译： STR US ER ER UNG UNG UNG UNG UNG UNG UNG UNG UNG UNG UNG UNG UNG UNG UNG UNG UNG UNG UNG UNG UNG
公开(公告)号：EP2974020A1
公开(公告)日：2016-01-20
申请号：EP14715182.3
申请日：2014-03-11
申请人： Qualcomm Incorporated
发明人： PARK, Dongmin , LIU, Li , RONG, Sujiang
IPC分类号： H03K5/08 , H03K6/02
CPC分类号： H03K5/08 , H03K6/02
摘要： A high-speed current-mode clock driver includes feedback circuitry to maintain the voltage swing of a biasing node within a defined range. The current-mode clock driver includes a PMOS and an NMOS transistor receiving an oscillating signal at their gate terminals. The drain terminals of the PMOS and NMOS transistors are respectively coupled to input terminals of first and second variable conductivity circuits whose output terminals are coupled to a common node. A control circuit increases the conductivities of the first and second variable conductivity circuits in response to decreases in voltage swing of the common node, and decreases the conductivities of the first and second variable conductivity circuits in response to increases in voltage swing of the common node. The first and second variable conductivity circuits are optionally PMOS and NMOS transistors respectively.
摘要翻译：高速电流模式时钟驱动器包括反馈电路，以将偏置节点的电压摆幅保持在限定的范围内。电流模式时钟驱动器包括在其栅极端子处接收振荡信号的PMOS和NMOS晶体管。 PMOS和NMOS晶体管的漏极端子分别耦合到输出端耦合到公共节点的第一和第二可变电导率电路的输入端。控制电路响应于公共节点的电压摆幅的减小而增加第一和第二可变电导率电路的电导率，并且响应于公共节点的电压摆幅的增加而降低第一和第二可变电导率电路的电导率。第一和第二可变电导率电路分别是PMOS和NMOS晶体管。

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