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1. 发明公开

EP3137988A1 TECHNIQUES FOR SERIALIZED EXECUTION IN A SIMD PROCESSING SYSTEM 有权
标题翻译： EINEM SIMD-VERARBEITUNGSSYSTEM中的技术ZUR SERIALISIERTEN AUSFHHUNG
公开(公告)号：EP3137988A1
公开(公告)日：2017-03-08
申请号：EP15719929.0
申请日：2015-04-10
申请人： Qualcomm Incorporated
发明人： GRUBER, Andrew Evan , CHEN, Lin , DU, Yun , BOURD, Alexei Vladimirovich
IPC分类号： G06F9/38
摘要： A SIMD processor may be configured to determine one or more active threads from a plurality of threads, select one active thread from the one or more active threads, and perform a divergent operation on the selected active thread. The divergent operation may be a serial operation.
摘要翻译： SIMD处理器可以被配置为从多个线程确定一个或多个活动线程，从一个或多个活动线程中选择一个活动线程，并对所选择的活动线程执行发散操作。发散操作可以是串行操作。

2. 发明授权

EP3120245B1 HARDWARE-BASED ATOMIC OPERATIONS FOR SUPPORTING INTER-TASK COMMUNICATION 有权
公开(公告)号：EP3120245B1
公开(公告)日：2020-10-21
申请号：EP15713056.8
申请日：2015-03-05
申请人： Qualcomm Incorporated
发明人： BOURD, Alexei Vladimirovich , SAKHARSHETE, Swapnil Pradipkumar , XU, Fei
IPC分类号： G06F9/52 , G06F9/54

3. 发明授权

EP3044754B1 FAULT-TOLERANT PREEMPTION MECHANISM AT ARBITRARY CONTROL POINTS FOR GRAPHICS PROCESSING 有权
标题翻译：图形处理任意控制点的容错预取机制
公开(公告)号：EP3044754B1
公开(公告)日：2018-01-17
申请号：EP14777214.9
申请日：2014-09-05
申请人： Qualcomm Incorporated
发明人： FRASCATI, Christopher Paul , BALCI, Murat , SEETHARAMAIAH, Avinash , GRUBER, Andrew Evan , BOURD, Alexei Vladimirovich
IPC分类号： G06T1/20 , G06T1/60 , G06F9/48
CPC分类号： G09G5/399 , G06F9/46 , G06F9/4843 , G06F2209/483 , G06F2209/509 , G06T1/20 , G06T1/60
摘要： This disclosure presents techniques and structures for preemption at arbitrary control points in graphics processing. A method of graphics processing may comprise executing commands in a command buffer, the commands operating on data in a read-modify-write memory resource, double buffering the data in the read-modify-write memory resource, such that a first buffer stores original data of the read-modify-write memory resource and a second buffer stores any modified data produced by executing the commands in the command buffer, receiving a request to preempt execution of the commands in the command buffer before completing all commands in the command buffer, and restarting execution of the commands at the start of the command buffer using the original data in the first buffer.

4. 发明公开

EP4085328A1 METHODS AND APPARATUS TO PERFORM MATRIX MULTIPLICATION IN A STREAMING PROCESSOR 审中-公开
公开(公告)号：EP4085328A1
公开(公告)日：2022-11-09
申请号：EP20845758.0
申请日：2020-12-30
申请人： QUALCOMM INCORPORATED
发明人： DU, Yun , ZHONG, Gang , WEI, Fei , ZHANG, Yibin , HAN, Jing , SHANG, Hongjiang , KAMENETSKAYA, Elina , HUANG, Minjie , BOURD, Alexei Vladimirovich , YU, Chun , GRUBER, Andrew Evan , DEMERS, Eric
IPC分类号： G06F9/30 , G06F9/38

5. 发明公开

EP3485385A1 SHUFFLER CIRCUIT FOR LANE SHUFFLE IN SIMD ARCHITECTURE 有权
公开(公告)号：EP3485385A1
公开(公告)日：2019-05-22
申请号：EP17726175.7
申请日：2017-05-19
申请人： Qualcomm Incorporated
发明人： HAN, Liang , JIN, Xiangdong , CHEN, Lin , DU, Yun , BOURD, Alexei Vladimirovich
IPC分类号： G06F13/40 , G06F15/80 , G06F9/38
摘要： Techniques are described to perform a shuffle operation. Rather than using an all-lane to all-lane cross bar, a shuffler circuit having a smaller cross bar is described. The shuffler circuit performs the shuffle operation piecewise by reordering data received from processing lanes and outputting the reordered data.

6. 发明公开

EP3408741A1 ADAPTIVE CONTEXT SWITCHING 审中-公开
公开(公告)号：EP3408741A1
公开(公告)日：2018-12-05
申请号：EP16871796.5
申请日：2016-12-13
申请人： Qualcomm Incorporated
发明人： ACHARYA, Anirudh Rajendra , BOURD, Alexei Vladimirovich , GARCIA GARCIA, David Rigel , NEMLEKAR, Milind Nilkanth , GOEL, Vineet
IPC分类号： G06F9/48
CPC分类号： G06T1/20 , G06F9/4843 , G06F9/4887 , G06T2200/28
摘要： A graphics processing unit (GPU) may dispatch a first set of commands for execution on one or more processing units of the GPU. The GPU may receive notification from a host device indicating that a second set of commands are ready to execute on the GPU. In response, the GPU may issue a first preemption command at a first preemption granularity to the one or more processing units. In response to the GPU failing to preempt execution of the first set of commands within an elapsed time period after issuing the first preemption command, the GPU may issue a second preemption command at a second preemption granularity to the one or more processing units, where the second preemption granularity is finer-grained than the first preemption granularity.

7. 发明公开

EP3053038A1 GPU DIVERGENCE BARRIER 有权
标题翻译： GPU-DIVERGENZ-BARRIERE
公开(公告)号：EP3053038A1
公开(公告)日：2016-08-10
申请号：EP14772523.8
申请日：2014-09-10
申请人： Qualcomm Incorporated
发明人： MEI, Chunhui , BOURD, Alexei Vladimirovich , CHEN, Lin
IPC分类号： G06F9/52
摘要： A device includes a memory, and at least one programmable processor configured to determine, for each warp of a plurality of warps, whether a Boolean expression is true for a corresponding thread of each warp, pause execution of each warp having a corresponding thread for which the expression is true, determine a number of active threads for each of the plurality of warps for which the expression is true, sort the plurality of warps for which the expression is true based on the number of active threads in each of the plurality of warps, swap thread data of an active thread of a first warp of the plurality of warps with thread data of an inactive thread of a second warp of the plurality of warps, and resume execution of the at least one of the plurality of warps for which the expression is true.
摘要翻译：一种设备包括存储器，以及至少一个可编程处理器，其被配置为针对多个经线的每个翘曲确定布线表达式对于每个翘曲的相应线程是否为真，每个经线的暂停执行具有对应的线程，表达式是真实的，确定表达式为真的多个经线中的每一个的多个活动线程，基于多个经线中的每一个中的活动线程的数量对表达式为真的多个经线进行排序利用多个经纱中的第二扭曲的非活动线程的线数据交换多个经纱中的第一翘曲的活动线程的线数据，并且恢复多个经线中的至少一个经线的执行，表达是真实的。

8. 发明授权

EP3485385B1 SHUFFLER CIRCUIT FOR LANE SHUFFLE IN SIMD ARCHITECTURE 有权
公开(公告)号：EP3485385B1
公开(公告)日：2020-04-22
申请号：EP17726175.7
申请日：2017-05-19
申请人： Qualcomm Incorporated
发明人： HAN, Liang , JIN, Xiangdong , CHEN, Lin , DU, Yun , BOURD, Alexei Vladimirovich
IPC分类号： G06F13/40 , G06F15/80 , G06F9/38 , G06F9/30

9. 发明公开

EP3449368A1 INTER-SUBGROUP DATA SHARING 有权
公开(公告)号：EP3449368A1
公开(公告)日：2019-03-06
申请号：EP17711835.3
申请日：2017-02-27
申请人： Qualcomm Incorporated
发明人： BOURD, Alexei Vladimirovich , SHIMANSKIY, Vladislav , KAZAKOV, Maxim , DU, Yun
IPC分类号： G06F9/52

10. 发明公开

EP4241230A1 METHODS AND APPARATUS FOR RASTERIZATION OF COMPUTE WORKLOADS 审中-实审
公开(公告)号：EP4241230A1
公开(公告)日：2023-09-13
申请号：EP20960468.5
申请日：2020-11-09
申请人： QUALCOMM INCORPORATED
发明人： ZHANG, Yibin , YING, Zilin , DU, Yun , QI, Heng , YU, Jiexia , YU, Yang , GRUBER, Andrew, Evan , LIANG, Jian , WANG, Tao , BOURD, Alexei Vladimirovich , ZHONG, Gang , HUANG, Minjie
IPC分类号： G06T1/00

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