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1. 发明授权

EP3120245B1 HARDWARE-BASED ATOMIC OPERATIONS FOR SUPPORTING INTER-TASK COMMUNICATION 有权
公开(公告)号：EP3120245B1
公开(公告)日：2020-10-21
申请号：EP15713056.8
申请日：2015-03-05
申请人： Qualcomm Incorporated
发明人： BOURD, Alexei Vladimirovich , SAKHARSHETE, Swapnil Pradipkumar , XU, Fei
IPC分类号： G06F9/52 , G06F9/54

2. 发明公开

EP3120245A1 HARDWARE-BASED ATOMIC OPERATIONS FOR SUPPORTING INTER-TASK COMMUNICATION 有权
标题翻译：五金工具操作员ZURUNTERSTÜTZUNGVON KOMMUNIKATIONEN ZWISCHEN TASKS
公开(公告)号：EP3120245A1
公开(公告)日：2017-01-25
申请号：EP15713056.8
申请日：2015-03-05
申请人： Qualcomm Incorporated
发明人： BOURD, Alexei Vladimirovich , SAKHARSHETE, Swapnil Pradipkumar , XU, Fei
IPC分类号： G06F9/52 , G06F9/54
摘要： This disclosure describes techniques for supporting inter-task communication in a parallel computing system. The techniques for supporting inter-task communication may use hardware-based atomic operations to maintain the state of a pipe. A pipe may refer to a First-In, First-Out (FIFO)-organized buffer that allows various tasks to interact with the buffer as data producers or data consumers. Various pipe implementations may use multiple state parameters to define the state of a pipe. The hardware-based atomic operations described in this disclosure may modify multiple pipe state parameters in an atomic fashion. Modifying multiple pipe state parameters in an atomic fashion may avoid race conditions that would otherwise occur when multiple producers and/or multiple consumers attempt to modify the state of a pipe at the same time. In this way, pipe-based inter-task communication may be supported in a parallel computing system.
摘要翻译：本公开描述了用于支持并行计算系统中的任务间通信的技术。用于支持任务间通信的技术可以使用基于硬件的原子操作来维持管道的状态。管道可以指先入先出（FIFO）组织的缓冲器，其允许各种任务与缓冲器作为数据生成器或数据消费者进行交互。各种管道实现可以使用多个状态参数来定义管道的状态。本公开中描述的基于硬件的原子操作可以以原子方式修改多个管状态参数。以原子方式修改多个管道状态参数可以避免当多个生产者和/或多个消费者试图同时修改管道状态时会发生的竞争条件。以这种方式，可以在并行计算系统中支持基于管道的任务间通信。

3. 发明授权

EP2926257B1 MEMORY MANAGEMENT USING DYNAMICALLY ALLOCATED DIRTY MASK SPACE 失效
公开(公告)号：EP2926257B1
公开(公告)日：2019-06-26
申请号：EP13786863.4
申请日：2013-10-28
申请人： Qualcomm Incorporated
发明人： LIANG, Jian , YU, Chun , XU, Fei
IPC分类号： G06F12/0886 , G06F12/0804 , G06F12/0895 , G06F12/0891

4. 发明公开

EP2926257A1 MEMORY MANAGEMENT USING DYNAMICALLY ALLOCATED DIRTY MASK SPACE 失效
标题翻译：内存管理使用动态ALLOCATED脏遮挡区域
公开(公告)号：EP2926257A1
公开(公告)日：2015-10-07
申请号：EP13786863.4
申请日：2013-10-28
申请人： Qualcomm Incorporated
发明人： LIANG, Jian , YU, Chun , XU, Fei
IPC分类号： G06F12/08
CPC分类号： G06F12/0891 , G06F12/0804 , G06F12/0886 , G06F12/0895 , G06F2212/604
摘要： A cache memory system includes a cache memory including a plurality of cache memory lines and a dirty buffer including a plurality of dirty masks. A cache controller is configured to allocate one of the dirty masks to each of the cache memory lines when a write to the respective cache memory line is not a full write to that cache memory line. Each of the dirty masks indicates dirty states of data units in one of the cache memory lines. The cache controller may include a dirty buffer index which stores an identification (ID) information that associates the dirty masks with the cache memory lines to which the dirty masks are allocated. A cache line may include a fully dirty flag indicating when each byte in that cache line is dirty, so that a dirty mask does not need to be allocated for that cache line.

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