会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 5. 发明公开
    • Signal modulation circuit
    • Signalmodulationsschaltung
    • EP2899889A1
    • 2015-07-29
    • EP15150016.2
    • 2015-01-02
    • Onkyo Corporation
    • Nakanishi, YoshinoriKawaguchi, TsuyoshiSekiya, Mamoru
    • H03M3/00H03F3/217
    • H03M3/324H03M3/348H03M3/358H03M3/42
    • Provided is a circuit which can correct an output state in real time and reduce influences of distortion/noise components generated by a delay device. A signal modulation circuit includes a subtracter, an integrator, a phase inverting circuit, a DFF for while inserting a zero level at timing synchronous with the clock signal, delaying and quantizing the signal, a ternary signal generating circuit for generating a ternary signal for selectively driving a load connected to a single power supply into ternary conductive states including a positive current on-state, a negative current on-state, and an off-state, a driver circuit for generating a driving signal for driving a load, and a feedback circuit for feeding back the driving signal from the driver circuit to the input signal.
    • 提供了可以实时校正输出状态并减少由延迟装置产生的失真/噪声分量的影响的电路。 信号调制电路包括减法器,积分器,相位反相电路,用于在与时钟信号同步的定时插入零电平的DFF,延迟和量化信号的三态信号发生电路,用于选择性地产生三态信号 将连接到单个电源的负载驱动为包括正电流导通状态,负电流导通状态和截止状态的三态导通状态,用于产生用于驱动负载的驱动信号的驱动电路和反馈 用于将驱动电路的驱动信号反馈到输入信号的电路。
    • 7. 发明公开
    • Pulse synthesizing circuit
    • 脉冲合成电路
    • EP2814175A1
    • 2014-12-17
    • EP14169999.1
    • 2014-05-27
    • Onkyo Corporation
    • Nakanishi, YoshinoriKawaguchi, TsuyoshiSekiya, Mamoru
    • H03K19/0944H03M5/16H04L25/49
    • H03K19/0002H03K19/09443H03K19/21H03M3/30H04L25/4923H04L25/4925
    • A circuit having versatility synthesizes one-bit digital signals to generate a ternary signal. The pulse synthesizing circuit synthesizes one-bit digital signals from two DFFs to generate a ternary signal. The pulse synthesizing circuit has a first NOR gate, a second NOR gate, a third NOR gate, and three switches. The first switch is connected to a first electric potential, the second switch is connected to a second electric potential, and the third switch is connected to a third electric potential. The first to third switches are turned on/off according to logical values of the signals from the two DFFs, and any of the first electric potential, the second electric potential, and the third electric potential is set as an output potential so that a ternary signal is generated.
    • 具有多功能性的电路合成一位数字信号以生成三元信号。 脉冲合成电路合成来自两个DFF的一位数字信号以产生三元信号。 脉冲合成电路具有第一或非门,第二或非门,第三或非门以及三个开关。 第一开关连接到第一电位,第二开关连接到第二电位,并且第三开关连接到第三电位。 第一至第三开关根据来自两个DFF的信号的逻辑值被导通/截止,并且第一电位,第二电位和第三电位中的任一个被设置为输出电位,使得三元 信号被生成。
    • 8. 发明公开
    • Amplifying device
    • 放大器
    • EP2701305A1
    • 2014-02-26
    • EP13180175.5
    • 2013-08-13
    • Onkyo Corporation
    • Kawaguchi, Tsuyoshi
    • H03F3/217H03F3/68H03F3/72H04S3/00
    • H03F21/00H03F3/217H03F3/68H03F3/72H04S3/008
    • An amplifying device is provided that reduces power consumption and quickly starts amplification of an audio signal of a channel to be used. A control section 17 inputs a control signal for instructing operation or standby into post-amplifying sections 11b and 12b, and inputs a control signal for instructing standby to post-amplifying sections 13b and 14b. In the post-amplifying section 11b, when the control signal for instructing standby or operation is input from the control section 17, a modulation circuit 52 modulates the analog audio signal into a switching signal. An output stage circuit 54 amplifies the output signal. When the control signal for instructing the operation is input from the control section 17, a driving circuit 53 drives the output stage circuit 54 in response to the switching signal, and stops the driving of the output stage circuit 54 when the control signal for instructing standby is input.
    • 提供了一种放大装置,其降低了功耗,并且快速开始放大要使用的频道的音频信号。 控制部分17将用于指示操作或待机的控制信号输入到后置放大部分11b和12b,并将用于指示待机的控制信号输入到后置放大部分13b和14b。 在后放大部分11b中,当从控制部分17输入用于指示待机或操作的控制信号时,调制电路52将模拟音频信号调制为切换信号。 输出级电路54放大输出信号。 当从控制部17输入用于指示操作的控制信号时,驱动电路53响应于切换信号来驱动输出级电路54,并且当用于指示待机的控制信号时停止输出级电路54的驱动 被输入。
    • 9. 发明公开
    • Amplifying circuit
    • 放大电路
    • EP2424106A3
    • 2012-07-04
    • EP11173792.0
    • 2011-07-13
    • Onkyo Corporation
    • Kawaguchi, TsuyoshiKitagawa, NorimasaSekiya, MamoruShimasaki, Naofumi
    • H03F3/30H03F3/343H03F1/34H03F1/52
    • H03F3/3076H03F1/34H03F1/52H03F3/3066H03F3/3435H03F2203/30031H03F2203/30084H03F2203/30117
    • An amplifying circuit comprises: a first transistor, a second transistor, a third transistor and a fourth transistor provided in an input stage; and a first bias circuit. The input signal is input into a control terminal of the first transistor and a control terminal of the second transistor, a first terminal of the first transistor is connected to a first terminal of the third transistor, a first terminal of the second transistor is connected to a first terminal of the fourth transistor, a second terminal of the first transistor is connected to a first potential, a second terminal of the second transistor is connected to a second potential that is equal to or different from the first potential, a second terminal of the third transistor is connected to a third potential, a second terminal of the fourth transistor is connected to a fourth potential, the first bias circuit is connected between a control terminal of the third transistor and a control terminal of the fourth transistor.
    • 放大电路包括:设置在输入级中的第一晶体管,第二晶体管,第三晶体管和第四晶体管; 和第一偏置电路。 输入信号被输入到第一晶体管的控制端子和第二晶体管的控制端子,第一晶体管的第一端子连接到第三晶体管的第一端子,第二晶体管的第一端子连接到第一晶体管的第二端子 第四晶体管的第一端子,第一晶体管的第二端子连接到第一电位,第二晶体管的第二端子连接到与第一电位相等或不同的第二电位,第二晶体管的第二端子 第三晶体管连接到第三电位,第四晶体管的第二端连接到第四电位,第一偏置电路连接在第三晶体管的控制端和第四晶体管的控制端之间。