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1. 发明公开

EP0553338A4 EP0553338A4 - 有权转让
标题翻译： EP0553338A4 - Google专利
公开(公告)号：EP0553338A4
公开(公告)日：1994-08-03
申请号：EP92918430
申请日：1992-08-14
申请人： MULTICHIP TECHNOLOGY
发明人： LIEBERMAN, DONALD, A. , NEMEC, JOHN, J.
IPC分类号： G06F1/08 , G06F11/10 , G06F12/00 , G06F12/02 , G06F12/06 , G06F12/08 , G06F13/16 , G06F13/28
CPC分类号： G06F11/1016 , G06F11/1008 , G06F11/1044 , G06F12/0831 , G06F13/1673 , G06F13/1689 , G06F13/1694 , G06F13/28
摘要： A memory system includes a main memory and a memory controller. The main memory includes at least one block which has a plurality of banks. The memory controller includes a plurality of data channels each of which can access at least one bank in the main memory. Each data channel comprises a write first-in-first-out (FIFO) buffer for efficiently supporting cache purge operations and normal write operations, and a reflective write FIFO buffer for efficiently supporting coherent read with simultaneous cache copyback operations. The memory controller selects the proper FIFO or FIFOs depending on the type of data transaction, and selects the proper channel or channels depending on the system bus size, the data transaction size, and the status of the FIFO(s). The memory system can efficiently support data transactions having different data lengths or sizes from a byte to a long burst, and the timing resolution of the memory is enhanced regardless of the bus clock frequency. During burst transactions, the channels can run in an alternating fashion. During reads, the data is error-checked before being output to the system bus. The memory system can support different bus and processor systems and different data transactions in a highly efficient manner.
摘要翻译：存储器系统包括主存储器和存储器控制器。主存储器包括具有多个存储体的至少一个块。存储器控制器包括多个数据通道，每个数据通道可以访问主存储器中的至少一个存储体。每个数据通道包括用于有效支持高速缓存清除操作和正常写入操作的先进先出（FIFO）缓冲区，以及用于有效支持同时高速缓存回拷操作的一致读取的反射写入FIFO缓冲区。存储器控制器根据数据事务的类型选择合适的FIFO或FIFO，并根据系统总线大小，数据事务大小和FIFO的状态选择适当的通道或通道。存储器系统可以有效地支持从一个字节到一个长突发具有不同数据长度或大小的数据事务，并且无论总线时钟频率如何，存储器的定时分辨率都得到增强。在突发事务处理期间，通道可以以交替方式运行。在读取期间，数据在输出到系统总线之前经过错误检查。存储器系统可以高效地支持不同的总线和处理器系统以及不同的数据交易。

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