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1. 发明公开

EP0322117A3 Multiprocessor digital data processing system 失效
标题翻译：多处理器数字数据处理系统
公开(公告)号：EP0322117A3
公开(公告)日：1990-07-25
申请号：EP88311139.5
申请日：1988-11-24
申请人： KENDALL SQUARE RESEARCH CORPORATION
发明人： Frank, Steven J. , Burkhardt, III Henry , Lee, Linda Q. , Goodman, Nathan , Margulies, Benson I. , Weber, Frederick D.
IPC分类号： G06F15/16 , G06F12/08
CPC分类号： G06F9/5016 , G06F9/30003 , G06F9/3004 , G06F9/30047 , G06F9/3005 , G06F9/30087 , G06F9/383 , G06F9/3836 , G06F9/3851 , G06F9/3855 , G06F9/3857 , G06F9/3861 , G06F9/3865 , G06F9/468 , G06F9/52 , G06F11/004 , G06F11/0724 , G06F11/073 , G06F11/0766 , G06F11/0772 , G06F12/0811 , G06F12/0813 , G06F12/0817 , G06F12/0833 , G06F12/10 , G06F12/1018 , G06F12/126 , G06F2212/272 , H04L12/4637 , H04L45/04
摘要： A multiprocessor digital data processing system comprises a plurality of processing cells (18A to 18R, 34A to 34F, 38A, 38B) arranged in a hierarchy of rings (12A to 12F, 14A and 14B, 16). The system selectively allocates storage and moves exclusive data copies from cell to cell in response to access requests generated by the cells. Routing elements are employed to selectively broadcast data access requests, updates and transfers on the rings.

2. 发明公开

EP0322117A2 Multiprocessor digital data processing system 失效
标题翻译： Multiprozessor-Digitaldatenverarbeitungssystem。
公开(公告)号：EP0322117A2
公开(公告)日：1989-06-28
申请号：EP88311139.5
申请日：1988-11-24
申请人： KENDALL SQUARE RESEARCH CORPORATION
发明人： Frank, Steven J. , Burkhardt, III Henry , Lee, Linda Q. , Goodman, Nathan , Margulies, Benson I. , Weber, Frederick D.
IPC分类号： G06F15/16 , G06F12/08
CPC分类号： G06F9/5016 , G06F9/30003 , G06F9/3004 , G06F9/30047 , G06F9/3005 , G06F9/30087 , G06F9/383 , G06F9/3836 , G06F9/3851 , G06F9/3855 , G06F9/3857 , G06F9/3861 , G06F9/3865 , G06F9/468 , G06F9/52 , G06F11/004 , G06F11/0724 , G06F11/073 , G06F11/0766 , G06F11/0772 , G06F12/0811 , G06F12/0813 , G06F12/0817 , G06F12/0833 , G06F12/10 , G06F12/1018 , G06F12/126 , G06F2212/272 , H04L12/4637 , H04L45/04
摘要： A multiprocessor digital data processing system comprises a plurality of processing cells (18A to 18R, 34A to 34F, 38A, 38B) arranged in a hierarchy of rings (12A to 12F, 14A and 14B, 16). The system selectively allocates storage and moves exclusive data copies from cell to cell in response to access requests generated by the cells. Routing elements are employed to selectively broadcast data access requests, updates and transfers on the rings.
摘要翻译：一种多处理器数字数据处理系统，包括多个处理单元（18A至18R，34A至34F，38A，38B），它们分布在环（12A至12F，14A和14B，16）中。系统选择性地分配存储并且响应于由单元产生的访问请求而将排他数据副本从单元移动到单元。采用路由元素来选择性地广播环上的数据访问请求，更新和传输。

3. 发明公开

EP0593100A3 Multiprocessor digital data processing system 失效
标题翻译： Multiprozessor-Digitaldatenverarbeitungssystem。
公开(公告)号：EP0593100A3
公开(公告)日：1995-05-24
申请号：EP93120309.5
申请日：1988-11-24
申请人： KENDALL SQUARE RESEARCH CORPORATION
发明人： Frank, Steven J. , Goodman, Nathan , Burkhardt III, Henry , Margulies, Benson I. , Lee, Linda Q. , Weber, Frederick D.
IPC分类号： G06F12/08 , G06F15/16 , G06F9/46
CPC分类号： G06F9/5016 , G06F9/30003 , G06F9/3004 , G06F9/30047 , G06F9/3005 , G06F9/30087 , G06F9/383 , G06F9/3836 , G06F9/3851 , G06F9/3855 , G06F9/3857 , G06F9/3861 , G06F9/3865 , G06F9/468 , G06F9/52 , G06F11/004 , G06F11/0724 , G06F11/073 , G06F11/0766 , G06F11/0772 , G06F12/0811 , G06F12/0813 , G06F12/0817 , G06F12/0833 , G06F12/10 , G06F12/1018 , G06F12/126 , G06F2212/272 , H04L12/4637 , H04L45/04
摘要： A multiprocessor digital data processing system comprises a plurality of processing cells (18A to 18R, 34A to 34F, 38A, 38B) arranged in a hierarchy of rings (12A to 12F, 14A and 14B, 16). The system selectively allocates storage and moves exclusive data copies from cell to cell in response to access requests generated by the cells. Routing elements are employed to selectively broadcast data access requests, updates and transfers on the rings.

4. 发明公开

EP0593100A2 Multiprocessor digital data processing system 失效
标题翻译： Multiprozessor-Digitaldatenverarbeitungssystem und Verfahren zum Betreiben dieses Systems
公开(公告)号：EP0593100A2
公开(公告)日：1994-04-20
申请号：EP93120309.5
申请日：1988-11-24
申请人： KENDALL SQUARE RESEARCH CORPORATION
发明人： Frank, Steven J. , Goodman, Nathan , Burkhardt III, Henry , Margulies, Benson I. , Lee, Linda Q. , Weber, Frederick D.
IPC分类号： G06F12/08 , G06F15/16 , G06F9/46
CPC分类号： G06F9/5016 , G06F9/30003 , G06F9/3004 , G06F9/30047 , G06F9/3005 , G06F9/30087 , G06F9/383 , G06F9/3836 , G06F9/3851 , G06F9/3855 , G06F9/3857 , G06F9/3861 , G06F9/3865 , G06F9/468 , G06F9/52 , G06F11/004 , G06F11/0724 , G06F11/073 , G06F11/0766 , G06F11/0772 , G06F12/0811 , G06F12/0813 , G06F12/0817 , G06F12/0833 , G06F12/10 , G06F12/1018 , G06F12/126 , G06F2212/272 , H04L12/4637 , H04L45/04
摘要： A multiprocessor digital data processing system comprises a plurality of processing cells (18A to 18R, 34A to 34F, 38A, 38B) arranged in a hierarchy of rings (12A to 12F, 14A and 14B, 16). The system selectively allocates storage and moves exclusive data copies from cell to cell in response to access requests generated by the cells. Routing elements are employed to selectively broadcast data access requests, updates and transfers on the rings.
摘要翻译：一种多处理器数字数据处理系统，包括多个处理单元（18A至18R，34A至34F，38A，38B），它们分布在环（12A至12F，14A和14B，16）中。系统选择性地分配存储并且响应于由单元产生的访问请求而将排他数据副本从单元移动到单元。采用路由元素来选择性地广播环上的数据访问请求，更新和传输。

5. 发明公开

EP0404560A2 Improved multiprocessor system 失效
标题翻译： Multiprozessorsystem。
公开(公告)号：EP0404560A2
公开(公告)日：1990-12-27
申请号：EP90306777.5
申请日：1990-06-21
申请人： KENDALL SQUARE RESEARCH CORPORATION
发明人： Frank, Steven J. , Burkhardt, Henry, III , Rothnie, James B. , Margulies, Benson I. , Weber, Frederick D. , Lee, Linda Q.
IPC分类号： G06F15/16 , G06F12/08
CPC分类号： G06F9/3865 , G06F11/004 , G06F15/17337
摘要： A digital data processing system includes a plurality of central processor units (40A, 40B, 40C) which share and access a common memory (44A, 44B, 44C) through a memory management element (46) . The memory management element permits, inter alia, data in the common memory to be accessed in at least two modes. In the first mode, all central processing units requesting access to a given datum residing in memory are signalled of the datums existence. In the second mode, only selected central processing units requesting access to a resident datum are notified that it exists, while others requesting access to the datum are signalled that it does not exist. The common memory can include a plurality of independent memory elements (44A, 44B, 44C) each coupled to and associated with, a respective one of the central processing units. A central processing unit can include a post-store element for effecting the transfer of copies of data stored in its associated memory element to a memory element associated with another central processing unit.
摘要翻译：数字数据处理系统包括通过存储器管理元件（46）共享和访问公共存储器（44A，44B，44C）的多个中央处理器单元（40A，40B，40C）。存储器管理元件尤其允许以至少两种模式访问公共存储器中的数据。在第一模式中，请求访问驻留在存储器中的给定数据的所有中央处理单元用信号表示基准存在。在第二模式中，只有请求访问驻留数据的所选择的中央处理单元被通知其存在，而请求访问基准的其他中央处理单元被发信号通知其不存在。公共存储器可以包括多个独立存储器元件（44A，44B，44C），每个独立存储器元件耦合到相应的一个中央处理单元并与之相关联。中央处理单元可以包括用于实现将存储在其关联的存储器元件中的数据的副本传送到与另一中央处理单元相关联的存储元件的后存储元件。

6. 发明公开

EP0468542A3 Multiprocessor digital data processing system 失效
标题翻译：多处理器数字数据处理系统
公开(公告)号：EP0468542A3
公开(公告)日：1992-08-12
申请号：EP91116719.5
申请日：1988-11-24
申请人： KENDALL SQUARE RESEARCH CORPORATION
发明人： Frank, Steven J. , Burkhardt, Henry, III , Lee, Linda Q. , Goodman, Nathan , Margulies, Benson I. , Weber, Frederick D.
IPC分类号： G06F15/16 , G06F12/08 , G06F9/46
CPC分类号： G06F9/5016 , G06F9/30003 , G06F9/3004 , G06F9/30047 , G06F9/3005 , G06F9/30087 , G06F9/383 , G06F9/3836 , G06F9/3851 , G06F9/3855 , G06F9/3857 , G06F9/3861 , G06F9/3865 , G06F9/468 , G06F9/52 , G06F11/004 , G06F11/0724 , G06F11/073 , G06F11/0766 , G06F11/0772 , G06F12/0811 , G06F12/0813 , G06F12/0817 , G06F12/0833 , G06F12/10 , G06F12/1018 , G06F12/126 , G06F2212/272 , H04L12/4637 , H04L45/04
摘要： A multiprocessor digital data processing system comprises a plurality of processing cells (18A to 18R, 34A to 34F, 38A, 38B) arranged in a hierarchy of rings (12A to 12F, 14A and 14B, 16). The system selectively allocates storage and moves exclusive data copies from cell to cell in response to access requests generated by the cells. Routing elements are employed to selectively broadcast data access requests, updates and transfers on the rings.

7. 发明公开

EP0404560A3 Improved multiprocessor system 失效
标题翻译：改进的多处理器系统
公开(公告)号：EP0404560A3
公开(公告)日：1992-08-05
申请号：EP90306777.5
申请日：1990-06-21
申请人： KENDALL SQUARE RESEARCH CORPORATION
发明人： Frank, Steven J. , Burkhardt, Henry, III , Rothnie, James B. , Margulies, Benson I. , Weber, Frederick D. , Lee, Linda Q.
IPC分类号： G06F15/16 , G06F12/08
CPC分类号： G06F9/3865 , G06F11/004 , G06F15/17337
摘要： A digital data processing system includes a plurality of central processor units (40A, 40B, 40C) which share and access a common memory (44A, 44B, 44C) through a memory management element (46) . The memory management element permits, inter alia, data in the common memory to be accessed in at least two modes. In the first mode, all central processing units requesting access to a given datum residing in memory are signalled of the datums existence. In the second mode, only selected central processing units requesting access to a resident datum are notified that it exists, while others requesting access to the datum are signalled that it does not exist. The common memory can include a plurality of independent memory elements (44A, 44B, 44C) each coupled to and associated with, a respective one of the central processing units. A central processing unit can include a post-store element for effecting the transfer of copies of data stored in its associated memory element to a memory element associated with another central processing unit.

8. 发明公开

EP0468542A2 Multiprocessor digital data processing system 失效
标题翻译：多处理器的数字数据处理系统。
公开(公告)号：EP0468542A2
公开(公告)日：1992-01-29
申请号：EP91116719.5
申请日：1988-11-24
申请人： KENDALL SQUARE RESEARCH CORPORATION
发明人： Frank, Steven J. , Burkhardt, Henry, III , Lee, Linda Q. , Goodman, Nathan , Margulies, Benson I. , Weber, Frederick D.
IPC分类号： G06F15/16 , G06F12/08 , G06F9/46
CPC分类号： G06F9/5016 , G06F9/30003 , G06F9/3004 , G06F9/30047 , G06F9/3005 , G06F9/30087 , G06F9/383 , G06F9/3836 , G06F9/3851 , G06F9/3855 , G06F9/3857 , G06F9/3861 , G06F9/3865 , G06F9/468 , G06F9/52 , G06F11/004 , G06F11/0724 , G06F11/073 , G06F11/0766 , G06F11/0772 , G06F12/0811 , G06F12/0813 , G06F12/0817 , G06F12/0833 , G06F12/10 , G06F12/1018 , G06F12/126 , G06F2212/272 , H04L12/4637 , H04L45/04
摘要： A multiprocessor digital data processing system comprises a plurality of processing cells (18A to 18R, 34A to 34F, 38A, 38B) arranged in a hierarchy of rings (12A to 12F, 14A and 14B, 16). The system selectively allocates storage and moves exclusive data copies from cell to cell in response to access requests generated by the cells. Routing elements are employed to selectively broadcast data access requests, updates and transfers on the rings.

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