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1. 发明公开

EP0604348A2 A method for thinning SOI films having improved thickness uniformity 失效
标题翻译： Verfahren zumDünnemachenvon SOI Schichten vongleichmässigererDicke。
公开(公告)号：EP0604348A2
公开(公告)日：1994-06-29
申请号：EP93480216.6
申请日：1993-12-03
申请人： International Business Machines Corporation
发明人： Buti, Taqi Nasser , Shepard, Joseph Francis
IPC分类号： H01L21/76
CPC分类号： H01L21/76251 , Y10S148/168 , Y10S438/97
摘要： A method of thinning SOI films for providing ultra-thin active device regions having excellent thickness uniformity and further having self-aligned isolation regions between the active device regions is disclosed. A substrate (16) having an isolation layer (14) formed thereon and further having a single crystal silicon (12) layer formed upon the isolation layer is first provided. A thermal oxide layer (18) is grown upon the silicon layer, patterned in desired regions corresponding to polish stop regions positioned between predetermined active device regions, and etched. The underlying silicon layer (12) is thereafter etched according to the patterned thermal oxide layer (18) with a high selectivity etch, thereby creating grooves (22) in the silicon layer.Optionally, a thin buffer oxide layer (26) is grown upon side wall edges. A layer (28) of an insulative polish stop material is then blanket deposited. A polysilicon layer (30) is then deposited upon the polish stop material to further completely fill the grooves and then is planarized down to the top polish stop material. The top polish stop material and the oxide layer are then etched away. Lastly, by chemical-mechanical polishing, the silicon, sidewall polish stop material, and polysilicon are thinned down to the bottom polish stop material, whereby active device regions (32) having uniform thickness corresponding to the thickness of the bottom polish stop material are created between insulating regions (40).
摘要翻译：公开了一种减薄SOI膜的方法，用于提供具有优异厚度均匀性的超薄有源器件区域，并且在有源器件区域之间还具有自对准隔离区域。首先提供其上形成有隔离层（14）并且还具有形成在隔离层上的单晶硅（12）层的衬底（16）。在硅层上生长热氧化物层（18），在对应于位于预定有源器件区域之间的抛光停止区域的期望区域中图案化，并蚀刻。然后根据图案化的热氧化物层（18）以高选择性蚀刻蚀刻下面的硅层（12），从而在硅层中形成凹槽（22）。可选地，将薄的缓冲氧化物层（26）生长在侧壁边缘。绝缘抛光停止材料的层（28）然后被覆盖。然后将多晶硅层（30）沉积在抛光停止材料上以进一步完全填充凹槽，然后被平坦化到顶部抛光停止材料。然后将顶部抛光停止材料和氧化物层蚀刻掉。最后，通过化学 - 机械抛光，硅，侧壁抛光停止材料和多晶硅被减薄到底部抛光停止材料，由此产生具有与底部抛光停止材料的厚度对应的均匀厚度的有源器件区域（32）在绝缘区域（40）之间。

2. 发明公开

EP0570043A2 Bicmos SOI wafer having thin and thick SOI regions of silicon 失效
标题翻译： SOI-ScheibefürBICMOS mitdünnenund dicken SOI-Siliziumgebieten。
公开(公告)号：EP0570043A2
公开(公告)日：1993-11-18
申请号：EP93201175.2
申请日：1993-04-22
申请人： International Business Machines Corporation
发明人： Buti, Taqi Nasser , Hsu, Louis Lu-Chen , Jost, Mark Edwin , Ogura Seiki NMN , Schulz, Ronald Norman
IPC分类号： H01L21/82 , H01L21/76 , H01L27/06 , H01L21/304
CPC分类号： H01L21/76264 , H01L21/76275 , H01L21/76281 , H01L21/76286 , H01L21/8249 , H01L29/78657 , Y10S148/009 , Y10S438/959
摘要： A SOI BiCMOS integrated circuit has CMOS devices formed in a thin epitaxial layer of 1000Å and bipolar devices formed in a thick epitaxial layer of 1µm, the two thicknesses being formed by a process in which a set of oxide islands are formed on a first wafer; an epitaxial layer is grown from bipolar silicon regions up and over the islands in a step that forms the bottom portion of the bipolar regions; the first wafer is inverted and oxide- bonded to a second wafer with the newly grown epitaxial layer below the islands so that the new top surface has a high quality epitaxial layer; excess silicon is removed from the new surface and the surface is polished to a thickness of 1000Å over the islands by use of a nitride polish stop layer, leaving a thick layer of epitaxial silicon of 1µm in the bipolar regions and a 1000Å thick layer of epitaxial silicon in the CMOS regions.
摘要翻译： SOI BiCMOS集成电路具有形成在1000个ANGSTROM的薄外延层中的CMOS器件和形成在1μm的厚外延层中的双极器件，两个厚度通过其中一组氧化物岛形成在第一片; 在形成双极区域的底部的步骤中，从双极硅区域向上和在岛上生长外延层; 第一晶片被倒置并且氧化物结合到第二晶片，其中新生长的外延层在岛下方，使得新的顶表面具有高质量的外延层; 从新表面去除多余的硅，并且通过使用氮化物抛光停止层在岛上将表面抛光至1000的厚度，在双极性区域中留下1μm厚的外延硅的外延层，以及1000 ANGSTROM 在CMOS区域中厚的外延硅层。

3. 发明授权

EP0570043B1 Bicmos SOI wafer having thin and thick SOI regions of silicon 失效
标题翻译：对于BICMOS SOI晶片具有薄和厚的SOI区域的硅
公开(公告)号：EP0570043B1
公开(公告)日：1996-07-24
申请号：EP93201175.2
申请日：1993-04-22
申请人： International Business Machines Corporation
发明人： Buti, Taqi Nasser , Hsu, Louis Lu-Chen , Jost, Mark Edwin , Ogura Seiki NMN , Schulz, Ronald Norman
IPC分类号： H01L21/82 , H01L21/76 , H01L27/06 , H01L21/304
CPC分类号： H01L21/76264 , H01L21/76275 , H01L21/76281 , H01L21/76286 , H01L21/8249 , H01L29/78657 , Y10S148/009 , Y10S438/959

4. 发明公开

EP0570043A3 Bicmos SOI wafer having thin and thick SOI regions of silicon 失效
标题翻译： BICMOS SOI薄膜有薄层和硅片硅层
公开(公告)号：EP0570043A3
公开(公告)日：1993-11-24
申请号：EP93201175.2
申请日：1993-04-22
申请人： International Business Machines Corporation
发明人： Buti, Taqi Nasser , Hsu, Louis Lu-Chen , Jost, Mark Edwin , Ogura Seiki NMN , Schulz, Ronald Norman
IPC分类号： H01L21/82 , H01L21/76 , H01L27/06 , H01L21/304
CPC分类号： H01L21/76264 , H01L21/76275 , H01L21/76281 , H01L21/76286 , H01L21/8249 , H01L29/78657 , Y10S148/009 , Y10S438/959
摘要： A SOI BiCMOS integrated circuit has CMOS devices formed in a thin epitaxial layer of 1000Å and bipolar devices formed in a thick epitaxial layer of 1µm, the two thicknesses being formed by a process in which a set of oxide islands are formed on a first wafer; an epitaxial layer is grown from bipolar silicon regions up and over the islands in a step that forms the bottom portion of the bipolar regions; the first wafer is inverted and oxide- bonded to a second wafer with the newly grown epitaxial layer below the islands so that the new top surface has a high quality epitaxial layer; excess silicon is removed from the new surface and the surface is polished to a thickness of 1000Å over the islands by use of a nitride polish stop layer, leaving a thick layer of epitaxial silicon of 1µm in the bipolar regions and a 1000Å thick layer of epitaxial silicon in the CMOS regions.

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