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1. 发明授权

EP2386087B1 SHARED VIRTUAL MEMORY 有权转让
标题翻译：共享虚拟内存
公开(公告)号：EP2386087B1
公开(公告)日：2017-06-21
申请号：EP09826579.6
申请日：2009-11-05
申请人： Intel Corporation
发明人： CHEN, Hu , GAO, Ying , XIAOCHENG, Zhou , YAN, Shoumeng , ZHANG, Peinan , FANG, Jesse , MENDELSON, Avi , SAHA, Bratin , RAJAGOPALAN, Mohan
IPC分类号： G06F12/1072 , G06F12/1081 , G06F12/109 , G06F12/1009 , G06F12/0815 , G06T1/20 , G06T1/60 , G06F9/54
CPC分类号： G06F9/544 , G06F12/0815 , G06F12/084 , G06F12/1009 , G06F12/1063 , G06F12/1072 , G06F12/1081 , G06F12/109 , G06F2212/161 , G06F2212/622 , G06F2212/656 , G06F2212/657 , G06F2212/682 , G06T1/20 , G06T1/60

2. 发明公开

EP2569718A1 RECORDING DIRTY INFORMATION IN SOFTWARE DISTRIBUTED SHARED MEMORY SYSTEMS 有权
标题翻译：记录信息在修改后的软件分布式共享存储系统
公开(公告)号：EP2569718A1
公开(公告)日：2013-03-20
申请号：EP10851180.9
申请日：2010-05-11
申请人： Intel Corporation
发明人： YAN, Shoumeng , GAO, Ying , ZHOU, Xiaocheng , CHEN, Hu , SAHA, Bratin , LUO, Sai
IPC分类号： G06F17/30
CPC分类号： G06F12/08 , G06F12/1009 , G06F12/1027 , G06F12/1072 , G06F17/30575 , G06F2212/652
摘要： A page table entry dirty bit system may be utilized to record dirty information for a software distributed shared memory system. In some embodiments, this may improve performance without substantially increasing overhead because the dirty bit recording system is already available in certain processors. By providing extra bits, coherence can be obtained with respect to all the other uses of the existing page table entry dirty bits.

3. 发明授权

EP3043269B1 SHARING VIRTUAL FUNCTIONS IN A SHARED VIRTUAL MEMORY BETWEEN HETEROGENEOUS PROCESSORS OF A COMPUTING PLATFORM 有权
标题翻译：在计算平台的异构处理器之间共享虚拟存储器中的虚拟功能
公开(公告)号：EP3043269B1
公开(公告)日：2017-07-26
申请号：EP16158622.7
申请日：2010-09-24
申请人： Intel Corporation
发明人： YAN, Shoumeng , LUO, Sai , ZHOU, Xiaocheng , GAO, Ying , CHEN, Hu , SAHA, Bratin
IPC分类号： G06F15/167 , G06F9/54
CPC分类号： G06F12/1072 , G06F8/447 , G06F9/3863 , G06F9/3885 , G06F9/548 , G06F2212/657

4. 发明授权

EP2619687B1 SHARING VIRTUAL FUNCTIONS IN A SHARED VIRTUAL MEMORY BETWEEN HETEROGENEOUS PROCESSORS OF A COMPUTING PLATFORM 有权转让
标题翻译：在计算平台的异构处理器之间共享虚拟存储器中的虚拟功能
公开(公告)号：EP2619687B1
公开(公告)日：2016-04-06
申请号：EP10857421.1
申请日：2010-09-24
申请人： Intel Corporation
发明人： YAN, Shoumeng , LUO, Sai , ZHOU, Xiaocheng , GAO, Ying , CHEN, Hu , SAHA, Bratin
IPC分类号： G06F15/167 , G06F9/54
CPC分类号： G06F12/1072 , G06F8/447 , G06F9/3863 , G06F9/3885 , G06F9/548 , G06F2212/657

5. 发明授权

EP2024837B1 SYSTEM AND METHOD FOR ALLOCATING AND DEALLOCATING MEMORY WITHIN TRANSACTIONAL CODE 有权转让
标题翻译：系统和方法进行赋值，并废除空间的ASSIGNMENT IN A的交易代码
公开(公告)号：EP2024837B1
公开(公告)日：2013-12-18
申请号：EP07794436.1
申请日：2007-05-01
申请人： Intel Corporation
发明人： HERTZBERG, Ben , SAHA, Bratin , ADI-TABATABAI, Ali-Reza
IPC分类号： G06F12/00
CPC分类号： G06F12/023 , G06F9/466 , G06F9/5016 , Y10S707/99943 , Y10S707/99953
摘要： Methods and systems are provided for managing memory allocations and deallocations while in transactional code, including nested transactional code. The methods and systems manage transactional memory operations by using identifiers, such as sequence numbers, to handle memory management in transactions. The methods and systems also maintain lists of deferred actions to be performed at transaction abort and commit times. A number of memory management routines associated with one or more transactions examine the transaction sequence number of the current transaction, manipulate commit and/or undo logs, and set/use the transaction sequence number of an associated object, but are not so limited. The methods and systems provide for memory allocation and deallocations within transactional code while preserving transactional semantics. Other embodiments are described and claimed.

6. 发明公开

EP2513803A2 PERFORMING MODE SWITCHING IN AN UNBOUNDED TRANSACTIONAL MEMORY (UTM) SYSTEM 审中-公开
标题翻译：模式的实现切换IN A SYSTEM UTM
公开(公告)号：EP2513803A2
公开(公告)日：2012-10-24
申请号：EP10841434.3
申请日：2010-11-10
申请人： Intel Corporation
发明人： ADL-TABATABAI, Ali-Reza , SAHA, Bratin , BASSIN, Vadim , SHEAFFER, Gad , GRAY, Jan , GROVER, Vinod , TAILLEFER, Martin , LEVANONI, Yossi , DETLEFS, Dave , MAGRUDER, Mike , TOLTON, Matt
IPC分类号： G06F13/14 , G06F12/08
CPC分类号： G06F12/0815 , G06F9/467 , G06F11/141
摘要： In one embodiment, the present invention includes a method for selecting a first transaction execution mode to begin a first transaction in a unbounded transactional memory (UTM) system having a plurality of transaction execution modes. These transaction execution modes include hardware modes to execute within a cache memory of a processor, a hardware assisted mode to execute using transactional hardware of the processor and a software buffer, and a software transactional memory (STM) mode to execute without the transactional hardware. The first transaction execution mode can be selected to be a highest performant of the hardware modes if no pending transaction is executing in the STM mode, otherwise a lower performant mode can be selected. Other embodiments are described and claimed.

7. 发明公开

EP2386087A2 SHARED VIRTUAL MEMORY 有权转让
标题翻译：一个共享的虚拟商店
公开(公告)号：EP2386087A2
公开(公告)日：2011-11-16
申请号：EP09826579.6
申请日：2009-11-05
申请人： Intel Corporation , Rajagopalan, Mohan
发明人： CHEN, Hu , GAO, Ying , XIAOCHENG, Zhou , YAN, Shoumeng , ZHANG, Peinan , FANG, Jesse , MENDELSON, Avi , SAHA, Bratin
IPC分类号： G06F15/167 , G06F9/46 , G06F13/14
CPC分类号： G06F9/544 , G06F12/0815 , G06F12/084 , G06F12/1009 , G06F12/1063 , G06F12/1072 , G06F12/1081 , G06F12/109 , G06F2212/161 , G06F2212/622 , G06F2212/656 , G06F2212/657 , G06F2212/682 , G06T1/20 , G06T1/60
摘要： Embodiments of the invention provide a programming model for CPU-GPU platforms. In particular, embodiments of the invention provide a uniform programming model for both integrated and discrete devices. The model also works uniformly for multiple GPU cards and hybrid GPU systems (discrete and integrated). This allows software vendors to write a single application stack and target it to all the different platforms. Additionally, embodiments of the invention provide a shared memory model between the CPU and GPU. Instead of sharing the entire virtual address space, only a part of the virtual address space needs to be shared. This allows efficient implementation in both discrete and integrated settings.

8. 发明公开

EP3043269A1 SHARING VIRTUAL FUNCTIONS IN A SHARED VIRTUAL MEMORY BETWEEN HETEROGENEOUS PROCESSORS OF A COMPUTING PLATFORM 有权
标题翻译：共享虚拟函数的具有计算机平台的异构处理器之间的接头虚拟存储器
公开(公告)号：EP3043269A1
公开(公告)日：2016-07-13
申请号：EP16158622.7
申请日：2010-09-24
申请人： Intel Corporation
发明人： YAN, Shoumeng , LUO, Sai , ZHOU, Xiaocheng , GAO, Ying , CHEN, Hu , SAHA, Bratin
IPC分类号： G06F15/167 , G06F9/54
CPC分类号： G06F12/1072 , G06F8/447 , G06F9/3863 , G06F9/3885 , G06F9/548 , G06F2212/657
摘要： A computing platform may include heterogeneous processors (e.g., CPU and a GPU) to support sharing of virtual functions between such processors. In one embodiment, a CPU side vtable pointer used to access a shared object from the CPU 110 may be used to determine a GPU vtable if a GPU-side table exists. In other embodiment, a shared non-coherent region, which may not maintain data consistency, may be created within the shared virtual memory. The CPU and the GPU side data stored within the shared non-coherent region may have a same address as seen from the CPU and the GPU side. However, the contents of the CPU-side data may be different from that of GPU-side data as shared virtual memory may not maintain coherency during the run-time. In one embodiment, the vptr may be modified to point to the CPU vtable and GPU vtable stored in the shared virtual memory.
摘要翻译：一种计算平台可以包括异构处理器（例如，CPU和GPU）来支持寻求处理器之间的虚函数共享。在一个，用于从CPU 110访问的共享对象中的CPU实施方式侧虚表指针可以被用于确定性地挖掘一个GPU虚函数表，如果GPU侧表中存在。在其它，实施例的共享的非相干区域，这可能不保持数据的一致性，可以在共享虚拟存储器内被创建。从CPU和GPU侧看到的CPU和存储在共享非相干区域内的GPU侧数据可具有相同的地址。然而，CPU侧的数据的内容可以是不同的，从做GPU侧数据作为在运行时间共享虚拟存储器可能无法保持一致性。在一个中，实施方式的vptr可被修改为指向存储在共享虚拟存储器中的CPU和GPU的vtable虚表。

9. 发明授权

EP2005306B1 ARRAY COMPARISON AND SWAP OPERATIONS 有权
标题翻译：数组进行比较和汇兑业务
公开(公告)号：EP2005306B1
公开(公告)日：2013-12-11
申请号：EP07754521.8
申请日：2007-03-30
申请人： Intel Corporation
发明人： SAHA, Bratin , ADL-TABATABAI, Ali-Reza
IPC分类号： G06F13/00 , G06F12/02 , G06F9/52 , G06F17/30
CPC分类号： G06F9/526

10. 发明公开

EP2494454A1 TWO WAY COMMUNICATION SUPPORT FOR HETEROGENOUS PROCESSORS OF A COMPUTER PLATFORM 审中-公开
标题翻译：双向通信支持对不同处理器ENER计算机平台
公开(公告)号：EP2494454A1
公开(公告)日：2012-09-05
申请号：EP09850970.6
申请日：2009-10-30
申请人： Intel Corporation
发明人： YAN, Shoumeng , ZHOU, Xiaocheng , GAO, Ying , RAJAGOPALAN, Mohan , DEODHAR, Rajiv , PUTZOLU, David , NELSON, Clark , GIRKAR, Milind , GEVA, Robert , CHEN, Tiger , LUO, Sai , JUNKINS, Stephen , SAHA, Bratin , PUTZOLU, David , NARAYANASWAMY, Ravi , LUO, Sai , XI, Patrick
IPC分类号： G06F15/16 , G06F9/28 , G06F15/167
CPC分类号： G06F9/544 , G06F9/547
摘要： A computer system may comprise a computer platform and input-output devices. The computer platform may include a plurality of heterogeneous processors comprising a central processing unit (CPU) and a graphics processing unit) GPU, for example. The GPU may be coupled to a GPU compiler and a GPU linker/loader and the CPU may be coupled to a CPU compiler and a CPU linker/loader. The user may create a shared object in an object oriented language and the shared object may include virtual functions. The shared object may be fine grain partitioned between the heterogeneous processors. The GPU compiler may allocate the shared object to the CPU and may create a first and a second enabling path to allow the GPU to invoke virtual functions of the shared object. Thus, the shared object that may include virtual functions may be shared seamlessly between the CPU and the GPU.

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