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1. 发明授权

EP1908119B1 HALBLEITERBAUELEMENT MIT EINER DRIFTZONE UND EINER DRIFTSTEUERZONE 有权
标题翻译：与漂移区和漂移控制区带半导体部件
公开(公告)号：EP1908119B1
公开(公告)日：2012-04-18
申请号：EP06776463.9
申请日：2006-07-27
申请人： Infineon Technologies Austria AG
发明人： PFIRSCH, Frank , MAUDER, Anton , SCHULZE, Hans-Joachim , SEDLMAIER, Stefan , WILLMEROTH, Armin , ZUNDEL, Markus , HIRLER, Franz , MITTAL, Arunjai
IPC分类号： H01L29/78 , H01L29/739 , H01L29/872 , H01L29/06 , H01L29/40 , H01L27/06
CPC分类号： H01L29/7802 , H01L29/0634 , H01L29/0653 , H01L29/0696 , H01L29/0834 , H01L29/0878 , H01L29/1095 , H01L29/407 , H01L29/41766 , H01L29/66734 , H01L29/7393 , H01L29/7803 , H01L29/7804 , H01L29/7813 , H01L29/7816 , H01L29/7817 , H01L29/7824 , H01L29/78603 , H01L29/872
摘要： The invention relates to a semiconductor component that has a semiconductor body (100) and the following additional features: a drift region (2; 211) of a first mode of conductivity in the semiconductor body (100); a drift control region (3; 241), which is made of a semiconductor material and which is placed, at least in sections, adjacent to the drift region (2) in the semiconductor body, and; an accumulation dielectric (4; 251) that is placed between the drift region (2, 211) and the drift control region (3; 241).

2. 发明公开

EP3422418A1 METHOD OF MANUFACTURING A SUPERJUNCTION SEMICONDUCTOR DEVICE 有权
公开(公告)号：EP3422418A1
公开(公告)日：2019-01-02
申请号：EP17178171.9
申请日：2017-06-27
申请人： Infineon Technologies Austria AG
发明人： FACHMANN, Christian , KNOEFLER, Roman , MEZOESI, Gabor , PIPPAN, Manfred , RUPP, Thomas , TILKE, Armin , TREU, Michael , WEBER, Hans , WILLMEROTH, Armin
IPC分类号： H01L29/78 , H01L29/66 , H01L29/06
摘要： In an embodiment, a method of fabricating a superjunction semiconductor device includes implanting first ions into a first region of a first epitaxial layer using a first implanting apparatus and nominal implant conditions to produce a first region in the first epitaxial layer comprising the first ions and a first implant characteristic and implanting second ions into a second region of the first epitaxial layer, the second region being laterally spaced apart from the first region, using second nominal implanting conditions estimated to produce a second region in the first epitaxial layer having the second ions and a second implant characteristic that lies within an acceptable maximum difference of the first implant characteristic.

3. 发明公开

EP1908119A2 HALBLEITERBAUELEMENT MIT EINER DRIFTZONE UND EINER DRIFTSTEUERZONE 有权
标题翻译：与漂移区和漂移控制区带半导体部件
公开(公告)号：EP1908119A2
公开(公告)日：2008-04-09
申请号：EP06776463.9
申请日：2006-07-27
申请人： Infineon Technologies Austria AG
发明人： PFIRSCH, Frank , MAUDER, Anton , SCHULZE, Hans-Joachim , SEDLMAIER, Stefan , WILLMEROTH, Armin , ZUNDEL, Markus , HIRLER, Franz , MITTAL, Arunjai
IPC分类号： H01L29/78 , H01L29/739 , H01L29/872 , H01L29/06 , H01L29/40 , H01L27/06
CPC分类号： H01L29/7802 , H01L29/0634 , H01L29/0653 , H01L29/0696 , H01L29/0834 , H01L29/0878 , H01L29/1095 , H01L29/407 , H01L29/41766 , H01L29/66734 , H01L29/7393 , H01L29/7803 , H01L29/7804 , H01L29/7813 , H01L29/7816 , H01L29/7817 , H01L29/7824 , H01L29/78603 , H01L29/872
摘要： The invention relates to a semiconductor component that has a semiconductor body (100) and the following additional features: a drift region (2; 211) of a first mode of conductivity in the semiconductor body (100); a drift control region (3; 241), which is made of a semiconductor material and which is placed, at least in sections, adjacent to the drift region (2) in the semiconductor body, and; an accumulation dielectric (4; 251) that is placed between the drift region (2, 211) and the drift control region (3; 241).

4. 发明公开

EP3696863A1 LATERAL TRANSISTOR DEVICE 有权
公开(公告)号：EP3696863A1
公开(公告)日：2020-08-19
申请号：EP19157393.0
申请日：2019-02-15
申请人： Infineon Technologies Austria AG
发明人： MAHMOUD, Ahmed , WILLMEROTH, Armin
IPC分类号： H01L29/808 , H01L29/06 , H01L29/10 , H01L21/337 , H01L29/36 , H01L29/08 , H01L27/06 , H01L29/417
摘要： A lateral transistor device (400; 800; 900; 1000) comprises a layer stack (410; 810; 910; 1010) with a plurality of first semiconductor layers (412; 812; 912; 1012) of a first doping type and a plurality of second semiconductor layers (414; 814; 914; 1014) of a second doping type complementary to the first doping type. The lateral transistor device (400; 800; 900; 1000) further comprises a source region (420; 820; 1020), a drain region (424; 824; 1024) spaced apart from the source region (420; 820; 1020) in a first lateral direction of the lateral transistor device, at least one gate region (428; 828; 1028) arranged between the source region (420; 820; 1020) and the drain region (424; 824; 1024), a buffer layer arrangement (430, 450; 830, 850; 930, 950; 1030, 1050), and a contact layer (440; 840; 940; 1040). The buffer layer arrangement (430, 450; 830, 850; 930, 950; 1030, 1050) is arranged between the contact layer (440; 840; 940; 1040) and at least parts of the layer stack (410; 810; 910; 1010), the source region (420; 820; 1020) and the drain region (424; 824; 1024) in a vertical direction of the lateral transistor device. The buffer layer arrangement (430, 450; 830, 850; 930, 950; 1030, 1050) comprises a first buffer layer (430; 830; 930; 1030) and a second buffer layer (450; 850; 950; 1050), the second buffer layer (450; 850; 950; 1050) being arranged between the first buffer layer (430; 830; 930; 1050) and the contact layer (440; 840; 940; 1040). The first buffer layer (430; 830; 930; 1030), the second buffer layer (450; 850; 950; 1050) and the contact layer (440; 840; 940; 1040) have a same doping type, and a doping concentration of the second buffer layer (450; 850; 950; 1050) is in a range between a doping concentration of the first buffer layer (430; 830; 930; 1030) and a doping concentration of the contact layer (440; 840; 940; 1040).

5. 发明授权

EP2661773B1 SEMICONDUCTOR DEVICE ARRANGEMENT WITH A FIRST SEMICONDUCTOR DEVICE AND WITH A PLURALITY OF SECOND SEMI CONDUCTOR DEVICES 有权
标题翻译：半导体器件与第一半导体器件和多第二半导体器件安排
公开(公告)号：EP2661773B1
公开(公告)日：2016-03-23
申请号：EP12700220.2
申请日：2012-01-09
申请人： Infineon Technologies Austria AG
发明人： WEIS, Rolf , HIRLER, Franz , FELDTKELLER, Martin , DEBOY, Gerald , STECHER, Matthias , WILLMEROTH, Armin
IPC分类号： H01L27/088 , H01L27/06 , H01L29/78 , H01L29/40 , H01L27/07 , G05F1/573 , H01L27/02 , H02H9/02
CPC分类号： H01L27/0207 , H01L21/823418 , H01L21/823431 , H01L21/823437 , H01L27/0623 , H01L27/0629 , H01L27/0727 , H01L27/088 , H01L27/0883 , H01L27/0886 , H01L27/098 , H01L29/0653 , H01L29/0692 , H01L29/0696 , H01L29/4236 , H01L29/4238 , H01L29/78 , H01L29/7817 , H01L29/7824 , H01L29/7825 , H01L29/7835 , H01L29/7838 , H03K17/06

6. 发明公开

EP2661773A2 SEMICONDUCTOR DEVICE ARRANGEMENT WITH A FIRST SEMICONDUCTOR DEVICE AND WITH A PLURALITY OF SECOND SEMI CONDUCTOR DEVICES 有权
标题翻译：半导体器件与第一半导体器件和多第二半导体器件安排
公开(公告)号：EP2661773A2
公开(公告)日：2013-11-13
申请号：EP12700220.2
申请日：2012-01-09
申请人： Infineon Technologies Austria AG
发明人： WEIS, Rolf , HIRLER, Franz , FELDTKELLER, Martin , DEBOY, Gerald , STECHER, Matthias , WILLMEROTH, Armin
IPC分类号： H01L27/088 , H01L27/06 , H01L29/78 , H01L29/40 , H01L27/07 , G05F1/573 , H01L27/02 , H02H9/02
CPC分类号： H01L27/0207 , H01L21/823418 , H01L21/823431 , H01L21/823437 , H01L27/0623 , H01L27/0629 , H01L27/0727 , H01L27/088 , H01L27/0883 , H01L27/0886 , H01L27/098 , H01L29/0653 , H01L29/0692 , H01L29/0696 , H01L29/4236 , H01L29/4238 , H01L29/78 , H01L29/7817 , H01L29/7824 , H01L29/7825 , H01L29/7835 , H01L29/7838 , H03K17/06
摘要： Disclosed is a semiconductor device arrangement including a first semiconductor device having a load path, and a plurality of second transistors, each having a load path between a first and a second load terminal and a control terminal. The second transistors have their load paths connected in series and connected in series to the load path of the first transistor, each of the second transistors has its control terminal connected to the load terminal of one of the other second transistors, and one of the second transistors has its control terminal connected to one of the load terminals of the first semiconductor device.

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