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1. 发明授权

EP1917739B1 METHOD AND APPARATUS FOR ADJUSTING CHANNEL QUALITY INDICATOR FEEDBACK PERIOD TO INCREASE UPLINK CAPACITY 有权转让
公开(公告)号：EP1917739B1
公开(公告)日：2020-06-24
申请号：EP06789892.4
申请日：2006-08-22
申请人： InterDigital Technology Corporation
发明人： MARINIER, Paul , CASTOR, Douglas, R.
IPC分类号： H04B7/216

2. 发明公开

EP1779553A2 HIGH SPEED DOWNLINK PACKET ACCESS CO-PROCESSOR FOR UPGRADING THE CAPABILITIES OF AN EXISTING MODEM HOST 审中-公开
标题翻译：协处理器的既有数据主机高速分组接入唐氏化合物提高性能
公开(公告)号：EP1779553A2
公开(公告)日：2007-05-02
申请号：EP05773297.6
申请日：2005-07-19
申请人： INTERDIGITAL TECHNOLOGY CORPORATION
发明人： HACKETT, William, C. , DIFAZIO, Robert, A. , HEPLER, Edward, L. , REZNIK, Alexander , CASTOR, Douglas, R. , ZEIRA, Ariela , GAZDA, Robert, G. , KAEWELL, John, David, Jr.
IPC分类号： H04B7/216
CPC分类号： H04B1/707 , H04B1/406 , H04B2201/70707 , H04B2201/709727 , H04L2025/03509 , H04W88/02
摘要： A wireless transmit/receive unit (WTRU 250, Figure 1) for processing code division multiple access (CDMA) signals. The WTRU includes modem host (300) and a high speed downlink packet access (HSDPA) co-processor (400) , which communicate over a plurality of customizable interfaces. The modem host operates in accordance with third generation partnership project (3GPP) Release 4 (R4) standards, and the HSDPA co-processor enhances the wireless communication capabilities of the WTRU as a whole such that the WTRU operates in accordance with 3GPP Release 5 (S3) standards.

3. 发明公开

EP2478648A1 METHOD AND APPARATUS FOR DIMMING WITH RATE CONTROL FOR VISIBLE LIGHT COMMUNICATIONS (VLC) 有权
标题翻译：对于速率控制与可见光通信中断的方法和装置（VLC）
公开(公告)号：EP2478648A1
公开(公告)日：2012-07-25
申请号：EP10770657.4
申请日：2010-09-17
申请人： InterDigital Technology Corporation
发明人： CASTOR, Douglas, R. , KAUR,Samian , LIU, Weimin
IPC分类号： H04B10/10
CPC分类号： H04B10/116 , H04B10/1143 , H04B10/1149 , H04W48/16
摘要： A visible light communication, VLC, device and a method performed by a VLC device for lighting and data transmission is provided. A first stream of bits is received and a first switchpoint for transmitting the first stream of bits and first filler data is determined, wherein the first filler data is based on a brightness level, and The first stream of bits and the first filler data are transmitted, by red green and blue, RGB, light emitting diodes, LEDs, wherein the first filler data begins to be transmitted at the first switchpoint. A second stream of bits is received, wherein the second stream of bits is different than the first stream of bits, and a second switchpoint for transmitting the second stream of bits and second filler data is determined, wherein the second filler data is based on the brightness level. The second stream of bits and the second filler data are transmitted, by the RGB LEDs, wherein the second filler data begins to be transmitted at the second switchpoint, wherein a naked eye of a human cannot detect flicker of the VLC device.
摘要翻译：一种用于调光用于照明和数据传输在可见光通信（VLC）一照明器的方法和装置。

4. 发明公开

EP1751872A2 METHOD AND APPARATUS FOR EFFICIENTLY ALLOCATING AND DEALLOCATING INTERLEAVED DATA STORED IN A MEMORY STACK 审中-公开
标题翻译：方法和设备高效并分配重新分配在存储栈中存储的交织数据
公开(公告)号：EP1751872A2
公开(公告)日：2007-02-14
申请号：EP05745695.6
申请日：2005-05-03
申请人： INTERDIGITAL TECHNOLOGY CORPORATION
发明人： CASTOR, Douglas, R. , LEVI, Alan, M. , DESAI, Binish, P. , MCCLELLAN, George W.
IPC分类号： H03M7/00 , H04B7/216 , H04J1/00 , H04J3/00
CPC分类号： H04L47/14 , H04L47/50 , H04L47/564 , H04L47/621 , H04W28/14
摘要： A method and apparatus for efficiently allocating and deallocating interleaved data stored in a memory stack. The apparatus includes a processor and a memory including at least one memory stack. The processor receives and interleaves a plurality of data blocks. Each data block is allocated for a particular transport channel (TrCH) and has a designated transmission timing interval (TTI). The processor stores the interleaved data blocks in the memory stack based on the TTI of each data block, such that a data block having a larger TTI is allocated to the memory stack earlier and deallocated from the stack later than a data block having a smaller TTI. In one embodiment, the memory includes a first memory stack for common/shared uplink channels, a second memory stack for dedicated uplink channels, a third memory stack for common/shared downlink channels, and a fourth memory stack for dedicated downlink channels.
摘要翻译：一种用于有效地分配和释放存储在存储器堆交错的数据的方法和装置。该装置包括处理器和存储器，包括至少一个存储器堆。该处理器接收和交织数据块的复数。每个数据块被分配用于特定传输信道（传输信道），并具有指定的传输时间间隔（TTI）。该处理器存储基于每个数据块的TTI存储器堆叠的交错数据块，检查确实具有较大的TTI的数据块被分配给存储器堆早些时候和从堆栈中释放晚于具有较小的TTI的数据块，在一个，实施例的存储器包括用于公共/共享上行链路信道的第一存储器堆栈，对于专用上行链路信道的第二存储器堆栈，用于公共/共享下行链路信道的第三存储器堆栈，以及用于专用下行链路信道的第四存储器堆栈。

5. 发明公开

EP1917739A2 METHOD AND APPARATUS FOR ADJUSTING CHANNEL QUALITY INDICATOR FEEDBACK PERIOD TO INCREASE UPLINK CAPACITY 有权转让
标题翻译：方法和装置适应信道质量指示符反馈的持续时间，以便提高上行链路容量
公开(公告)号：EP1917739A2
公开(公告)日：2008-05-07
申请号：EP06789892.4
申请日：2006-08-22
申请人： INTERDIGITAL TECHNOLOGY CORPORATION
发明人： MARINIER, Paul , CASTOR, Douglas, R.
IPC分类号： H04B7/216
摘要： A method and apparatus for adjusting a channel quality indicator (CQI) feedback period to increase uplink capacity in a wireless communication system are disclosed. The uplink capacity is increased by reducing the uplink interference caused by CQI transmissions. A wireless transmit/receive unit (WTRU) monitors a status or downlink transmissions to the WTRU and sets the CQI feedback period based on the status of the downlink transmissions to the WTRU. A base station monitors uplink and downlink transmission needs. The base station determines the CQI feedback period of at least one WTRU based on the uplink and downlink transmission needs and sends a command to the WTRU to change the CQI feedback period of the WTRU.
摘要翻译：一种用于调整信道质量指示符（CQI）反馈周期来增加上行链路容量在无线通信系统中的方法和装置是游离缺失盘。上行链路容量是通过降低由CQI传输引起的上行链路干扰的增加。一种无线发射/接收单元（WTRU）监视一个状态或下行链路传输给WTRU，并且基于下行链路传输给WTRU的状态的CQI反馈周期。基站监视上行链路和下行链路传输的需求。基站确定性地雷基于上行链路和下行链路传输需要至少一个WTRU的CQI反馈周期和发送命令到所述WTRU改变WTRU的CQI反馈周期。

6. 发明授权

EP1389369B1 PHYSICAL LAYER PROCESSING FOR A WIRELESS COMMUNICATION SYSTEM USING CODE DIVISION MULTIPLE ACCESS 有权
标题翻译：物理层用于无线通信系统使用码复用接入处理
公开(公告)号：EP1389369B1
公开(公告)日：2010-05-26
申请号：EP02762110.1
申请日：2002-04-16
申请人： INTERDIGITAL TECHNOLOGY CORPORATION
发明人： CASTOR, Douglas, R. , MCCLELLAN, George, W. , MORABITO, Joseph, T.
IPC分类号： H04B7/208 , H04J3/02 , H03M13/27 , H04L1/00
CPC分类号： H04L1/0059 , H03M13/09 , H03M13/23 , H03M13/271 , H03M13/276 , H03M13/2957 , H03M13/6362 , H03M13/6513 , H04L1/0045 , H04L1/0066 , H04L1/0068 , H04L1/0071

7. 发明授权

EP1810437B1 WIRELESS COMMUNICATION METHOD AND APPARATUS FOR ADAPTIVELY BIASING CHANNEL QUALITY INDICATORS TO MAINTAIN A DESIRED BLOCK ERROR RATE 有权
标题翻译：对于所需的误块率的保鲜信道质量指示符自适应偏置无线通信方法及装置
公开(公告)号：EP1810437B1
公开(公告)日：2009-07-01
申请号：EP05824244.7
申请日：2005-10-25
申请人： INTERDIGITAL TECHNOLOGY CORPORATION
发明人： PIETRASKI, Philip, J. , STERNBERG, Gregory, S. , CASTOR, Douglas, R.
IPC分类号： H04W4/00 , H04L1/00 , H04L1/20
CPC分类号： H04L1/0026 , H04L1/0003 , H04L1/0007 , H04L1/0009 , H04L1/0021 , H04L1/1867 , H04W24/00 , H04W28/18 , H04W48/08 , H04W52/12 , H04W52/20
摘要： A method and apparatus for adaptively biasing a channel quality indicator (CQI) used for setting a configuration of communication between a transmitter and a receiver in a wireless communication system. The receiver sends a CQI and positive acknowledgement (ACK)/negative acknowledgement (NACK) messages to the transmitter. The ACK/NACK messages indicate the absence or presence of error, respectively, in a transmitted data packet. The CQI is derived from the signal-to-interference ratio (SIR) and the ACK/NACK messages. The transmitter calculates the block error rate (BLER) of the transmitted data packets based upon the ACK/NACK messages sent from the receiver. The transmitter compares the BLER of the transmitted data packets to a target BLER and biases the CQI based on the comparison in order to achieve the target BLER.

8. 发明公开

EP1810437A2 WIRELESS COMMUNICATION METHOD AND APPARATUS FOR ADAPTIVELY BIASING CHANNEL QUALITY INDICATORS TO MAINTAIN A DESIRED BLOCK ERROR RATE 有权
标题翻译：对于所需的误块率的保鲜信道质量指示符自适应偏置无线通信方法及装置
公开(公告)号：EP1810437A2
公开(公告)日：2007-07-25
申请号：EP05824244.7
申请日：2005-10-25
申请人： INTERDIGITAL TECHNOLOGY CORPORATION
发明人： PIETRASKI, Philip, J. , STERNBERG, Gregory, S. , CASTOR, Douglas, R.
IPC分类号： H04L5/16 , H04B15/00
CPC分类号： H04L1/0026 , H04L1/0003 , H04L1/0007 , H04L1/0009 , H04L1/0021 , H04L1/1867 , H04W24/00 , H04W28/18 , H04W48/08 , H04W52/12 , H04W52/20
摘要： A method and apparatus for adaptively biasing a channel quality indicator (CQI) used for setting a configuration of communication between a transmitter and a receiver in a wireless communication system. The receiver sends a CQI and positive acknowledgement (ACK)/negative acknowledgement (NACK) messages to the transmitter. The ACK/NACK messages indicate the absence or presence of error, respectively, in a transmitted data packet. The CQI is derived from the signal-to-interference ratio (SIR) and the ACK/NACK messages. The transmitter calculates the block error rate (BLER) of the transmitted data packets based upon the ACK/NACK messages sent from the receiver. The transmitter compares the BLER of the transmitted data packets to a target BLER and biases the CQI based on the comparison in order to achieve the target BLER.

9. 发明授权

EP1495567B1 Software parameterizable control blocks for use in physical layer processing 有权
标题翻译：软件参数控制块FOR USE物理层的处理
公开(公告)号：EP1495567B1
公开(公告)日：2007-01-03
申请号：EP03719734.0
申请日：2003-04-15
申请人： INTERDIGITAL TECHNOLOGY CORPORATION
发明人： HEPLER, Edward, L. , STARSINIC, Michael, F. , BASS, David, s. , DESAI, Binish , LEVI, Alan, M. , MCCLELLAN, George, W. , CASTOR, Douglas, R.
IPC分类号： H04J4/00
CPC分类号： H04W88/06 , H04B1/0067 , H04B1/406 , H04B1/707 , H04B7/2618 , H04B2201/70707 , H04L1/0061 , H04L1/0068 , H04L1/0071 , H04L1/08 , H04L2001/0094 , H04W28/18 , H04W74/02 , H04W80/00
摘要： A physical layer transport composite processing system used in a wireless communication system. A plurality of interconnected processing blocks are provided. The blocks are interconnected by a read data bus, a write data bus and a control bus. The blocks include a transport channel processing block (303, 307), a composite channel processing block (305, 309) and a chip rate processing block (301, 311). At least two of the blocks are capable of processing data for a plurality of wireless formats. A first set of parameters is programmed into the blocks for a particular wireless mode. The blocks are operated to process data in the particular wireless format mode.

10. 发明公开

EP1495567A2 SOFTWARE PARAMETERIZABLE CONTROL BLOCKS FOR USE IN PHYSICAL LAYER PROCESSING 有权
标题翻译：软件参数控制块FOR USE物理层的处理
公开(公告)号：EP1495567A2
公开(公告)日：2005-01-12
申请号：EP03719734.0
申请日：2003-04-15
申请人： INTERDIGITAL TECHNOLOGY CORPORATION
发明人： HEPLER, Edward, L. , STARSINIC, Michael, F. , BASS, David, s. , DESAI, Binish , LEVI, Alan, M. , MCCLELLAN, George, W. , CASTOR, Douglas, R.
IPC分类号： H04J4/00
CPC分类号： H04W88/06 , H04B1/0067 , H04B1/406 , H04B1/707 , H04B7/2618 , H04B2201/70707 , H04L1/0061 , H04L1/0068 , H04L1/0071 , H04L1/08 , H04L2001/0094 , H04W28/18 , H04W74/02 , H04W80/00
摘要： A physical layer transport composite processing system used in a wireless communication system. A plurality of interconnected processing blocks are provided. The blocks are interconnected by a read data bus, a write data bus and a control bus. The blocks include a transport channel processing block (303, 307), a composite channel processing block (305, 309) and a chip rate processing block (301, 311). At least two of the blocks are capable of processing data for a plurality of wireless formats. A first set of parameters is programmed into the blocks for a particular wireless mode. The blocks are operated to process data in the particular wireless format mode.

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