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2. 发明公开

EP2075834A1 Solder bumps for flip chip bonding with higher density 审中-公开
标题翻译： Löthöckerzum Flip-Chip-Bonden mitHöhererDichte
公开(公告)号：EP2075834A1
公开(公告)日：2009-07-01
申请号：EP08150793.1
申请日：2008-01-29
申请人： INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM vzw (IMEC) , Katholieke Universiteit Leuven, K.U. Leuven R&D
发明人： Limaye, Paresh , Labie, Riet , Beyne, Eric , Soussan, Philippe , De Moor, Piet
IPC分类号： H01L23/485
CPC分类号： H01L24/11 , H01L24/03 , H01L24/05 , H01L24/12 , H01L24/16 , H01L24/81 , H01L2224/02166 , H01L2224/0401 , H01L2224/05568 , H01L2224/0558 , H01L2224/05599 , H01L2224/05639 , H01L2224/05657 , H01L2224/1147 , H01L2224/11474 , H01L2224/11901 , H01L2224/11902 , H01L2224/13007 , H01L2224/13023 , H01L2224/1308 , H01L2224/13083 , H01L2224/131 , H01L2224/13111 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2224/13157 , H01L2224/13164 , H01L2224/16 , H01L2224/81191 , H01L2224/81801 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01014 , H01L2924/01022 , H01L2924/01023 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H05K3/3436 , H05K2201/10242 , Y02P70/613 , H01L2224/13099 , H01L2224/29099 , H01L2924/00 , H01L2224/05552
摘要： An interconnect structure has a solder bump for attaching a die to a substrate. A cup shaped solder retaining part (70) retains at least part (90) of the solder in a non-spherical shape so that the bump extends from a surface of the die with a height greater than a diameter of the bump even after reflow. The bump can be formed by a stack of the solder retaining part and other layers of metal and solder (50). By shaping the solder, the spacing between bumps reduced. By shaping the solder to increase its height, the compliance of the bump is improved and thermally induced stress on the die is reduced.
摘要翻译：互连结构具有用于将管芯附接到衬底的焊料凸块。杯形焊料保持部分（70）将焊料的至少一部分（90）保持为非球形形状，使得即使在回流之后，凸起也从模具的表面延伸高度大于凸块的直径。凸块可以由焊料保持部分和其它金属和焊料层（50）的堆叠形成。通过成形焊料，凸块之间的间距减小。通过使焊料成形以增加其高度，凸起的顺应性得到改善，并且模具上的热致应力降低。

3. 发明授权

EP1985579B1 Connecting scheme for the orthogonal assembly of microstructures 有权转让
标题翻译：微结构正交组装的连接方案
公开(公告)号：EP1985579B1
公开(公告)日：2018-01-10
申请号：EP08154893.5
申请日：2008-04-21
申请人： IMEC VZW , Katholieke Universiteit Leuven , Albert-Ludwigs-Universität Freiburg
发明人： Aarts, Arno , Neves, Hercules Pereira , Van Hoof, Chris , Beyne, Eric , Puers, Robert , Ruther, Patrick
IPC分类号： B81C3/00 , A61N1/05 , A61B5/04 , A61B5/0478
CPC分类号： B81C3/008 , A61B5/04001 , A61B5/0478 , A61B2562/125 , A61N1/0529 , A61N1/0531 , B81B2201/055 , Y10T29/49222
摘要： In the present invention a device for sensing and/or actuation purposes is presented in which microstructures (20) comprising shafts (2) with different functionality and dimensions can be inserted in a modular way. That way out-of-plane connectivity, mechanical clamping between the microstructures (20) and a substrate (1) of the device, and electrical connection between electrodes (5) on the microstructures (20) and the substrate (1) can be realized. Also connections to external circuitry can be realised. Also microfluidic channels (10) in the microstructures (20) can be connected to external equipment. Also a method to fabricate and assemble the device is provided.

4. 发明公开

EP1985579A2 Connecting scheme for the orthogonal assembly of microstructures 有权转让
标题翻译： Schaltdiagrammfürdie orthogonale Anordnung von Mikrostrukturen
公开(公告)号：EP1985579A2
公开(公告)日：2008-10-29
申请号：EP08154893.5
申请日：2008-04-21
申请人： Interuniversitair Microelektronica Centrum (IMEC) , Katholieke Universiteit Leuven
发明人： Aarts, Arno , Neves, Hercules Pereira , Van Hoof, Chris , Beyne, Eric , Puers, Robert
IPC分类号： B81C3/00
CPC分类号： B81C3/008 , A61B5/04001 , A61B5/0478 , A61B2562/125 , A61N1/0529 , A61N1/0531 , B81B2201/055 , Y10T29/49222
摘要： In the present invention a device for sensing and/or actuation purposes is presented in which microstructures (20) comprising shafts (2) with different functionality and dimensions can be inserted in a modular way. That way out-of-plane connectivity, mechanical clamping between the microstructures (20) and a substrate (1) of the device, and electrical connection between electrodes (5) on the microstructures (20) and the substrate (1) can be realized. Also connections to external circuitry can be realised. Also microfluidic channels (10) in the microstructures (20) can be connected to external equipment. Also a method to fabricate and assemble the device is provided.
摘要翻译：在本发明中，提供了用于感测和/或致动目的的装置，其中可以以模块化方式插入包括具有不同功能和尺寸的轴（2）的微结构（20）。通过这种方式，可以实现平面外连接，微结构（20）和器件的衬底（1）之间的机械夹紧以及微结构（20）和衬底（1）上的电极（5）之间的电连接。还可以实现与外部电路的连接。微结构（20）中的微流体通道（10）也可以连接到外部设备。还提供了一种制造和组装该装置的方法。

5. 发明公开

EP2605273A3 Method for forming isolation trenches in micro-bump interconnect structures and devices obtained thereof 审中-公开
标题翻译：在微凸点互连结构中形成隔离沟槽的方法和由此获得的器件
公开(公告)号：EP2605273A3
公开(公告)日：2017-08-09
申请号：EP12197098.2
申请日：2012-12-13
申请人： IMEC , Katholieke Universiteit Leuven K.U. Leuven R&D
发明人： Zhang, Wenqi , Wang, Wei-E , Eneman, Geert , Beyne, Eric , Ivankovic, Andrej
IPC分类号： H01L23/31 , H01L23/48 , H01L25/065
CPC分类号： H01L21/4853 , H01L21/185 , H01L23/3178 , H01L23/481 , H01L23/49827 , H01L23/5384 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/14 , H01L25/0657 , H01L2224/02235 , H01L2224/0401 , H01L2224/05009 , H01L2224/05546 , H01L2224/05562 , H01L2224/0557 , H01L2224/05573 , H01L2224/05647 , H01L2224/13023 , H01L2224/13025 , H01L2224/13111 , H01L2224/14181 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2924/00014 , H01L2924/01029 , H01L2924/01322 , H01L2924/00 , H01L2224/05552
摘要： The invention is related to a substrate (100) suitable for use in a stack of interconnected substrates, comprising :
- A base layer (130), having a front side (135) and a back side (115) surface parallel to the plane of the base layer,
- One or more interconnect structures, each of said structures comprising :
● A via (110) filled with an electrically conductive material, said via running through the complete thickness of the base layer, thereby forming an electrical connection between said front side and back side surfaces of the base layer,
● on the back side surface (115) of the base layer : a landing pad (160) and a microbump (165) in electrical connection with said filled via,

characterized in that the backside surface (115) of said base layer (130) comprises one or more isolation ring trenches (145), each of said trenches surrounding one or more of said interconnect structures. The invention is equally related to a stack of said substrates, and to methods for producing said substrates and said stack of substrates.
摘要翻译：本发明涉及一种适用于一叠互连基板的基板（100），包括： - 基层（130），其具有平行于所述平面的前侧（135）和后侧（115） - 一个或多个互连结构，每个所述结构包括：●填充有导电材料的通孔（110），所述通孔延伸穿过基层的整个厚度，由此在所述前端在所述基层的后侧表面（115）上：接合垫（160）和与所述填充通孔电连接的微凸块（165），其特征在于，所述后侧表面所述基层（130）的所述沟槽（115）包括一个或多个隔离环沟槽（145），每个所述沟槽围绕一个或多个所述互连结构。本发明同样涉及所述衬底的堆叠，以及用于制造所述衬底和所述衬底的堆叠的方法。

6. 发明公开

EP2889900A2 Method for aligning micro-electronic components using an alignment liquid and electrostatic alignment as well as a corresponding device 有权
标题翻译：通过的液体和静电方位的方位的装置，用于微电子元件的对准的方法和对应的设备
公开(公告)号：EP2889900A2
公开(公告)日：2015-07-01
申请号：EP14192965.3
申请日：2014-11-13
申请人： IMEC VZW , Katholieke Universiteit Leuven
发明人： Dubey, Vikas , De Wolf, Ingrid , Beyne, Eric
IPC分类号： H01L21/60 , H01L23/485
摘要： According to the invention, alignment of a first micro-electronic component (3) to a receiving surface of a second micro-electronic component (1) is realised by a capillary force-induced self-alignment, combined with an electrostatic alignment. The latter is accomplished by providing at least one first electrical conductor line (6, 7, 16) along the periphery of the first component (3), and at least one second electrical conductor (11, 15) along the periphery of the location on the receiving surface of the second component (1) onto which the first component (3) is to be placed. The contact areas (2, 4) surrounded by the conductor lines (6, 7, 11, 15, 16) are covered with a wetting layer (5). The electrical conductor lines (6, 7, 11, 15, 16) may be embedded in a strip of anti-wetting material (8, 12, 17, 18) that runs along said peripheries to create a wettability contrast. The wettability contrast is instrumental in maintaining a drop of alignment liquid (e.g. water) (33) between the contact areas (2, 4) so as to obtain self-alignment by capillary force. By applying appropriate charges on the conductor lines (6, 7, 15, 16)), electrostatic self-alignment is realized, which improves the alignment obtained through capillary force and maintains said alignment during evaporation of the liquid (33).
摘要翻译：。根据本发明，第一微电子元件（3）的第二微电子元件（1）的接收表面的对准是通过毛细管力诱导的自对准实现，对静电对准结合。后者是通过沿位置的周边上提供沿着所述第一部件（3）的周边的至少一个第一电导体线（6,7，16），和至少一个第二电导体（11，15）来实现所述第二部件的接收表面（1）到所述第一部件（3）要被放置。（2，4）通过导线（6，7，11，15，16）所包围覆盖有润湿层的接触区域（5）。的电导线（6，7，11，15，16）可以在抗湿材料（8，12，17，18）的条带被嵌入并沿着所述周边延伸以创建可润湿性的对比。的润湿性的对比是在维护对准液体（水E.G.）的接触区域之间的降低（33）的工具（2,4），以便通过毛细管力得到自对准。通过在导体线（6，7，15，16）），静电自对准得以实现，从而提高了通过毛细管力获得的对准和液体（33）的蒸发过程中保持所述对准施加适当的收费。

8. 发明公开

EP3185290A1 METHOD FOR SELF-ALIGNED SOLDER REFLOW BONDING AND DEVICES OBTAINED THEREFROM 审中-公开
标题翻译：用于自对准焊料回流焊接的方法和由此获得的器件
公开(公告)号：EP3185290A1
公开(公告)日：2017-06-28
申请号：EP15202661.3
申请日：2015-12-24
申请人： IMEC VZW , Katholieke Universiteit Leuven
发明人： Dubey, Vikas , Beyne, Eric , Derakhshandeh, Jaber
IPC分类号： H01L23/485 , H01L21/60 , H01L25/065
CPC分类号： H01L24/81 , H01L23/291 , H01L23/293 , H01L23/3192 , H01L23/49827 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/83 , H01L24/92 , H01L25/0657 , H01L25/50 , H01L2224/03424 , H01L2224/0345 , H01L2224/03462 , H01L2224/03464 , H01L2224/03616 , H01L2224/0401 , H01L2224/05018 , H01L2224/05026 , H01L2224/05082 , H01L2224/05147 , H01L2224/05155 , H01L2224/05157 , H01L2224/05166 , H01L2224/05176 , H01L2224/05181 , H01L2224/05184 , H01L2224/05186 , H01L2224/05541 , H01L2224/05558 , H01L2224/05559 , H01L2224/05571 , H01L2224/05611 , H01L2224/0601 , H01L2224/1191 , H01L2224/13005 , H01L2224/13009 , H01L2224/13014 , H01L2224/13022 , H01L2224/13124 , H01L2224/13147 , H01L2224/13155 , H01L2224/13184 , H01L2224/13541 , H01L2224/13562 , H01L2224/1357 , H01L2224/13644 , H01L2224/13655 , H01L2224/13657 , H01L2224/16058 , H01L2224/16112 , H01L2224/16146 , H01L2224/16147 , H01L2224/2919 , H01L2224/32145 , H01L2224/73104 , H01L2224/73204 , H01L2224/75251 , H01L2224/8114 , H01L2224/81143 , H01L2224/81191 , H01L2224/8181 , H01L2224/81815 , H01L2224/81907 , H01L2224/83191 , H01L2224/8385 , H01L2224/92225 , H01L2224/94 , H01L2225/06513 , H01L2225/06541 , H01L2924/01013 , H01L2924/01028 , H01L2924/01029 , H01L2924/01074 , H01L2224/81 , H01L2924/00012 , H01L2924/00014 , H01L2924/04941 , H01L2924/04953 , H01L2924/049 , H01L2924/053 , H01L2924/01049 , H01L2924/014 , H01L2924/01047 , H01L2924/01083 , H01L2924/01005 , H01L2924/206 , H01L2924/20106 , H01L2924/207
摘要： The present disclosure is related to a method for producing a stack of semiconductor devices and the stacked device obtained thereof. The method comprises providing a first semiconductor device comprising a dielectric layer with a hole, the hole lined with a metal layer and partially filled with solder material, providing a second semiconductor device with a compliant layer having a metal protrusion through the compliant layer, the protrusion capped with a capping layer. Mounting the devices by landing the metal protrusion in the hole, wherein the compliant layer is spaced from the dielectric layer. Thereafter reflowing the solder material, thereby bonding the devices such that the compliant layer is contacting the dielectric layer.
摘要翻译：本公开涉及用于制造半导体器件堆叠的方法以及由此获得的堆叠器件。该方法包括提供包括具有孔的介电层的第一半导体器件，该孔衬有金属层并且部分地填充有焊料材料，为第二半导体器件提供具有穿过柔性层的金属突起的柔性层，突起用覆盖层覆盖。通过将金属突起降落在孔中来安装器件，其中柔性层与介电层间隔开。此后回流焊料材料，从而键合器件，使得柔性层与介电层接触。

9. 发明公开

EP2889900A3 Method for aligning micro-electronic components using an alignment liquid and electrostatic alignment as well as a corresponding device 有权
标题翻译：通过的液体和静电方位的方位的装置，用于微电子元件的对准的方法和对应的设备
公开(公告)号：EP2889900A3
公开(公告)日：2015-10-28
申请号：EP14192965.3
申请日：2014-11-13
申请人： IMEC VZW , Katholieke Universiteit Leuven
发明人： Dubey, Vikas , De Wolf, Ingrid , Beyne, Eric
IPC分类号： H01L21/60 , H01L23/485
摘要： According to the invention, alignment of a first micro-electronic component (3) to a receiving surface of a second micro-electronic component (1) is realised by a capillary force-induced self-alignment, combined with an electrostatic alignment. The latter is accomplished by providing at least one first electrical conductor line (6, 7, 16) along the periphery of the first component (3), and at least one second electrical conductor (11, 15) along the periphery of the location on the receiving surface of the second component (1) onto which the first component (3) is to be placed. The contact areas (2, 4) surrounded by the conductor lines (6, 7, 11, 15, 16) are covered with a wetting layer (5). The electrical conductor lines (6, 7, 11, 15, 16) may be embedded in a strip of anti-wetting material (8, 12, 17, 18) that runs along said peripheries to create a wettability contrast. The wettability contrast is instrumental in maintaining a drop of alignment liquid (e.g. water) (33) between the contact areas (2, 4) so as to obtain self-alignment by capillary force. By applying appropriate charges on the conductor lines (6, 7, 15, 16)), electrostatic self-alignment is realized, which improves the alignment obtained through capillary force and maintains said alignment during evaporation of the liquid (33).

10. 发明公开

EP2605273A2 Method for forming isolation trenches in micro-bump interconnect structures and devices obtained thereof 审中-公开
标题翻译：一种用于制造绝缘沟槽的在微凸块接合的结构和设备由此产生过程
公开(公告)号：EP2605273A2
公开(公告)日：2013-06-19
申请号：EP12197098.2
申请日：2012-12-13
申请人： IMEC , Katholieke Universiteit Leuven K.U. Leuven R&D
发明人： Zhang, Wenqi , Wang, Wei-E , Eneman, Geert , Beyne, Eric , Ivankovic, Andrej
IPC分类号： H01L23/31 , H01L23/48 , H01L25/065
CPC分类号： H01L21/4853 , H01L21/185 , H01L23/3178 , H01L23/481 , H01L23/49827 , H01L23/5384 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/14 , H01L25/0657 , H01L2224/02235 , H01L2224/0401 , H01L2224/05009 , H01L2224/05546 , H01L2224/05562 , H01L2224/0557 , H01L2224/05573 , H01L2224/05647 , H01L2224/13023 , H01L2224/13025 , H01L2224/13111 , H01L2224/14181 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2924/00014 , H01L2924/01029 , H01L2924/01322 , H01L2924/00 , H01L2224/05552
摘要： The invention is related to a substrate (100) suitable for use in a stack of interconnected substrates, comprising :
- A base layer (130), having a front side (135) and a back side (115) surface parallel to the plane of the base layer,
- One or more interconnect structures, each of said structures comprising :
● A via (110) filled with an electrically conductive material, said via running through the complete thickness of the base layer, thereby forming an electrical connection between said front side and back side surfaces of the base layer,
● on the back side surface (115) of the base layer : a landing pad (160) and a microbump (165) in electrical connection with said filled via,

characterized in that the backside surface (115) of said base layer (130) comprises one or more isolation ring trenches (145), each of said trenches surrounding one or more of said interconnect structures. The invention is equally related to a stack of said substrates, and to methods for producing said substrates and said stack of substrates.
摘要翻译：本发明涉及一种基片（100），适用于相互连接的基片的叠层，包括： - 具有前侧（135）和背面的基体层（130）（115）面平行于该平面基础层， - 一个或多个互连结构，每个所述结构包括： - 经由在导电材料填充（110），所述经由穿过基极层的整个厚度上运行，从而形成在所述的电连接基础层的正面和背面的表面， - 所述基础层的所述背侧表面（115）上：在DASS特点连接焊盘（160）和在填充通孔，与所述电连接的微凸块（165）管芯所述基层（130）的背侧表面（115）包括一个或多个隔离沟槽环（145），每个周围的一个或多个所述互连结构的所述沟槽中的。本发明同样涉及到所述衬底的堆叠，以及用于产生所述基片和基片的所述叠层的方法。

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