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    • 3. 发明公开
    • SOLID-STATE IMAGING APPARATUS
    • FESTKÖRPER-BILDGEBERVORRICHTUNG
    • EP2129107A1
    • 2009-12-02
    • EP07737541.8
    • 2007-02-28
    • Hamamatsu Photonics K.K.
    • MIZUNO, SeiichiroFUNAKOSHI, Haruhiro
    • H04N5/335H01L27/146H04N1/028
    • H04N5/37452
    • A solid-state imaging device 1 includes N pixel sections 10 i to 10 N , transimpedance circuits 20a and 20b, integrating circuits 30a and 30b, and a difference arithmetic circuit 40. Each pixel section 10 n includes a photoelectric converting circuit including a photodiode, and a first holding circuit and a second holding circuit which hold an output voltage of the photoelectric converting circuit. A voltage held by the first holding circuit of each pixel section 10 n is input into the difference arithmetic circuit 40 through a common wire 50a, the transimpedance circuit 20a, and the integrating circuit 30a. A voltage held by the second holding circuit of each pixel section 10 n is input into the difference arithmetic circuit 40 through a common wire 50b, the transimpedance circuit 20b, and the integrating circuit 30b. A voltage corresponding to a difference between the voltages output from the integrating circuits 30a and 30b, respectively, is output from the difference arithmetic circuit 40.
    • 固态成像装置1包括N个像素部分10i至10N,跨阻抗电路20a和20b,积分电路30a和30b以及差分运算电路40.每个像素部分10n包括光电转换电路,其包括光电二极管, 以及保持光电转换电路的输出电压的第一保持电路和第二保持电路。 每个像素部分10 n的第一保持电路保持的电压通过公共线50a,跨阻抗电路20a和积分电路30a输入差分运算电路40。 每个像素部分10 n的第二保持电路保持的电压通过公共线50b,跨阻抗电路20b和积分电路30b输入差分运算电路40。 从差分运算电路40输出对应于从积分电路30a和30b输出的电压之间的差分的电压。
    • 4. 发明公开
    • SOLID STATE IMAGING DEVICE
    • HALBLEITER-BILDGEBUNGSBAUELEMENT
    • EP1980208A1
    • 2008-10-15
    • EP07707703.0
    • 2007-01-30
    • HAMAMATSU PHOTONICS K.K.
    • SUGIYAMA, YukinobuMIZUNO, Seiichiro
    • A61B6/14G01T1/20H01L27/146H01L31/09H04N5/32
    • H04N5/378A61B6/14G01T1/2018H03F3/08H04N5/32H04N5/357H04N5/3575H04N5/3745
    • A solid-state image pickup device 1 includes an imaging photodetecting section 10, a triggering photodetecting section 20, a row selecting section 30, a column selecting section 40, a voltage holding section 50, an output section 60, and a controlling section 70. The imaging photodetecting section 10 is for taking an image of incident light, and includes pixel sections P 1,1 to P M,N arrayed two dimensionally in M rows and N columns. The triggering photodetecting section 20 is for detecting an incidence of light, and includes a triggering photodiode that generates electric charge of an amount according to an incident light intensity. The output section 60 outputs pixel data of a value according to the amount of electric charge generated by a photodiode of any pixel section P m,n of the pixel sections P 1,1 to P M,N included in the imaging photodetecting section 10 and triggering data of a value according to the amount of electric charge generated by the triggering photodiode included in the triggering photodetecting section 20 to a common output signal line Lout.
    • 固体摄像装置1包括摄像受光部10,触发用光检测部20,行选择部30,列选择部40,电压保持部50,输出部60以及控制部70。 成像光检测部分10用于拍摄入射光的图像,并且包括以M行和N列二维排列的像素部分P 1,1至PM,N。 触发光检测部分20用于检测光的入射,并且包括产生根据入射光强度的量的电荷的触发光电二极管。 输出部分60根据由成像光电检测部分10中包括的像素部分P 1,1至PM,N的任何像素部分P m,n的光电二极管产生的电荷量输出值的像素数据,并触发 根据由触发光电检测部20中包含的触发光电二极管所产生的电荷量与公共输出信号线Lout的值的数据。
    • 6. 发明公开
    • CAMERA SYSTEM FOR HIGH-SPEED IMAGE PROCESSING
    • KAMERASYSTEMFÜRBILDVERARBEITUNG MIT HOHER BETRIEBSGESCHWINDIGKEIT
    • EP1223549A1
    • 2002-07-17
    • EP00964646.4
    • 2000-10-04
    • Hamamatsu Photonics K.K.
    • TOYODA, HaruyoshiNAKAMURA, KazuhiroMIZUNO, SeiichiroYAMAKAWA, HirooMUKOHZAKA, Naohisa
    • G06T1/20
    • H04N5/335G06T1/20
    • The analog-to-digital converter array 13 includes one analog-to-digital converter 210 for each row of photodetectors 120 in the photodetector array 11. The image-processing unit 14 includes the plurality of processing circuits 400 for performing high-speed image processing. The signal converter 17 combines the output signals from the analog-to-digital converter array 13 with output signals from the image-processing unit 14. Under control of the control circuit 15 and the signal conversion controller 19, the signal converter 17 downconverts the composite signal at an important timing to a frame rate suitable for display on the monitor 18 and subsequently displays the signal on the monitor 18.
    • 模数转换器阵列13包括用于光电检测器阵列11中的每行光电检测器120的一个模拟 - 数字转换器210.图像处理单元14包括用于执行高速图像处理的多个处理电路400 。 信号转换器17将来自模拟 - 数字转换器阵列13的输出信号与来自图像处理单元14的输出信号进行组合。在控制电路15和信号转换控制器19的控制下,信号转换器17将合成器 信号在适合于在监视器18上显示的帧速率的重要定时,并随后在监视器18上显示信号。