会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 3. 发明公开
    • Bit erasable electrically erasable programmable read only memory
    • Bit-löschbarerEEPROM。
    • EP0108681A2
    • 1984-05-16
    • EP83402096.8
    • 1983-10-27
    • FAIRCHILD CAMERA & INSTRUMENT CORPORATION
    • Tickle, Andrew C.
    • G11C17/00
    • G11C16/14G11C16/0416G11C16/16
    • A bit erasable EEPROM is constructed which alleviates the problems of early termination of erasure and over-erasure. Rather than erasing the entire array at once, and thereby causing the problem of early termination of erasure and over-erasure, each cell is erased individually. In another embodiment of this invention, a group of one or more cells on a word line are erased at once with self-termination of the erase operation of each cell occurring when that cell's transistor becomes conductive, and at that time the erasure of only that cell ceases. The erasure of a particular cell ceases without effecting the erasure of operation of other cells. Therefore, the electrical erasure is self-limiting for each individual cell. In another embodiment of this invention, a group of one or more cells on a bit line are erased at once with no danger of under or over-erasure of each particular cell.
    • 构建了一种可擦除EEPROM,可以缓解早期的擦除和超出擦除的问题。 而不是一次擦除整个阵列,从而导致早期的擦除和超擦除的问题,每个单元被单独擦除。 在本发明的另一个实施例中,字线上的一个或多个单元的一组被同时擦除,当该单元的晶体管导通时,每个单元的擦除操作自身终止,并且在那时擦除仅该 细胞停止 特定单元的擦除停止而不影响其它单元的操作的擦除。 因此,电擦除对于每个单独的单元是自限制的。 在本发明的另一个实施例中,位线上的一个或多个单元的组一次被擦除,没有每个特定单元的不足或过度擦除的危险。
    • 4. 发明公开
    • Bit erasable electrically erasable programmable read only memory
    • 可擦除可擦除可擦除可编程只读存储器
    • EP0108681A3
    • 1986-10-15
    • EP83402096
    • 1983-10-27
    • FAIRCHILD CAMERA & INSTRUMENT CORPORATION
    • Tickle, Andrew C.
    • G11C17/00
    • G11C16/14G11C16/0416G11C16/16
    • A bit erasable EEPROM is constructed which alleviates the problems of early termination of erasure and over-erasure. Rather than erasing the entire array at once, and thereby causing the problem of early termination of erasure and over-erasure, each cell is erased individually. In another embodiment of this invention, a group of one or more cells on a word line are erased at once with self-termination of the erase operation of each cell occurring when that cell's transistor becomes conductive, and at that time the erasure of only that cell ceases. The erasure of a particular cell ceases without effecting the erasure of operation of other cells. Therefore, the electrical erasure is self-limiting for each individual cell. In another embodiment of this invention, a group of one or more cells on a bit line are erased at once with no danger of under or over-erasure of each particular cell.
    • 构建了一种可擦除EEPROM,可以缓解早期的擦除和超出擦除的问题。 而不是一次擦除整个阵列,从而导致早期的擦除和超擦除的问题,每个单元被单独擦除。 在本发明的另一个实施例中,字线上的一个或多个单元的一组被同时擦除,当该单元的晶体管导通时,每个单元的擦除操作自身终止,并且在那时擦除仅该 细胞停止 特定单元的擦除停止而不影响其它单元的操作的擦除。 因此,电擦除对于每个单独的单元是自限制的。 在本发明的另一个实施例中,位线上的一个或多个单元的组一次被擦除,没有每个特定单元的不足或过度擦除的危险。
    • 6. 发明公开
    • Fault isolating memory decoder
    • 故障隔离存储器解码器
    • EP0074305A3
    • 1985-08-14
    • EP82401569
    • 1982-08-24
    • FAIRCHILD CAMERA & INSTRUMENT CORPORATION
    • Tickle, Andrew C.
    • G06F11/20
    • G11C29/789
    • Logic elements are added to a conventional decoder to allow one or more defective blocks of columns to be isolated and one or more redundant blocks of columns to be substituted. The redundant block of columns is programmed by non-volatile latches. A repair address is stored in the latches. When the decoded address to a block of columns is the same as the repair address, the redundant block of columns is selected and all other blocks of columns are de-selected. Normal column block addressing is unaffected when the decoded address is different from the repair address.
    • 将逻辑元件添加到常规解码器以允许一个或多个有缺陷的列的块被隔离并且一个或多个冗余的列的块被替换。 列的冗余块由非易失性锁存器编程。 修复地址存储在锁存器中。 当解码的地址到列的块与修复地址相同时,选择列的冗余块,并且取消选择列的所有其他块。 当解码的地址与修复地址不同时,正常的列块寻址不受影响。
    • 7. 发明公开
    • Fault isolating memory decoder
    • Fehlerisolierender Speicherdecodierer。
    • EP0074305A2
    • 1983-03-16
    • EP82401569.7
    • 1982-08-24
    • FAIRCHILD CAMERA & INSTRUMENT CORPORATION
    • Tickle, Andrew C.
    • G06F11/20
    • G11C29/789
    • Logic elements are added to a conventional decoder to allow one or more defective blocks of columns to be isolated and one or more redundant blocks of columns to be substituted. The redundant block of columns is programmed by non-volatile latches. A repair address is stored in the latches. When the decoded address to a block of columns is the same as the repair address, the redundant block of columns is selected and all other blocks of columns are de-selected. Normal column block addressing is unaffected when the decoded address is different from the repair address.
    • 将逻辑元件添加到常规解码器以允许一个或多个有缺陷的列的块被隔离并且一个或多个冗余的列的块被替换。 列的冗余块由非易失性锁存器编程。 修复地址存储在锁存器中。 当解码的地址到列的块与修复地址相同时,选择列的冗余块,并且取消选择列的所有其他块。 当解码的地址与修复地址不同时,正常的列块寻址不受影响。