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1. 发明公开

EP0901286A1 Multistandard decoder for Huffman codes 失效
标题翻译：用于霍夫曼码的多标准解码器
公开(公告)号：EP0901286A1
公开(公告)日：1999-03-10
申请号：EP98202135.4
申请日：1995-02-28
申请人： Discovision Associates
发明人： Wise, Adrian Philip , Sotheran, Martin William , Robbins, William Philip , Finch, Helen Rosemary , Boyd, Kevin James
IPC分类号： H04N7/24 , G06F9/38 , G06F13/00
CPC分类号： G06F13/28 , G06F12/0207 , G06F12/04 , G06F12/0607 , G06F13/1673 , G06F13/1689 , H04N19/13 , H04N19/423 , H04N19/61 , H04N19/91
摘要： A Huffman decoder for decoding data words encoded according to the Huffman coding provisions of either H.261 or MPEG standards, the data words including an identifier that identifies the Huffman code standard under which the data words were coded, comprising
means for receiving the Huffman coded data words, including means for reading the identifier to determine which standard governed the Huffman coding of the received data words, and means for converting the data words to JPEG Huffman coded data words, if necessary, in response to reading the identifier that identifies the Huffman coded data words as H.261 or MPEG Huffman coded ;
means, operably connected to the Huffman coded data words receiving means, for generating an index number associated with each JPEG Huffman coded data word receiving an index number from the index number generating means, and including an output that is a decoded data word corresponding to the index number.
摘要翻译：一种霍夫曼解码器，用于对根据H.261或MPEG标准的霍夫曼编码规定编码的数据字进行解码，数据字包括识别数据字被编码的霍夫曼码标准的标识符，包括用于接收霍夫曼编码的装置数据字，包括用于读取标识符以确定哪个标准管理接收到的数据字的霍夫曼编码的装置，以及用于响应于读取标识霍夫曼的标识符将数据字转换成JPEG霍夫曼编码数据字的装置编码数据字为H.261或MPEG霍夫曼编码; 装置，可操作地连接到霍夫曼编码数据字接收装置，用于产生与每个JPEG霍夫曼编码数据字有关的索引号，该索引号接收来自索引号产生装置的索引号，并且包括输出，该输出是对应于该霍夫曼编码数据字的解码数据字索引号。

2. 发明公开

EP0897244A1 Pipeline decoding system 失效
标题翻译：管道解码系统
公开(公告)号：EP0897244A1
公开(公告)日：1999-02-17
申请号：EP98202134.7
申请日：1995-02-28
申请人： Discovision Associates
发明人： Wise, Adrian Philip , Sotheran, Martin William , Robbins, William Philip , Finch, Helen Rosemary , Boyd, Kevin James
IPC分类号： H04N7/24 , G06F9/38 , G06F13/00
CPC分类号： G06F13/28 , G06F12/0207 , G06F12/04 , G06F12/0607 , G06F13/1673 , G06F13/1689 , H04N19/13 , H04N19/423 , H04N19/61 , H04N19/91
摘要： In a system having a data stream including run level code, the improvement characterized by :
an interfacing token for control and/or data functions in said data stream, wherein said token comprises a plurality of data words, each said word including an extension indicator which indicates a presence or an absence of additional words in said token, a length of said token being determined by said extension indicators, whereby the length of said token can be unlimited, inverse modeler means active upon said data stream and responsive to said token for expanding out said run level code to a run of zero data followed by a level, whereby each token is expressed with a specified number of values.
摘要翻译：在具有包括运行级代码的数据流的系统中，改进的特征在于：用于所述数据流中的控制和/或数据功能的接口令牌，其中所述令牌包括多个数据字，每个所述字包括扩展指示符指示在所述令牌中是否存在附加单词，所述令牌的长度由所述扩展指示符确定，由此所述令牌的长度可以是无限的，反向建模器意味着在所述数据流上有效并响应于所述令牌扩展将所述运行级别代码输出为零级数据运行，随后是级别，由此每个令牌用指定数量的值来表示。

3. 发明公开

EP0895161A3 Method for addressing variable width memory data 失效
标题翻译：寻址可变宽度存储器数据的方法
公开(公告)号：EP0895161A3
公开(公告)日：1999-02-10
申请号：EP98202093.5
申请日：1995-02-28
申请人： Discovision Associates
发明人： Jones, Anthony M. , Robbins, William Philip , Patterson, Donald William Walker , Wise, Adrian Philip , Finch, Helen Rosemary , Sotheran, Martin William
IPC分类号： G06F12/04
CPC分类号： G06F13/1689 , G06F12/0207 , G06F12/04 , G06F12/0607 , G06F13/1673 , G06F13/28 , H04N19/13 , H04N19/42 , H04N19/423 , H04N19/61 , H04N19/91
摘要： A method for generating a substituted address in a memory comprising the steps of :
providing a first memory having words of predetermined width and composed of partial words ; rotating a partial word to be accessed to a least significant bit justification ; extending a remaining part of a word which contains the partial word so that an accessed word will be recognized as the partial word ; delimiting a substitution field of the partial word with a termination marker, said substitution field being variable in size ; substituting data in all of said substitution field to define a part of an address of a second memory, said address comprising said substituted field and an unsubstituted portion of said partial word ; restoring the remaining part of the word ; and
rotating the word until the partial word is restored to its original position.
摘要翻译：一种用于在存储器中产生替换地址的方法，包括以下步骤：提供具有预定宽度并由部分字组成的字的第一存储器; 将要访问的部分字旋转到最低有效位对齐; 扩展包含部分单词的单词的剩余部分，以便将访问的单词识别为部分单词; 利用终止标记来限定所述部分词的替代字段，所述替换字段的大小是可变的; 用所有所述替换字段中的数据进行替换以定义第二存储器的地址的一部分，所述地址包括所述替换字段和所述部分字的未替代部分; 恢复单词的其余部分; 并旋转单词直到部分单词恢复到其原始位置。

4. 发明公开

EP0895422A2 Image formatter for processing encoded video data 失效
标题翻译：图像格式化器用来处理编码的视频数据
公开(公告)号：EP0895422A2
公开(公告)日：1999-02-03
申请号：EP98202090.1
申请日：1995-02-28
申请人： Discovision Associates
发明人： Jones, Anthony M. , Robbins, William Philip , Patterson, Donald William Walker , Wise, Adrian Philip , Finch, Helen Rosemary , Sotheran, Martin William
IPC分类号： H04N7/24
CPC分类号： G06F13/1689 , G06F12/0207 , G06F12/04 , G06F12/0607 , G06F13/1673 , G06F13/28 , H04N19/13 , H04N19/42 , H04N19/423 , H04N19/61 , H04N19/91
摘要： An image formatter for processing encoded video data comprising :

an input element for receiving encoded data having a frame rate and an arrival rate ;
a memory defining at least three buffers for storage of the encoded data, one of said buffers being a display buffer, and another of said buffers being an arrival buffer ;
a write address generator for generating write addresses for data being stored thereat in said memory ;
a read address generator for generating read addresses for reading data stored thereat in said memory ;
an output interface linked to said read address generator that produces decoded data at a display rate ; and
a buffer manager responsive to said arrival rate, said display rate, and said frame rate for allocating said buffers to said write address generator and said read address generator, wherein said buffers are allocated to said write address generator in response to a timing regime

5. 发明公开

EP0701368A2 Data rate conversion 失效
标题翻译： Umsetzung einer Datenrate
公开(公告)号：EP0701368A2
公开(公告)日：1996-03-13
申请号：EP95305871.6
申请日：1995-08-22
申请人： DISCOVISION ASSOCIATES
发明人： Wise, Adrian Philip
IPC分类号： H04N7/01
CPC分类号： H04N7/01 , H04N19/40 , H04N19/587 , H04N19/61
摘要： A method for converting frame data at a slower rate into field data at a faster rate in a video decoder comprises determining a basic field repetition rate such that a field is repeated an integer number of times in a frame period, calculating a ratio differential of the repetition rate by subtracting from the speed-up ratio of the faster to the slower rate, the ratio of the fields per frame period to the slower rate, comparing the ratio differential with the differential of the field repetition rate and adding or subtracting extra fields when the two are substantially at variance.
摘要翻译：一种用于以较慢速率将帧数据以更快的速率转换成视频解码器中的更快速率的方法，包括确定基本字段重复率，使得字段在帧周期内重复整数次，计算出帧率通过从快速到较慢速率的加速比减去重复率，每帧周期的场比与较慢速率的比率，将比率差与场重复率的差分进行比较，并且当增加或减去额外场时，两者基本上是差异的。

6. 发明授权

EP0674443B1 Start code detector for image sequences 失效
标题翻译：检测器，用于图像序列的起始码
公开(公告)号：EP0674443B1
公开(公告)日：2001-05-09
申请号：EP95301301.8
申请日：1995-02-28
申请人： DISCOVISION ASSOCIATES
发明人： Wise, Adrian Philip , Sotheran, Martin William , Robbins, William Philip , Finch, Helen Rosemary , Boyd, Kevin James
IPC分类号： H04N7/24 , G06F13/00 , G06F9/38
CPC分类号： G06F13/28 , G06F12/0207 , G06F12/04 , G06F12/0607 , G06F13/1673 , G06F13/1689 , H04N19/13 , H04N19/423 , H04N19/61 , H04N19/91

7. 发明公开

EP0896477A3 Start code detecting apparatus for video data stream 失效
标题翻译：视频数据流的起始码检测装置
公开(公告)号：EP0896477A3
公开(公告)日：1999-09-22
申请号：EP98202175.0
申请日：1995-02-28
申请人： Discovision Associates
发明人： Wise, Adrian Philip , Sotheran, Martin William , Robbins, William Philip , Finch, Helen Rosemary , Boyd, Kevin James
IPC分类号： H04N7/24 , G06F13/00 , G06F9/38
CPC分类号： G06F13/28 , G06F12/0207 , G06F12/04 , G06F12/0607 , G06F13/1673 , G06F13/1689 , H04N19/13 , H04N19/423 , H04N19/61 , H04N19/91
摘要： In a system having an input and an output and a plurality of processing stages between the input and the output, the improvement comprising :
an interactive interfacing token, defining a universal adaptation unit for control and/or data functions among said processing stages ; and one of said stages receiving said input and adapted to generate and/or convert said tokens , and wherein said one of said stages detects overlapping start codes , whereby the first start code is ignored and the second start code is used to create start code tokens.
摘要翻译：在具有输入和输出以及输入和输出之间的多个处理阶段的系统中，改进包括：交互式接口令牌，其定义用于所述处理阶段之间的控制和/或数据功能的通用适配单元; 并且所述级中的一个级接收所述输入并且适于生成和/或转换所述令牌，并且其中所述级中的所述级之一检测重叠的开始代码，由此忽略所述第一开始代码并且使用所述第二开始代码来创建开始代码令牌。

8. 发明公开

EP0896477A2 Start code detecting apparatus for video data stream 失效
公开(公告)号：EP0896477A2
公开(公告)日：1999-02-10
申请号：EP98202175.0
申请日：1995-02-28
申请人： Discovision Associates
发明人： Wise, Adrian Philip , Sotheran, Martin William , Robbins, William Philip , Finch, Helen Rosemary , Boyd, Kevin James
IPC分类号： H04N7/24 , G06F13/00 , G06F9/38
CPC分类号： G06F13/28 , G06F12/0207 , G06F12/04 , G06F12/0607 , G06F13/1673 , G06F13/1689 , H04N19/13 , H04N19/423 , H04N19/61 , H04N19/91
摘要： In a system having an input and an output and a plurality of processing stages between the input and the output, the improvement comprising :

an interactive interfacing token, defining a universal adaptation unit for control and/or data functions among said processing stages ; and
one of said stages receiving said input and adapted to generate and/or convert said tokens , and wherein said one of said stages detects overlapping start codes ,
whereby the first start code is ignored and the second start code is used to create start code tokens.

9. 发明公开

EP0674266A3 Method and apparatus for interfacing with ram 失效
标题翻译：用于与RAM存储器接口的方法和装置。
公开(公告)号：EP0674266A3
公开(公告)日：1997-12-03
申请号：EP95301272.1
申请日：1995-02-28
申请人： DISCOVISION ASSOCIATES
发明人： Jones, Anthony Mark , Robbins, William Philip , Patterson, Donald William Walker , Wise, Adrian Philip , Finch, Helen Rosemary , Sotheran, Martin William
IPC分类号： G06F12/02
CPC分类号： G06F13/1689 , G06F12/0207 , G06F12/04 , G06F12/0607 , G06F13/1673 , G06F13/28 , H04N19/13 , H04N19/42 , H04N19/423 , H04N19/61 , H04N19/91
摘要： The present invention is directed to a number of techniques for addressing and accessing memory, including accessing from RAM a number M of words that is less than the predetermined fixed burst length N of the RAM. Also disclosed is a method for accessing Dynamic Random Access Memory (DRAM) to store and retrieve data words associated with a two dimensional image, and a procedure for providing a word with fixed width, having a fixed number of bits to be used for addressing variable width data, and having a width defining field and address field, is disclosed. There is also disclosed a method to control the buffering of encoded video data organized as frames or fields. This method involves determining the picture number of each incoming decoded frame, determining the expected presentation number at any time and marking any buffer as ready when its picture number is on or after the presentation number. Finally, there is disclosed a RAM interface for connecting a bus to RAM wherein a separate address generator generates the addresses the RAM interface needs to address the RAM. The address generator communicates with the RAM interface via a two wire interface.

10. 发明公开

EP0674442A3 Serial data processing using a pipeline 失效
标题翻译：通过管道的装置处理串行数据。
公开(公告)号：EP0674442A3
公开(公告)日：1996-08-14
申请号：EP95301299.4
申请日：1995-03-10
申请人： DISCOVISION ASSOCIATES
发明人： Wise, Adrian Philip , Sotheran, Martin William , Robbins, William Philip
IPC分类号： H04N7/24 , G06F19/00 , G06F9/38
CPC分类号： G06F13/28 , G06F12/0207 , G06F12/04 , G06F12/0607 , G06F13/1673 , G06F13/1689 , H04N19/13 , H04N19/423 , H04N19/61 , H04N19/91
摘要： A multi-standard video decompression apparatus has a plurality of stages interconnected by a two-wire interface arranged as a pipeline processing machine. Control tokens and DATA Tokens pass over the single two-wire interface for carrying both control and data in token format. A token decode circuit is positioned in certain of the stages for recognizing certain of the tokens as control tokens pertinent to that stage and for passing unrecognized control tokens along the pipeline. Reconfiguration processing circuits are positioned in selected stages and are responsive to a recognized control token for reconfiguring such stage to handle an identified DATA Token.

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