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1. 发明公开

EP0100140A2 Data processing system and method of starting up system 失效
标题翻译： Datenverarbeitungssystem und Verfahren zum Anlaufen des Systems。
公开(公告)号：EP0100140A2
公开(公告)日：1984-02-08
申请号：EP83303171.9
申请日：1983-06-02
申请人： DATA GENERAL CORPORATION
发明人： Veres, James E. , Kimmens, Harold R. , Therrien, David G. , Stein, James B. , Baird, David W. , Doyle, John J. , Beauchamp, Robert W. , Roman, Michael J.
IPC分类号： G06F9/24
CPC分类号： G06F9/4403 , G06F9/24 , G06F11/2236
摘要： The data processing system has a «basic» or «kernel» instruction set stored in an auxiliary store (17) for transfer to the processor's control store (12) in start-up. The kernel instruction set is used to execute an initialization program which identifies an I/O device (16) in which a microcode local program and a desired microcode file are stored. No microcode load program is transferred to the processor's main memory (14) using the kernel instructions and the desired microcode file is then transferred in selected blocks from the I/O device (16) to the main memory (14) and there to the microcode control store (12). The microinstructions of the desired microcode file then can be used to load appropriate operating system software so that the overall processor is then ready for use in whatever applications are desirable.
摘要翻译：数据处理系统具有存储在辅助存储器（17）中的“基本”或“内核”指令集，用于在启动时传送到处理器的控制存储器（12）。内核指令集用于执行识别其中存储微码本地程序和期望的微代码文件的I / O设备（16）的初始化程序。没有微代码加载程序使用内核指令传送到处理器的主存储器（14），然后将期望的微代码文件从选定的块从I / O设备（16）传送到主存储器（14），并且到达微代码控制商店（12）。然后，所需的微代码文件的微指令可用于加载适当的操作系统软件，使得整个处理器随时可以在任何需要的应用中使用。

2. 发明公开

EP0100140A3 Data processing system and method of starting up system 失效
标题翻译：数据处理系统和启动系统的方法
公开(公告)号：EP0100140A3
公开(公告)日：1984-07-18
申请号：EP83303171
申请日：1983-06-02
申请人： DATA GENERAL CORPORATION
发明人： Veres, James E. , Kimmens, Harold R. , Therrien, David G. , Stein, James B. , Baird, David W. , Doyle, John J. , Beauchamp, Robert W. , Roman, Michael J.
IPC分类号： G06F09/24
CPC分类号： G06F9/4403 , G06F9/24 , G06F11/2236
摘要： The data processing system has a «basic» or «kernel» instruction set stored in an auxiliary store (17) for transfer to the processor's control store (12) in start-up. The kernel instruction set is used to execute an initialization program which identifies an I/O device (16) in which a microcode local program and a desired microcode file are stored. No microcode load program is transferred to the processor's main memory (14) using the kernel instructions and the desired microcode file is then transferred in selected blocks from the I/O device (16) to the main memory (14) and there to the microcode control store (12). The microinstructions of the desired microcode file then can be used to load appropriate operating system software so that the overall processor is then ready for use in whatever applications are desirable.

3. 发明公开

EP0067667A2 Data processing system 失效
标题翻译：数据处理系统
公开(公告)号：EP0067667A2
公开(公告)日：1982-12-22
申请号：EP82302998.8
申请日：1982-06-10
申请人： DATA GENERAL CORPORATION
发明人： Beauchamp, Robert William , Blau, Jonathan Seth , Stein, James B.
IPC分类号： G06F9/22
CPC分类号： G06F9/226 , G06F9/30014 , G06F9/30181 , G06F9/3885
摘要： The system employs a fixed point arithmetic unit (ALU) - and a separate floating point arithmetic unit (FPU) controlled by a common microinstruction store. Most fields of the 80-bit microinstructions control both the ALU and the FPU, including a source field ALUS an operation field ALUOP. A further 2-bit field EXT determines whether the FPU performs double or single precision arithmetic, in which the operation defined by ALUOP is carried out respectively by all of 16 4-bit slice units and by the top 6 slice units only for 56 and 24 bit results, with 8 guard bits in either case. As well as a destination field ALUD for the ALU there is a separate destination field FPUD for the FPU and each such field is set to disable the output of its respective unit when the output is required from the other unit. Carry-in bits for bits 55 and 23 are entered at bit 63 and propagated through the lower bit slice units to avoid multiplexing in to the higher bit slice units.
摘要翻译：该系统采用定点运算单元（ALU） - 和一个由共同的微指令存储器控制的独立浮点运算单元（FPU）。 80位微指令的大部分字段都控制ALU和FPU，包括源字段ALUS和操作字段ALUOP。另一个2位字段EXT确定FPU是执行双精度还是单精度运算，其中由ALUOP定义的操作分别由16个4位片单元执行，并且前6个片单元分别仅执行56和24 在任何情况下都有8个保护位。除ALU的目标字段ALUD外，FPU还有一个单独的目标字段FPUD，并且每个此类字段都设置为当需要从其他单元输出时禁用其各自单元的输出。比特55和23的进位比特在比特63处输入并通过较低比特切片单元传播以避免多路复用到较高比特切片单元。

4. 发明授权

EP0067667B1 Data processing system 失效
标题翻译：数据处理系统
公开(公告)号：EP0067667B1
公开(公告)日：1988-08-17
申请号：EP82302998.8
申请日：1982-06-10
申请人： DATA GENERAL CORPORATION
发明人： Beauchamp, Robert William , Blau, Jonathan Seth , Stein, James B.
IPC分类号： G06F9/22
CPC分类号： G06F9/226 , G06F9/30014 , G06F9/30181 , G06F9/3885
摘要： The system employs a fixed point arithmetic unit (ALU) and a separate floating point arithmetic unit (FPU) controlled by a common microinstruction store. Most fields of the 80-bit microinstructions control both the ALU and the FPU, including a source field ALUS an operation field ALUOP. A further 2-bit field EXT determines whether the FPU performs double or single precision arithmetic, in which the operation defined by ALUOP is carried out respectively by all of 16 4-bit slice units and by the top 6 slice units only for 56 and 24 bit results, with 8 guard bits in either case. As well as a destination field ALUD for the ALU there is a separate destination field FPUD for the FPU and each such field is set to disable the output of its respective unit when the output is required from the other unit. Carry-in bits for bits 55 and 23 are entered at bit 63 and propagated through the lower bit slice units to avoid multiplexing in to the higher bit slice units.
摘要翻译：该系统采用一个定点算术单元（ALU）和一个单独的浮点运算单元（FPU），由一个共同的微指令存储器控制。 80位微指令的大部分字段都控制ALU和FPU，包括源字段ALUS和操作字段ALUOP。另一个2位字段EXT确定FPU是执行双精度还是单精度运算，其中由ALUOP定义的操作分别由16个4位片单元执行，并且前6个片单元分别仅执行56和24 在任何情况下都有8个保护位。除ALU的目标字段ALUD外，FPU还有一个单独的目标字段FPUD，并且每个此类字段都设置为当需要从其他单元输出时禁用其各自单元的输出。比特55和23的进位比特在比特63处输入并通过较低比特切片单元传播以避免多路复用到较高比特切片单元。

5. 发明授权

EP0100140B1 Data processing system and method of starting up system 失效
标题翻译：数据处理系统及启动系统的方法
公开(公告)号：EP0100140B1
公开(公告)日：1987-08-12
申请号：EP83303171.9
申请日：1983-06-02
申请人： DATA GENERAL CORPORATION
发明人： Veres, James E. , Kimmens, Harold R. , Therrien, David G. , Stein, James B. , Baird, David W. , Doyle, John J. , Beauchamp, Robert W. , Roman, Michael J.
IPC分类号： G06F9/24
CPC分类号： G06F9/4403 , G06F9/24 , G06F11/2236

6. 发明公开

EP0067667A3 Data processing system 失效
公开(公告)号：EP0067667A3
公开(公告)日：1984-11-14
申请号：EP82302998
申请日：1982-06-10
申请人： DATA GENERAL CORPORATION
发明人： Beauchamp, Robert William , Blau, Jonathan Seth , Stein, James B.
IPC分类号： G06F09/22
CPC分类号： G06F9/226 , G06F9/30014 , G06F9/30181 , G06F9/3885
摘要： The system employs a fixed point arithmetic unit (ALU) - and a separate floating point arithmetic unit (FPU) controlled by a common microinstruction store. Most fields of the 80-bit microinstructions control both the ALU and the FPU, including a source field ALUS an operation field ALUOP. A further 2-bit field EXT determines whether the FPU performs double or single precision arithmetic, in which the operation defined by ALUOP is carried out respectively by all of 16 4-bit slice units and by the top 6 slice units only for 56 and 24 bit results, with 8 guard bits in either case. As well as a destination field ALUD for the ALU there is a separate destination field FPUD for the FPU and each such field is set to disable the output of its respective unit when the output is required from the other unit. Carry-in bits for bits 55 and 23 are entered at bit 63 and propagated through the lower bit slice units to avoid multiplexing in to the higher bit slice units.

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