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1. 发明授权

EP0566220B1 Magnetic field enhanced plasma etch reactor 失效
标题翻译：等离子刻蚀与磁场增强
公开(公告)号：EP0566220B1
公开(公告)日：1997-04-02
申请号：EP93201991.2
申请日：1987-12-18
申请人： APPLIED MATERIALS, INC.
发明人： Cheng, David , Maydan, Dan , Somekh, Sasson , Stalder, Kenneth R. , Andrews, Dana L. , Chang, Mei , White, John M. , Wong, Jerry Yuen Kui , Zeitlin, Vladimir J. , Wang, David Nin-Kou
IPC分类号： H01J37/32 , H01L21/306 , C23C16/50
CPC分类号： H01L21/67069 , H01J37/32477 , H01J37/32623 , H01J37/32743 , H01J37/32788 , H01J37/32862

2. 发明授权

EP0339580B1 A vacuum processing reactor 失效
标题翻译：的真空处理反应器中。
公开(公告)号：EP0339580B1
公开(公告)日：1995-02-22
申请号：EP89107484.1
申请日：1989-04-25
申请人： APPLIED MATERIALS, INC.
发明人： Cheng, David , Maydan, Dan , Somekh, Sasson , Stalder, Kenneth R. , Andrews, Dana L. , Chang, Mei , White, John M. , Wong, Jerry Yuen Kui , Zeitlin, Vladimir J. , Wang, David Nin-Kou
IPC分类号： H01J37/32 , H01L21/00 , C23F4/00
CPC分类号： H01L21/67069 , H01J37/32431 , H01J37/32477 , H01J37/32623 , H01J37/32743 , H01J37/32788 , H01J37/32862

3. 发明授权

EP0272142B1 Magnetic field enhanced plasma etch reactor 失效
标题翻译：等离子刻蚀与磁场增强。
公开(公告)号：EP0272142B1
公开(公告)日：1994-09-07
申请号：EP87311195.9
申请日：1987-12-18
申请人： APPLIED MATERIALS, INC.
发明人： Cheng, David , Maydan, Dan , Somekh, Sasson , Stalder, Kenneth R. , Andrews, Dana L. , Chang, Mei , White, John M. , Wong, Jerry Yuen Kui , Zeitlin, Vladimir J. , Wang, David Nin-Kou
IPC分类号： H01J37/32 , H01L21/306 , C23C16/50
CPC分类号： H01L21/67069 , H01J37/32477 , H01J37/32623 , H01J37/32743 , H01J37/32788 , H01J37/32862

4. 发明公开

EP0430303A3 Improved process for selective deposition of tungsten on semiconductor wafer 失效
标题翻译：在半导体晶体管上选择性沉积钨酸盐的改进方法
公开(公告)号：EP0430303A3
公开(公告)日：1992-10-28
申请号：EP90123025.0
申请日：1990-12-01
申请人： APPLIED MATERIALS, INC.
发明人： Chang, Mei , Wang, David Nin-Kou
IPC分类号： H01L21/285 , H01L21/306 , H01L21/311
CPC分类号： H01L21/76879 , H01L21/28562 , Y10S148/051 , Y10S438/906 , Y10S438/908
摘要： A process and apparatus for the selective deposition of tungsten or similar materials on a masked semiconductor wafer (100) comprises cleaning the surfaces of the wafer (100) in an air-tight cleaning chamber (10), then transferring the cleaned wafer to a vacuum deposition chamber (40) such as a CVD chamber for selective deposition of tungsten etc. thereon without exposing the cleaned wafer (100) to conditions which would recontaminate the cleaned wafer (100) prior to said deposition, and then selectively depositing tungsten etc. on the unmasked surfaces of the cleaned wafer (100).

5. 发明授权

EP0202907B1 In-situ photoresist capping process for plasma etching 失效
标题翻译：用于等离子体蚀刻的现场光刻胶封盖工艺
公开(公告)号：EP0202907B1
公开(公告)日：1992-07-22
申请号：EP86303796.6
申请日：1986-05-19
申请人： APPLIED MATERIALS, INC.
发明人： Tam, Simon Wood , Wong, Jerry Yuen Kui , Reade, Ronald Paul , Wang, David Nin-Kou
IPC分类号： H01L21/31 , H01L21/308 , H01L21/306 , G03F7/26
CPC分类号： H01L21/3086 , G03F7/40 , H01L21/31058 , H01L21/31138

6. 发明公开

EP0441653A3 Improvements in process for planarizing an integrated circuit structure using low melting inorganic material 失效
标题翻译：使用低熔融无机材料平面化集成电路结构的过程中的改进
公开(公告)号：EP0441653A3
公开(公告)日：1991-10-02
申请号：EP91301048.4
申请日：1991-02-08
申请人： APPLIED MATERIALS, INC.
发明人： Marks, Jeffrey , Wang, David Nin-Kou , Law, Kam Shing , Maydan, Dan
IPC分类号： H01L21/311 , H01L21/314 , H01L21/768
CPC分类号： H01L21/31051 , H01L21/3105 , H01L21/31116 , H01L21/31604 , H01L21/76819 , H01L23/3157 , H01L2924/0002 , H01L2924/00
摘要： A planarizing process for planarizing an integrated circuit structure (14) in a CVD apparatus is disclosed using a low melting inorganic planarizing material which comprises depositing a low melting inorganic planarizing layer (34) such as a boron oxide glass over a layer of insulating material (20) such as an oxide of silicon, then dry etching the low melting inorganic planarizing layer to planarize the structure, and then depositing a further layer (40) of an insulating material to encapsulate any remaining portions of the low melting glass planarizing layer which may be hygroscopic. The method eliminates the need for separate coating, drying, and curing steps associated with the application of organic-based planarizing layers usually carried out outside of a vacuum apparatus. In a preferred embodiment, the deposition steps and the etching step are all carried out without removing the integrated circuit structure from the apparatus. In a particularly preferred embodiment, all of the steps are carried out in the same chamber of the apparatus. An additional etching step may be carried out after depositing the first insulating layer and prior to deposition of the planarizing layer to remove any voids formed in the insulating layer.

7. 发明公开

EP0368504A2 Method for planarizing an integrated circuit structure 失效
标题翻译：平面化电极IC-Struktur。
公开(公告)号：EP0368504A2
公开(公告)日：1990-05-16
申请号：EP89310921.5
申请日：1989-10-24
申请人： APPLIED MATERIALS, INC.
发明人： Marks, Jeffrey , Law, Kam Shing , Wang, David Nin-Kou , Maydan, Dan
IPC分类号： H01L21/311 , H01L21/316
CPC分类号： H01L21/31604 , H01L21/31055 , H01L21/76819
摘要： A planarizing process as disclosed for planarizing an integrated circuit structure (10) using a low melting inorganic planarizing material (30) which comprises depositing a low melting inorganic planarizing layer (3) such as a boron oxide glass over a layer of insulating material (20) such as an oxide of silicon and then dry etching the low melting inorganic planarizing layer (3) to planarize the structure. The method eliminates the need for separate coating, drying, and curing steps associated with the application of organic-based planarizing layers usually carried out outside of a vacuum apparatus. In a preferred embodiment, the deposition steps and the etching step are carried out without removing the integrated circuit structure from the vacuum apparatus. An additional etching step may be carried out after depositing the insulating layer (20) to remove any voids formed in the insulating layer (20).
摘要翻译：公开的用于使用低熔点无机平面化材料（30）平面化集成电路结构（10）的平面化方法，其包括在绝缘材料层（20）上沉积低熔点无机平面化层（3），例如氧化硼玻璃），然后干燥蚀刻低熔点无机平坦化层（3）以使结构平坦化。该方法消除了与通常在真空装置外进行的有机基平坦化层的应用相关的单独涂布，干燥和固化步骤的需要。在优选实施例中，沉积步骤和蚀刻步骤在不从真空装置中移除集成电路结构的情况下进行。在沉积绝缘层（20）以去除在绝缘层（20）中形成的任何空隙之后，可以进行另外的蚀刻步骤。

8. 发明公开

EP0078161A2 Materials and methods for plasma etching of oxides and nitrides of silicon 有权
标题翻译：材料和氧化物和硅氮化物的等离子体蚀刻方法。
公开(公告)号：EP0078161A2
公开(公告)日：1983-05-04
申请号：EP82305616.3
申请日：1982-10-21
申请人： APPLIED MATERIALS, INC.
发明人： Wang, David Nin-Kou , Egitto, Frank D. , Maydan, Dan
IPC分类号： H01L21/306 , H01L21/31 , C23F1/02
CPC分类号： H01L21/31116 , C23F4/00 , Y10S148/131
摘要： A method for etching a layer of inorganic insulating material 55 formed on a semiconductor wafer 50 and containing silicon as the principal metallic element. The method involves disposing a wafer 50 on one of a pair of electrode structures 261 in a closed chamber 260. A reactive gas 266 mixture comprising principally a fluorocarbon gas doped with a preselected quantity of carbon dioxide is supplied to the chamber 260.
Radio frequency 263 electrical energy is supplied to one of the electrode structures 261 to create a plasma of the reactive gas mixture for chemically attacking the insulating material 55.

9. 发明授权

EP0272143B1 Bromine etch process for silicon 失效
标题翻译：溴蚀刻方法为硅
公开(公告)号：EP0272143B1
公开(公告)日：1999-03-17
申请号：EP87311196.7
申请日：1987-12-18
申请人： APPLIED MATERIALS, INC.
发明人： Wong, Jerry Yuen Kui , Chang, Mei , Maydan, Dan , Wang, David Nin-Kou , Mak, Alfred W. S.
IPC分类号： H01L21/306 , H01J37/32
CPC分类号： H01L21/32137 , H01L21/3065 , H01L21/76232

10. 发明公开

EP0689232A3 Process for deposition of a tungsten layer on a semiconductor wafer 失效
标题翻译： Verfahren zur Abscheibung einer Wolfram-Schicht au e einer Halbleiterscheibe
公开(公告)号：EP0689232A3
公开(公告)日：1997-06-04
申请号：EP95114145.6
申请日：1990-08-24
申请人： APPLIED MATERIALS INC.
发明人： Chang, Mei , Leung, Cissy , Wang, David Nin-Kou , Cheng, David
IPC分类号： H01L21/285 , H01L21/768
CPC分类号： H01L21/76838 , H01L21/28556 , H01L21/32051 , Y10S148/025
摘要： A process is disclosed for the deposition of a layer of tungsten on a semiconductor wafer in a vacuum chamber wherein the improvement comprises forming an insulating layer on said wafer over an integrated circuit structure formed on said wafer; forming an intermediate layer over said insulating layer; and depositing tungsten over said intermediate layer while maintaining a pressure of at least about 2,67 kPa (about 20 Torr) in said deposition chamber.
摘要翻译：公开了一种用于在真空室中在半导体晶片上沉积钨层的方法，其中改进包括在氮气存在下在半导体晶片上沉积钨以改善所得到的钨层的表面的反射率; 将真空室保持在约20至760托的压力下，以提高钨的沉积速率，并提高钨表面的反射率; 以及在需要时，在半导体晶片上沉积钨的步骤之前在半导体层上形成成核层的附加步骤，以提高沉积的钨层的均匀性。

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