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11. 发明公开

EP1387256A2 Program counter adjustment based on the detection of an instruction prefix 审中-公开
标题翻译：程序计数器调整是基于这样的认识Befehlspräfixes的
公开(公告)号：EP1387256A2
公开(公告)日：2004-02-04
申请号：EP03291920.1
申请日：2003-07-30
申请人： Texas Instruments Incorporated , Texas Instruments France
发明人： Chauvel, Gérard , Lassère, Serge , Kuusela, Maija
IPC分类号： G06F9/32 , G06F9/318
CPC分类号： G06F9/30149 , G06F9/30076 , G06F9/30181 , G06F9/30185 , G06F9/382 , G06F9/3879 , G06F12/0253 , G06F12/0804 , G06F12/0891 , G06F12/126 , G06F2212/502
摘要： A processor (e.g., a co-processor) comprising a decoder coupled to a pre-decoder, in which the decoder decodes a current instruction in parallel with the pre-decoder pre-decoding a subsequent instruction. In particular, the pre-decoder examines at least five Bytecodes in parallel with the decoder decoding a current instruction. The pre-decoder determines if a subsequent instruction contains a prefix. If a prefix is detected in at least one of the five Bytecodes, a program counter skips the prefix and changes the behavior of the decoder during the decoding of the subsequent instruction.

12. 发明公开

EP1304620A1 Cache with selective write allocation 审中-公开
标题翻译：缓存缓存器
公开(公告)号：EP1304620A1
公开(公告)日：2003-04-23
申请号：EP01402685.0
申请日：2001-10-17
申请人： Texas Instruments Incorporated , Texas Instruments France S.A.
发明人： Chauvel, Gérard Résidence du Valbosquet 20 , Kuusela, Maija , d'Inverno, Dominique Chemin des Basses
IPC分类号： G06F12/08
CPC分类号： G06F12/0888 , G06F12/0804 , Y02D10/13
摘要： A digital system and method of operation is provided in which several processors (590n) are connected to a shared cache memory resource (500). A translation lookaside buffer (TLB) (310n) is connected to receive a request virtual address from each respective processor. A set of address regions (pages) is defined within an address space of a back-up memory associated with the cache and write allocation in the cache is defined on a page basis. Each TLB has a set of entries that correspond to pages of address space and each entry provides a write allocate attribute (550) for the associated page of address space. During operation of the system, software programs are executed and memory transactions are performed. A write allocate attribute signal (550) is provided with each write transaction request. In this manner, the attribute signal is responsive to the value of the write allocation attribute bit assigned to an address region that includes the address of the write transaction request. Write allocation in the cache memory is performed generally in accordance with the write allocate attribute signal. However, write allocation policy circuitry (560) is also provided and operates to refine the operation of the write allocation. Thus, the cache memory is responsive to the write policy circuitry such that write allocation is performed in a selective manner in accordance to the attribute signal for a first write policy state and write allocation is always performed. in accordance to the attribute signal for a second write policy state.
摘要翻译：提供了数字系统和操作方法，其中多个处理器（590n）连接到共享高速缓冲存储器资源（500）。连接翻译后备缓冲器（TLB）（310n）以从每个相应的处理器接收请求虚拟地址。在与高速缓存相关联的备份存储器的地址空间内定义一组地址区（页），并且以页为基础定义高速缓存中的写分配。每个TLB具有对应于地址空间的页面的一组条目，并且每个条目为相关联的地址空间页面提供写入分配属性（550）。在系统操作期间，执行软件程序并执行内存事务。写入分配属性信号（550）被提供有每个写事务请求。以这种方式，属性信号响应于分配给包括写事务请求的地址的地址区的写分配属性位的值。通常根据写入分配属性信号来执行高速缓冲存储器中的写入分配。然而，还提供写分配策略电路（560）并且操作以改进写分配的操作。因此，高速缓冲存储器响应于写策略电路，使得根据用于第一写策略状态的属性信号以选择性的方式执行写分配，并且总是执行写分配。根据第二写策略状态的属性信号。

13. 发明授权

EP1489518B1 Embedded garbage collection 有权转让
标题翻译：嵌入式垃圾收集
公开(公告)号：EP1489518B1
公开(公告)日：2008-02-06
申请号：EP03291506.8
申请日：2003-06-19
申请人： Texas Instruments Incorporated , TEXAS INSTRUMENTS FRANCE
发明人： Chauvel, Gerard , Lassere, Serge , D'inverno, Dominique , Kuusela, Maija , Cabillic, Gilbert , Lesot, Jean-Philippe , Banâtre, Michel , Routeau, Jean-Paul , Majoul, Salam , Parain, Frédéric
IPC分类号： G06F12/02
CPC分类号： G06F12/0269 , Y02D10/13 , Y10S707/99957
摘要： An electronic system comprises a processor, memory coupled to the processor, and an application programming interface that causes an embedded garbage collection object to be active. The memory stores one or more objects that selectively have references from root objects. The embedded garbage collection object preferably uses control data to cause objects to be removed from said memory, the removed objects comprise those objects that were created while an embedded garbage collection object was active and that do not have references from root objects.

14. 发明公开

EP1489490A3 Method for converting a cache to a scratch-pad memory 审中-公开
标题翻译： Verfahren zur Umwandlung eines Cachespeichers zu einem Notitzblockspeichers
公开(公告)号：EP1489490A3
公开(公告)日：2005-09-14
申请号：EP03291504.3
申请日：2003-06-19
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS FRANCE
发明人： Chauvel, Gerard , Lasserre, Serge , D'inverno, Dominique , Kuusela, Maija , Cabillic, Gilbert , Lesot, Jean-Philippe , Banatre, Michel , Routeau, Jean-Paul , Majoui, Salam , Parain, Frederic
IPC分类号： G06F9/30 , G06F12/08 , G06F9/318 , G06F12/12
CPC分类号： G06F9/30181 , G06F9/30047 , G06F9/3824 , G06F12/0802 , G06F12/126 , G06F2212/2515 , Y02D10/13
摘要： A method is disclosed that comprises determining whether a data subsystem is to operate as cache memory or as scratchpad memory in which line fetches from external memory are suppressed and programming a control bit to cause the data subsystem to be operated as either a cache or scratchpad memory depending on the determination. Other embodiments are disclosed herein as well.
摘要翻译：公开了一种方法，其包括确定数据子系统是作为高速缓存存储器还是作为暂存器存储器进行操作，其中从外部存储器取出的行被抑制并且编程控制位以使数据子系统作为高速缓存或暂存器存储器取决于确定。本文还公开了其它实施例。

15. 发明公开

EP1489592A1 Accessing video memory in programming language representation 审中-公开
标题翻译： Zugriff auf VideoSpeicher mit Programmiersprachedarstellung
公开(公告)号：EP1489592A1
公开(公告)日：2004-12-22
申请号：EP03291505.0
申请日：2003-06-19
申请人： Texas Instruments Incorporated , Texas Instruments France
发明人： Chauvel, Gerard , Lasserre, Serge , D'Inverno, Dominique , Kuusela, Maija , Cabillic, Gilbert , Lesot, Jean-Philippe , Banatre, Michel , Routeau, Jean-Paul , Majoul, Salam , Parain, Frederic
IPC分类号： G09G5/39
CPC分类号： G09G5/39 , G06F3/14 , G09G5/393
摘要： In some embodiments, a storage medium comprises application software that performs one or more operations and that directly manages a device. The application software comprises instructions that initialize an application data structure (e.g., an object or array) usable by the application software to manage the device and also comprises instructions that map the application data structure to a memory associated with the device without the use of a device driver. In other embodiments, a method comprises initializing an application data structure to manage a hardware device and mapping the application data structure to a memory associated with the hardware device without the use of a device driver. The application data structure may store a single dimensional data structure or a multi-dimensional data structure. In some embodiments, the device being managed by the application software may comprise a display and the application software may comprise Java code.
摘要翻译：在一些实施例中，存储介质包括执行一个或多个操作并直接管理设备的应用软件。应用软件包括初始化应用软件可用于管理设备的应用数据结构（例如，对象或阵列）的指令，并且还包括将应用数据结构映射到与该设备相关联的存储器的指令，而不使用设备驱动。在其他实施例中，一种方法包括初始化应用数据结构以管理硬件设备，并将应用数据结构映射到与硬件设备相关联的存储器，而不使用设备驱动程序。应用数据结构可以存储单维数据结构或多维数据结构。在一些实施例中，由应用软件管理的设备可以包括显示器，并且应用软件可以包括Java代码。

16. 发明公开

EP1489518A1 Embedded garbage collection 有权转让
标题翻译： Eingebettete Speicherbereinigung
公开(公告)号：EP1489518A1
公开(公告)日：2004-12-22
申请号：EP03291506.8
申请日：2003-06-19
申请人： Texas Instruments Incorporated , Texas Instruments France
发明人： Chauvel, Gerard , Lassere, Serge , D'inverno, Dominique , Kuusela, Maija , Cabillic, Gilbert , Lesot, Jean-Philippe , Banatre, Michel , Routeau, Jean-Paul , Majoul, Salam , Parain, Frederic
IPC分类号： G06F12/02
CPC分类号： G06F12/0269 , Y02D10/13 , Y10S707/99957
摘要： An electronic system comprises a processor, memory coupled to the processor, and an application programming interface that causes an embedded garbage collection object to be active. The memory stores one or more objects that selectively have references from root objects. The embedded garbage collection object preferably uses control data to cause objects to be removed from said memory, the removed objects comprise those objects that were created while an embedded garbage collection object was active and that do not have references from root objects.
摘要翻译：电子系统包括处理器，耦合到处理器的存储器以及使嵌入式垃圾收集对象活动的应用编程接口。存储器存储一个或多个选择性地具有来自根对象的引用的对象。嵌入式垃圾收集对象优选地使用控制数据来使对象从所述存储器移除，所移除的对象包括当嵌入式垃圾回收对象是活动的并且没有来自根对象的引用时创建的对象。

17. 发明公开

EP1489492A1 Two-step instruction resolution 审中-公开
标题翻译： Zweistufen - Befehlsauflösung
公开(公告)号：EP1489492A1
公开(公告)日：2004-12-22
申请号：EP03291503.5
申请日：2003-06-19
申请人： Texas Instruments Incorporated , Texas Instruments France
发明人： Chauvel, Gerard , Lasserre, Serge , D'Inverno, Dominique , Kuusela, Maija , Cabillic, Gilbert , Lesot, Jean-Philippe , Banatre, Michel , Routeau, Jean-Paul , Majoul, Salam , Parain, Frederic
IPC分类号： G06F9/318 , G06F9/445
CPC分类号： G06F9/30174 , G06F9/45504
摘要： A preparation method comprises determining whether an instruction contains an unresolved reference and replacing an unresolved instruction with a predetermined instruction containing an operand associated with reference resolution code. A resolution execution method comprises receiving a plurality of instructions, at least one instruction of which comprises a replacement instruction that replaced a previous instruction, determining whether any of the received instructions comprise the replacement instruction, and executing resolution code to resolve a reference upon determining that a received instruction comprises the replacement instruction. The replacement instruction includes an operand that identifies the resolution code. A processor associated with these methods is also disclosed.
摘要翻译：一种准备方法，包括：确定一条指令是否包含未解决的参考，以及用包含与参考解码代码相关联的操作数的预定指令替换未解决的指令。分辨率执行方法包括：接收多个指令，其至少一个指令包括替换先前指令的替换指令，确定所接收的指令中是否包含所述替换指令，以及执行解决代码以在确定所述指令之后解析参考接收到的指令包括替换指令。替换指令包括标识分辨率代码的操作数。还公开了与这些方法相关联的处理器。

18. 发明公开

EP1489491A1 Dynamically changing the semantic of an instruction 审中-公开
标题翻译： DynamischeÄnderungdes Semantikbefehls
公开(公告)号：EP1489491A1
公开(公告)日：2004-12-22
申请号：EP03291502.7
申请日：2003-06-19
申请人： Texas Instruments Incorporated , Texas Instruments France
发明人： Chavel, Gerard, Residence du Valbosquet'20 , Lasserre, Serge , D'inverno, Dominique , Kuusela, Maija , Cabilic, Gilbert , Lesot, Jean-Philippe , Banatre, Michel , Routeau, Jean-Paul , Majoul, Salam , Parain, Frederic
IPC分类号： G06F9/318 , G06F11/34
CPC分类号： G06F11/3466 , G06F9/30087 , G06F9/30174 , G06F9/30189 , G06F2201/865 , G06F2201/88
摘要： A technique comprises receiving an instruction and dynamically changing the instruction's semantic based on programmable information that is separate from the instruction. The change in semantic may comprise the inclusion of monitoring code that determines a performance characteristic associated with the instruction or a change in the instruction's operation (e.g., the inclusion of read or write barrier operations to support a garbage collector).
摘要翻译：一种技术包括接收指令并基于与指令分离的可编程信息来动态地改变指令的语义。语义的变化可以包括包括确定与指令相关联的性能特征的监视代码或指令的操作的改变（例如，包括用于支持垃圾收集器的读取或写入屏障操作）。

19. 发明公开

EP1387274A2 Memory management for local variables 审中-公开
标题翻译：本地变量的内存管理
公开(公告)号：EP1387274A2
公开(公告)日：2004-02-04
申请号：EP03291906.0
申请日：2003-07-30
申请人： Texas Instruments Incorporated , Texas Instruments France
发明人： Chauvel, Gerard , D'Inverno, Dominique , Kuusela, Maija
IPC分类号： G06F12/08 , G06F9/40
CPC分类号： G06F12/126 , G06F12/0253 , G06F12/0804 , G06F12/0891 , G06F2212/502 , Y02D10/13
摘要： A processor preferably comprises a processing core (120) that generates memory addresses to access a main memory and on which a plurality of methods operate. Each method uses its own set of local variables. The processor also includes a cache subsystem comprising a multi-way set associative cache and a data memory that holds a contiguous block of memory defined by an address stored in a register (140), wherein local variables are stored in said data memory.
摘要翻译：处理器优选地包括处理核心（120），处理核心（120）产生存储器地址以访问主存储器并且多个方法在其上操作。每种方法都使用自己的一组局部变量。该处理器还包括高速缓存子系统，该高速缓存子系统包括多路组关联高速缓存和保存由存储在寄存器（140）中的地址定义的连续存储器块的数据存储器，其中局部变量存储在所述数据存储器中。

20. 发明公开

EP1182548A3 Dynamic hardware control for energy management systems using task attributes 审中-公开
标题翻译：与任务属性电源管理系统的动态硬件控制
公开(公告)号：EP1182548A3
公开(公告)日：2003-10-15
申请号：EP00402945.0
申请日：2000-10-24
申请人： TEXAS INSTRUMENTS FRANCE , Texas Instruments Incorporated
发明人： Chauvel, Gérard , Kuusela, Maija , D'Inverno, Dominique , Lasserre, serge
IPC分类号： G06F9/50 , G06F1/32 , G06F1/20
CPC分类号： G06F12/1027 , G06F1/206 , G06F1/3203 , G06F1/329 , G06F9/30043 , G06F11/3409 , G06F12/0864 , G06F12/0879 , G06F12/0891 , G06F2201/81 , G06F2201/88 , G06F2201/885 , G06F2212/1028 , Y02D10/13 , Y02D10/16 , Y02D10/24 , Y02D10/34 , Y10T307/461
摘要： A multiprocessor system (10) includes a plurality of processing modules, such as MPUs (12), DSPs (14), and coprocessors/DMA channels (16). Power management software (38) in conjunction with profiles (36) for the various processing modules and the tasks to executed are used to build scenarios which meet predetermined power objectives, such as providing maximum operation within package thermal constraints or using minimum energy. Actual activities associated with the tasks are monitored during operation to ensure compatibility with the objectives. The allocation of tasks may be changed dynamically to accommodate changes in environmental conditions and changes in the task list. As each task in a scenario is executed, a control word associated with the task can be used to enable/disable circuitry, or to set circuits to an optimum configuration.

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