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    • 1. 发明授权
    • Random number generating apparatus
    • 随机数生成装置
    • US06571263B1
    • 2003-05-27
    • US09377041
    • 1999-08-19
    • Gouichiro Nagai
    • Gouichiro Nagai
    • G06J100
    • H04L9/0861G06F7/588
    • A random number generating apparatus which is suitable for miniaturization and which can easily generate binary random numbers that are cryptographically secure is provided. The apparatus comprises: a semiconductor device having a junction; reverse bias applying circuit for applying a reverse bias voltage of a degree so as to cause a breakdown current in the junction; and a binarizing circuit for binarizing a noise signal created in a current path including said junction for generating random numbers from the binarized signal.
    • 提供了一种适合于小型化并且可以容易地生成密码安全的二进制随机数的随机数生成装置。 该装置包括:具有结的半导体器件; 反向偏压施加电路,用于施加一定程度的反向偏置电压,以便在所述结中引起击穿电流; 以及二值化电路,用于二值化在包括所述结的电流路径中产生的噪声信号,用于从二值化信号产生随机数。
    • 2. 发明授权
    • Physical random number generator, method of generating physical random numbers and physical random number storing medium
    • 物理随机数生成器,生成物理随机数的方法和物理随机数存储介质
    • US06195669B1
    • 2001-02-27
    • US09150928
    • 1998-09-10
    • Toru OnoderaShigeru KanemotoShigeaki Tsunoyama
    • Toru OnoderaShigeru KanemotoShigeaki Tsunoyama
    • G06J100
    • G06F7/588
    • A physical random number generator including a noise source configured to generate a noise signal, an alternating current AC coupling amplifying device which amplifies the noise signal while removing a direct current DC component therefrom by AC coupling to generate an amplified noise signal, an analog/digital A/D conversion device having an accuracy of not less than two bits which A/D converts the amplified noise signal to digital values composed of bit data of not less than two bits, and a processing device which processes the amplified noise signal and which processes digital values converted from a processed amplified noise signal to generate random number data of not less than two bits with an increased differential nonlinearity as compared to digital values unprocessed by the processing device.
    • 一种物理随机数发生器,包括被配置为产生噪声信号的噪声源,交流AC耦合放大装置,用于放大噪声信号,同时通过AC耦合去除其直流DC分量从而产生放大的噪声信号;模拟/数字 A / D转换装置,其具有将放大的噪声信号A / D转换成由不少于2位的位数据构成的数字值的2位以上的精度,以及处理放大后的噪声信号的处理装置, 与经处理的放大噪声信号转换的数字值相比,由处理装置未处理的数字值产生具有增加的差分非线性的不少于两位的随机数数据。
    • 3. 发明授权
    • Programmable random bit source
    • 可编程随机位源
    • US06795837B1
    • 2004-09-21
    • US09283769
    • 1999-03-31
    • Steven E. Wells
    • Steven E. Wells
    • G06J100
    • G06F7/588G06J1/00H03K3/84H04L9/0861
    • According to one embodiment, a programmable random bit source is disclosed. The programmable random bit source includes a latch having a data input, a bias input and a clock input. In addition, the programmable random bit source includes a programmable voltage source coupled to the bias input of the latch and a first oscillator coupled to the data input of the latch to output a first oscillating signal. Further, the programmable random bit source includes a second oscillator coupled to the clock input of the latch circuit to output a second oscillating signal having a frequency slower than a frequency of the first oscillating signal.
    • 根据一个实施例,公开了一种可编程随机位源。 可编程随机位源包括具有数据输入,偏置输入和时钟输入的锁存器。 此外,可编程随机位源包括耦合到锁存器的偏置输入的可编程电压源和耦合到锁存器的数据输入的第一振荡器,以输出第一振荡信号。 此外,可编程随机位源包括耦合到锁存电路的时钟输入的第二振荡器,以输出具有比第一振荡信号的频率慢的频率的第二振荡信号。
    • 4. 发明授权
    • Method and device for detecting random missing code
    • 用于检测随机丢失码的方法和装置
    • US06779005B2
    • 2004-08-17
    • US09876824
    • 2001-06-07
    • Yi-Jen Cheng
    • Yi-Jen Cheng
    • G06J100
    • H03M3/378
    • A method for detecting a random missing code by applying a delta-sigma (&Dgr;&Sgr;) analog digital converter having a digital filter is provided. The method includes steps of floating an input end of the delta-sigma (&Dgr;&Sgr;) analog digital converter, and detecting an output code outputted from the digital filter of the delta-sigma (&Dgr;&Sgr;) analog digital converter for determining whether the random missing code exists. A detecting device for detecting the random missing code is also provided.
    • 提供了一种通过应用具有数字滤波器的Δ-Σ(ΔSigma)模拟数字转换器来检测随机丢失码的方法。 该方法包括以下步骤:浮动Δ-Σ(ΔSigma)模拟数字转换器的输入端,以及检测从Δ-Σ(ΔSigma)模拟数字转换器的数字滤波器输出的输出码,以确定是否存在随机丢失码 。 还提供了用于检测随机丢失码的检测装置。
    • 5. 发明授权
    • Finite-difference solver based on field programmable interconnect devices
    • 基于现场可编程互连器件的有限差分求解器
    • US06836783B1
    • 2004-12-28
    • US09683136
    • 2001-11-26
    • James C. LykeDavid Vreeland
    • James C. LykeDavid Vreeland
    • G06J100
    • G06J1/00
    • A method for solving a wide variety of linear partial differential equations by exploiting the normally undesirable parasitic resistances present in flexible digital switching components. The terminal relationships of these field programmable interconnect devices can be manipulated under program control to directly mimic the nodal relationships defined in finite difference method models of a partial difference equation problem. Adding analog-to-digital/digital-to-analog converters (“ADCs/DACs”) to automate the solution process can extend the method of analog equation solving. It is also possible to segment larger problems using this approach, feeding sections into the device and injecting/capturing voltages as appropriate to produce an overall solution that will eventually converge after a number of presentation/solution sub-cycles.
    • 通过利用存在于柔性数字开关部件中的通常不期望的寄生电阻来求解各种线性偏微分方程的方法。 这些现场可编程互连设备的终端关系可以在程序控制下进行操作,以直接模拟部分差分方程问题的有限差分方法模型中定义的节点关系。 添加模数转换器(“ADC / DAC”)来自动化解决过程可以扩展模拟方程求解的方法。 也可以使用这种方法来分割较大的问题,将部分馈送到设备中并适当地注入/捕获电压以产生将在多个呈现/解决子周期之后最终会聚的整体解决方案。
    • 6. 发明授权
    • Matched filter and signal reception apparatus
    • 匹配滤波器和信号接收装置
    • US06389438B1
    • 2002-05-14
    • US09256351
    • 1999-02-24
    • Changming Zhou
    • Changming Zhou
    • G06J100
    • H04B1/7093H03H17/0254H04B1/708H04B2201/7071
    • A matched filter and signal reception apparatus having a low power consumption and small circuitry size. In the matched filter, an analog input signal is converted to digital data by an analog to digital (A/D) converter, digital multiplication, as a correlation calculation, is executed by a plurality of exclusive-OR circuits, and an addition of outputs of the exclusive-OR circuits is performed. In the digital multiplication, the digital data is multiplied by a spreading code of one bit. The outputs from the exclusive-OR circuits are added for each weight of bits, and the addition output results are weighted and summed together.
    • 具有低功耗和小电路尺寸的匹配滤波器和信号接收装置。 在匹配滤波器中,通过模数(A / D)转换器将模拟输入信号转换为数字数据,作为相关计算的数字乘法由多个异或电路执行,并且输出的相加 的异或电路。 在数字乘法中,数字数据乘以一位的扩展码。 对于每个比特的权重,加上来自异或电路的输出,并将加法输出结果加权并相加在一起。
    • 7. 发明授权
    • Correlation value calculating device
    • 相关值计算装置
    • US06829625B2
    • 2004-12-07
    • US09798916
    • 2001-03-06
    • Atsuhiko Okada
    • Atsuhiko Okada
    • G06J100
    • G06F17/15
    • A correlation value calculating device which has a small scale of circuitry, and allows template vectors to be rewritten. One template vector is written to one row of DRAM memory cells. One memory cell pair is used for storing one template vector component. A high-level is written to one memory cell and a low-level is written to the other memory cell according to the value of the template vector component. When calculating a correlation value, one memory cell of each memory cell pair is respectively connected to corresponding bit line according to the corresponding input vector component. If the components of both vectors are matched, the memory cell of the high-level is connected to the bit line, and if both vectors are not matched, the memory cell of the low-level is connected to the bit line. The electric potential of bit lines each become to indicate the correlation value.
    • 一种相关值计算装置,其具有小规模的电路,并允许重写模板向量。 一个模板向量写入一行DRAM存储单元。 一个存储单元对用于存储一个模板向量分量。 高电平写入一个存储单元,低电平根据模板向量分量的值写入另一个存储单元。 当计算相关值时,每个存储单元对的一个存储单元根据相应的输入向量分量分别连接到对应的位线。 如果两个矢量的分量匹配,则高电平的存储单元连接到位线,如果两个矢量不匹配,则低电平的存储单元连接到位线。 位线的电位各自变为指示相关值。
    • 8. 发明授权
    • Semiconductor arithmetic unit
    • 半导体运算单元
    • US06704757B1
    • 2004-03-09
    • US09673516
    • 2001-01-02
    • Tadahiro OhmiTadashi ShibataAkira NakadaTatsuro MorimotoTakahisa Nitta
    • Tadahiro OhmiTadashi ShibataAkira NakadaTatsuro MorimotoTakahisa Nitta
    • G06J100
    • G06N3/063G06N3/0635
    • A semiconductor arithmetic unit which realizes a maximum or minimum value retrieval operation at high speed and with a high degree of accuracy used in a vector quantization processor is composed of a binary-multivalue-analog merged operation processing circuit. A multi-loop circuit includes an amplifying circuit group composed of a plurality of sets of first amplifiers with a floating gate to which first electrodes and a single second electrode are capacitively coupled with a predetermined ratio, a logical operation circuit to which output signals of the amplifying circuit group are inputted and which outputs a logical 0 or 1, and a second amplifying circuit to which an output signal of the logical operation circuit is inputted and whose output is distributed to all of the second electrodes of the amplifying circuit group. The second amplifying circuit includes an adjusting circuit which adjusts an output current driving ability and a controlling circuit which controls the adjustment with a predetermined regulation. The adjustment of the controlling circuit is executed according to variation of the output of the logical operation circuit.
    • 实现在矢量量化处理器中使用的高速度和高精度的最大值或最小值检索操作的半导体运算单元由二进制多值模拟合并运算处理电路构成。 多回路电路包括由具有浮置栅极的多组第一放大器组成的放大电路组,第一电极和单个第二电极以预定比率电容耦合到该第一放大器;逻辑运算电路, 输入逻辑0或1的放大电路组,输入逻辑运算电路的输出信号并将其输出分配给放大电路组的所有第二电极的第二放大电路。 第二放大电路包括调节输出电流驱动能力的调节电路和控制电路,控制电路以预定的调节进行调节。 控制电路的调整根据逻辑运算电路的输出的变化进行。
    • 9. 发明授权
    • Transfer function implementation using digital impedance synthesis
    • 使用数字阻抗合成的传递函数实现
    • US06338077B1
    • 2002-01-08
    • US09321899
    • 1999-05-28
    • Spiro PoulisJohn EvansShayne Messerly
    • Spiro PoulisJohn EvansShayne Messerly
    • G06J100
    • H03H17/02
    • A system and circuit is provided for digitally synthesizing the impedance of a transfer function. The impedance of the transfer function is digitally synthesized by generating a current that, when combined with an input voltage, results in the impedance of the transfer function. This is accomplished by sensing the input signal and processing it with a generator or multiplier such that a voltage is produced. The produced voltage controls a current source and creates a current having a value equal to the inverse of the transfer function impedance. The sensed or input voltage divided by the generated current is equal to the impedance of the transfer function. In this manner, many different transfer functions can be digitally synthesized without having to design an alternate circuit.
    • 提供了一种用于数字合成传递函数的阻抗的系统和电路。 传递函数的阻抗通过产生与输入电压组合导致传递函数的阻抗的电流数字合成。 这通过感测输入信号并用发生器或乘法器来处理,从而产生电压来实现。 产生的电压控制电流源并产生具有等于传递函数阻抗的倒数的值的电流。 感测或输入电压除以发电电流等于传递函数的阻抗。 以这种方式,可以数字地合成许多不同的传递函数,而不必设计备用电路。