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    • 7. 发明授权
    • One stage word line decoder/driver with speed-up Darlington drive and
adjustable pull down
    • 一级字线解码器/驱动器,加速达林顿驱动器和可调下拉
    • US5255240A
    • 1993-10-19
    • US714442
    • 1991-06-13
    • Robert C. Wong
    • Robert C. Wong
    • G11C11/413G11C8/08G11C8/10G11C11/415H03K17/615H03K19/013G11C8/00H03K3/26
    • H03K19/0136G11C8/08G11C8/10H03K19/0133
    • A word line decoder/driver has a Darlington circuit connected in parallel with word line driver transistors to provide rapid switching thereof. The Darlington circuit receives an input from decoder transistors through a capacitance, such as a diffusion capacitance, which establishes a time constant longer than the nominal access cycle time of the memory. Thus, during the nominal cycle time of the memory, the word line driver transistors merely supplement the pull-up of the word lines, the speed of which is limited only by the switching speed of the Darlington circuit. Therefore, the pull-up of the input to the word line driver transistors is made non-critical and the circuit can be simplified to reduce element count while achieving substantial reduction in power consumption. While the fast collector pull down of the deselected word line is controlled by an adjustable clamp, word line pull-up is maintained well below 1 nsec and chip access time is below 2 nsec and voltage margins are increased. By converting input voltage levels to lower values with respect to the power supply voltage, large voltage swings can be achieved with a single stage circuit within a 3.6 volt power supply.
    • 字线解码器/驱动器具有与字线驱动晶体管并联连接的达林顿电路,以提供其快速切换。 达林顿电路通过诸如扩散电容的电容接收来自解码器晶体管的输入,其建立了比存储器的标称存取周期时间更长的时间常数。 因此,在存储器的标称周期时间期间,字线驱动晶体管仅补充字线的上拉,其速度仅受达林顿电路的切换速度的限制。 因此,输入到字线驱动晶体管的上拉是非关键的,并且可以简化电路以减少元件数量,同时实现功耗的显着降低。 当取消选择的字线的快速收集器下拉由可调节的钳位器控制时,字线上拉保持在1ns以下,并且芯片访问时间低于2nsec,并且电压裕度增加。 通过将输入电压电平相对于电源电压转换为较低的值,可以在3.6伏电源内使用单级电路实现大的电压摆幅。