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    • 1. 发明授权
    • Integrator-filter circuit
    • 积分滤波电路
    • US06133782A
    • 2000-10-17
    • US195058
    • 1998-11-18
    • Axel KattnerHolger Gehrt
    • Axel KattnerHolger Gehrt
    • H03H11/04H03B1/00
    • H03H11/04H03F2200/462H03F2200/477H03F2203/21161H03F2203/45066H03F2203/45076
    • To achieve a constant control range in an integrator-filter circuit for filtering a push-pull signal, having at least two integrator elements (1) this second control current being having resistors (11, 12) arranged at its inputs, a subsequent current multiplier (13) having two signal inputs (14, 15) and preceding a push-pull amplifier (18) with an inverting input (20) and a non-inverting input (19), having inverting output (21) fed back to the non-inverting input (19) and a non-inverting output (23) fed back to the inverting input (20) via capacitances (22, 24), the current multiplier (13) receiving, at two control inputs (37, 38), a first and a second control current (I.sub.1, I.sub.2) for adjusting the integration time constant of the integrator element (1) is adjustable and from which the second control current (I.sub.2) flows in substantially two halves through the signal inputs (14, 15) of the current multiplier (13), an associated third control current (I.sub.3) is generated which, in dependence upon a second control voltage (U.sub.2) is generated, at whose variation the third control current (I.sub.3) varies proportionally to the second control current (I.sub.2). An associated compensation circuit (2) is provided for each integrator element (1).
    • 为了在用于滤波推挽信号的积分器滤波器电路中实现恒定的控制范围,具有至少两个积分器元件(1),该第二控制电流具有布置在其输入端的电阻器(11,12),随后的电流倍增器 (13)具有两个信号输入(14,15),并且在具有反相输入(20)和反相输入(19)的推挽放大器(18)之前,具有反馈输出(21)反馈到非反相输入 通过电容(22,24)反相输入(19)和反相输出(23)反馈到反相输入(20),电流倍增器(13)在两个控制输入(37,38)处接收 用于调整积分元件(1)的积分时间常数的第一和第二控制电流(I1,I2)是可调节的,并且第二控制电流(I2)通过信号输入(14,15)基本上从两个半部流入 ),产生相关联的第三控制电流(I3),其依赖于上述 n产生第二控制电压(U2),其变化是第三控制电流(I3)与第二控制电流(I2)成比例地变化。 为每个积分器元件(1)提供相关的补偿电路(2)。
    • 3. 发明申请
    • ECHO CANCELLATION
    • ECHO取消
    • US20130230183A1
    • 2013-09-05
    • US13410677
    • 2012-03-02
    • Joakim ErikssonJonny Strandh
    • Joakim ErikssonJonny Strandh
    • H04B3/20H04R3/00
    • H04R3/02H03F3/185H03F2200/03H03F2203/45076H03F2203/45082H03F2203/45084H03F2203/45088H04R19/016
    • The invention is directed to echo cancellation for a microphone system. An exemplary microphone system comprises a first transistor, wherein a gate terminal of the first transistor is connected to a ground terminal via a microphone electret element, the microphone electret element being associated with a capacitance and a voltage, the microphone electret element reverse biasing the first transistor; and a second transistor in parallel with the first transistor, wherein a gate terminal of the second transistor is connected to the ground terminal via a capacitor, the capacitance of the capacitor being selected to suppress at least a portion of a common mode signal, and wherein the gate terminal of the second transistor is not connected to the microphone electret element. The common mode signal comprises the echo, which may be the output of a speaker system that is received as input to the microphone system.
    • 本发明涉及用于麦克风系统的回波消除。 示例性麦克风系统包括第一晶体管,其中第一晶体管的栅极端子经由麦克风驻极体元件连接到接地端子,所述麦克风驻极体元件与电容和电压相关联,所述麦克风驻极体元件反向偏置所述第一晶体管 晶体管 以及与所述第一晶体管并联的第二晶体管,其中所述第二晶体管的栅极端子经由电容器连接到所述接地端子,所述电容器的电容被选择为抑制共模信号的至少一部分,并且其中 第二晶体管的栅极端子不连接到麦克风驻极体元件。 共模信号包括回波,其可以是作为麦克风系统的输入接收的扬声器系统的输出。
    • 5. 发明授权
    • Differential amplifier with common-mode regulating circuit
    • 具有共模调节电路的差分放大器
    • US06175226B1
    • 2001-01-16
    • US09518562
    • 2000-03-03
    • Giancarlo ClericiLuciano Tomasini
    • Giancarlo ClericiLuciano Tomasini
    • G05F316
    • H03F3/45089H03F3/45497H03F2203/45008H03F2203/45076H03F2203/45658
    • A fully differential amplifier, in other words one having differential inputs and outputs, is associated with a circuit to regulate the output voltage reference. This circuit contains a resistive divider connected between the output terminals of the differential amplifier, a diode between the intermediate connection of the divider and common bases of load transistors of the differential amplifier, and a current mirror having a first branch connected to a reference voltage generator and a second branch which forms a current generator connected between the common bases of the load transistors and ground. This provides an efficient feedback control system with low power consumption and takes up less space on an integrated circuit.
    • 具有差分输入和输出的全差分放大器与用于调节输出电压基准的电路相关联。 该电路包括连接在差分放大器的输出端子之间的电阻分压器,分压器的中间连接器和差分放大器的负载晶体管的公共基极之间的二极管,以及具有连接到参考电压发生器 以及第二分支,其形成连接在负载晶体管的公共基极和地之间的电流发生器。 这提供了一种低功耗的有效的反馈控制系统,并且在集成电路上占用较少的空间。
    • 7. 发明授权
    • Echo cancellation
    • 回声取消
    • US08965013B2
    • 2015-02-24
    • US13410677
    • 2012-03-02
    • Joakim ErikssonJonny Strandh
    • Joakim ErikssonJonny Strandh
    • H04R25/00H04R3/00H04R9/08
    • H04R3/02H03F3/185H03F2200/03H03F2203/45076H03F2203/45082H03F2203/45084H03F2203/45088H04R19/016
    • The invention is directed to echo cancellation for a microphone system. An exemplary microphone system comprises a first transistor, wherein a gate terminal of the first transistor is connected to a ground terminal via a microphone electret element, the microphone electret element being associated with a capacitance and a voltage, the microphone electret element reverse biasing the first transistor; and a second transistor in parallel with the first transistor, wherein a gate terminal of the second transistor is connected to the ground terminal via a capacitor, the capacitance of the capacitor being selected to suppress at least a portion of a common mode signal, and wherein the gate terminal of the second transistor is not connected to the microphone electret element. The common mode signal comprises the echo, which may be the output of a speaker system that is received as input to the microphone system.
    • 本发明涉及用于麦克风系统的回波消除。 示例性麦克风系统包括第一晶体管,其中第一晶体管的栅极端子经由麦克风驻极体元件连接到接地端子,所述麦克风驻极体元件与电容和电压相关联,所述麦克风驻极体元件反向偏置所述第一晶体管 晶体管 以及与所述第一晶体管并联的第二晶体管,其中所述第二晶体管的栅极端子经由电容器连接到所述接地端子,所述电容器的电容被选择为抑制共模信号的至少一部分,并且其中 第二晶体管的栅极端子不连接到麦克风驻极体元件。 共模信号包括回波,其可以是作为麦克风系统的输入接收的扬声器系统的输出。
    • 9. 发明授权
    • Signal amplifier with fast recovery time response, efficient output driver and DC offset cancellation capability
    • 具有快速恢复时间响应的信号放大器,高效的输出驱动器和DC偏移消除功能
    • US06198350B1
    • 2001-03-06
    • US09290835
    • 1999-04-13
    • Seyed Ramezan Zarabadi
    • Seyed Ramezan Zarabadi
    • H03F326
    • H03F3/45179H03F3/45717H03F2203/45068H03F2203/45074H03F2203/45076H03F2203/45078H03F2203/45081H03F2203/45188H03F2203/45212H03F2203/45508
    • A signal amplifying circuit (24) includes level shifting input circuits (D1-D4) permitting input common-mode voltages (VIN1 and VIN2) of an amplifier and fault detection circuit (50) to vary between preset limits. The sense amplifier circuit (24) includes a DC offset buffer circuit (52) operable to receive an analog DC offset compensation signal and provide this signal to an input of the amplifier and fault detection circuit (50). The buffered DC offset compensation signal provided to the amplifier and fault detection circuit (50) is operable to reduce an aggregate DC offset voltage attributable to signal amplifying circuit (24) to a desired DC offset level. The amplifier and fault detection circuit (50) also includes a fault detection function whereby an output (VSENSE) of the amplifier circuit (50) is forced to a predetermined output state if either, or both, of the inputs (VIN1 and VIN2) of the sense amplifier circuit (24) are unconnected; i.e., floating. The output (VSENSE) of the amplifier and fault detection circuit (50) is provided to an output buffer circuit (54) operable to modulate the load current supplied to an output (VOUT1, VOUT2) thereof as a function of a difference between the amplifier output signal (VSENSE) and the output buffer output signal (VOUT1).
    • 信号放大电路(24)包括允许放大器和故障检测电路(50)的输入共模电压(VIN1和VIN2)在预设极限之间变化的电平移位输入电路(D1-D4)。 读出放大器电路(24)包括DC偏移缓冲电路(52),可操作以接收模拟DC偏移补偿信号,并将该信号提供给放大器和故障检测电路(50)的输入端。 提供给放大器和故障检测电路(50)的缓冲DC偏移补偿信号可操作以将归因于信号放大电路(24)的总的DC偏移电压减小到期望的DC偏移电平。 放大器和故障检测电路(50)还包括故障检测功能,由此如果放大器电路(50)的输入(VIN1和VIN2)的输入(VIN1和VIN2)之一或两者被强制为预定的输出状态 读出放大器电路(24)不连接; 即浮动。 放大器和故障检测电路(50)的输出(VSENSE)被提供给输出缓冲器电路(54),该输出缓冲器电路(54)可用于调制提供给其输出(VOUT1,VOUT2)的负载电流作为放大器 输出信号(VSENSE)和输出缓冲器输出信号(VOUT1)。