专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US5834976A Frequency self-compensated operational amplifier 失效
标题翻译：频率自补偿运算放大器
公开(公告)号：US5834976A
公开(公告)日：1998-11-10
申请号：US756024
申请日：1996-11-26
申请人： Luciano Tomasini , Rinaldo Castello , Giancarlo Clerici , Ivan Bietti
发明人： Luciano Tomasini , Rinaldo Castello , Giancarlo Clerici , Ivan Bietti
IPC分类号： H03F1/08 , H03F1/14 , H03F1/34
CPC分类号： H03F1/086
摘要： An operational amplifier frequency self-compensated with respect to closed-loop gain comprises a transconductance input stage and an amplifier output stage connected serially together to receive an input signal on at least one input terminal of the amplifier and generate an amplified signal on an output terminal of the amplifier. Provided between the input and output stages is an intermediate node which is connected to a compensation block to receive a frequency-variable compensation signal therefrom. The compensation block is coupled with its input to the input terminal of the amplifier The compensation block is connected to receive at least the feedback signal. Preferably, the compensation signal is variable as a function of a gain value which is determined by the feedback circuit, and said variation of the compensation signal occurs in a relationship of inverse proportionality to the gain value.
摘要翻译：相对于闭环增益自补偿的运算放大器频率包括跨导输入级和串联连接的放大器输出级，以在放大器的至少一个输入端上接收输入信号，并在输出端产生放大信号的放大器。在输入级和输出级之间设置有中间节点，其连接到补偿块以从其接收频率可变的补偿信号。补偿块与其输入耦合到放大器的输入端子。补偿块被连接以至少接收反馈信号。优选地，补偿信号作为由反馈电路确定的增益值的函数而变化，并且补偿信号的所述变化以与增益值成反比关系的关系发生。

2. 发明授权

US06545503B1 Output buffer for digital signals 有权
标题翻译：数字信号输出缓冲器
公开(公告)号：US06545503B1
公开(公告)日：2003-04-08
申请号：US09684157
申请日：2000-10-06
申请人： Luciano Tomasini , Giancarlo Clerici
发明人： Luciano Tomasini , Giancarlo Clerici
IPC分类号： H03K1716
CPC分类号： H03K19/00361 , H03K17/166 , H03K19/00384
摘要： A buffer having a circuit for reducing the slope of an input signal and a negative feedback circuit that generates a regulating signal dependent on the variation of the output signal and that applies the regulating signal to the input of the buffer. A precise regulation of the slope, independent of variations in the production process and of environmental conditions, is achieved.
摘要翻译：具有用于减小输入信号的斜率的电路的缓冲器以及依赖于输出信号的变化而产生调节信号并将调节信号施加到缓冲器的输入端的负反馈电路。实现了坡度的精确调节，与生产过程和环境条件的变化无关。

3. 发明授权

US5955895A Interface circuit for boosting control signals 失效
标题翻译：用于升压控制信号的接口电路
公开(公告)号：US5955895A
公开(公告)日：1999-09-21
申请号：US744715
申请日：1996-10-29
申请人： Luciano Tomasini , Rinaldo Castello , Giancarlo Clerici , Ivan Bietti
发明人： Luciano Tomasini , Rinaldo Castello , Giancarlo Clerici , Ivan Bietti
IPC分类号： H03K17/06 , H03K19/0185
CPC分类号： H03K17/063
摘要： An interface circuit is disposed between a generator of control signals and a plurality of electronic switches in order to produce boosted voltage signals corresponding to the control signals for activating the electronic switches. To avoid the use of a capacitor with a high capacitance and thus to reduce an area of the integrated circuit, the interface circuit includes a generator of activation signals and a plurality of voltage multipliers each having an input connected to an output of the control signal generator, an output connected to at least one terminal for activating an electronic switch and two control terminals connected to an activation signal generator. Each voltage multiplier includes MOS transistors operatively coupled in series between the input and the output. The MOS transistors operate in response to the activation signals to produce a boosted voltage on the capacitor.
摘要翻译：接口电路设置在控制信号的发生器和多个电子开关之间，以便产生对应于用于激活电子开关的控制信号的升压电压信号。为了避免使用具有高电容的电容器并因此减小集成电路的面积，接口电路包括激活信号的发生器和多个电压乘法器，每个电压乘法器具有连接到控制信号发生器的输出的输入连接到用于激活电子开关的至少一个终端的输出和连接到激活信号发生器的两个控制终端。每个电压倍增器包括可操作地耦合在输入和输出之间的MOS晶体管。 MOS晶体管响应于激活信号而工作，以在电容器上产生升压电压。

4. 发明授权

US5825250A Operational amplifier having an adjustable frequency compensation 失效
标题翻译：具有可调频率补偿的运算放大器
公开(公告)号：US5825250A
公开(公告)日：1998-10-20
申请号：US757384
申请日：1996-11-27
申请人： Luciano Tomasini , Rinaldo Castello , Giancarlo Clerici , Ivan Bietti
发明人： Luciano Tomasini , Rinaldo Castello , Giancarlo Clerici , Ivan Bietti
IPC分类号： H03F1/08 , H03F1/14
CPC分类号： H03F1/086
摘要： An integrated operational amplifier with adjustable frequency compensation having a transconductance input stage and an amplifier output stage connected serially together between an input terminal and an output terminal of the operational amplifier. For the purpose of frequency compensation, moreover, a compensation block is connected across the input and the output of the output stage. The compensation block uses a plurality of charge storage elements connected in parallel together and in series with switch block which selects a sub-plurality of said charge storage elements in response to an external signal of the amplifier. The compensation block thereby provides an overall effective capacitance for frequency compensation.
摘要翻译：具有可变频率补偿的集成运算放大器，具有串联连接在运算放大器的输入端和输出端之间的跨导输入级和放大器输出级。此外，为了频率补偿的目的，在输出级的输入端和输出端之间连接补偿块。补偿块使用并联连接并与开关块串联的多个电荷存储元件，该开关块响应于放大器的外部信号选择子多个所述电荷存储元件。因此，补偿块为频率补偿提供总体有效电容。

5. 发明授权

US5815037A High-pass filter, particularly for canceling out the offset in a chain of amplifiers 失效
标题翻译：高通滤波器，特别是用于消除放大器链中的偏移
公开(公告)号：US5815037A
公开(公告)日：1998-09-29
申请号：US651106
申请日：1996-05-21
申请人： Luciano Tomasini , Rinaldo Castello , Ivan Bietti , Giancarlo Clerici
发明人： Luciano Tomasini , Rinaldo Castello , Ivan Bietti , Giancarlo Clerici
IPC分类号： H03F3/45
CPC分类号： H03F3/45475 , H03F3/45982 , H03F2203/45526
摘要： A high-pass filter includes at least one circuit unit constituted by a first branch and a second branch both connected to an input of the filter on one side and, on the other side, to an adder the output of which is the output of the filter. The first branch includes means for transferring an input signal substantially without modifying its frequency content, and the second branch comprises a low-pass filter. The circuit elements are chosen such that the components of the input signal with frequencies below the cut-off frequency of the low-pass filter are substantially cancelled out at the output of the adder. The filter is suitable for being produced within a particularly small area in an integrated circuit.
摘要翻译：高通滤波器包括由一侧连接到滤波器的输入的第一分支和第二分支构成的至少一个电路单元，另一侧由加法器输出，该加法器的输出为过滤。第一分支包括用于基本上不修改其频率内容来传送输入信号的装置，并且第二分支包括低通滤波器。电路元件被选择为使得低于低通滤波器的截止频率的输入信号的分量在加法器的输出处基本抵消。该滤波器适合于在集成电路的特别小的区域内产生。

6. 发明授权

US06842520B2 Telephone 有权
标题翻译：电话
公开(公告)号：US06842520B2
公开(公告)日：2005-01-11
申请号：US09790479
申请日：2001-02-21
申请人： Luciano Tomasini , Giancarlo Clerici
发明人： Luciano Tomasini , Giancarlo Clerici
IPC分类号： H04M1/74 , H04M19/08 , H04M1/00 , H04M9/00 , H04M9/08
CPC分类号： H04M19/08 , H04M1/74
摘要： A telephone comprises an acoustic alarm, conversation members, first control means for the acoustic alarm, second control means for the conversation members, first supply means and second supply means for absorbing energy from a telephone line, the first supply means and the second supply means supplying the first control means in a call condition and the second control means in a conversation condition, respectively, wherein the first supply means further supplying the second control means in the call condition.
摘要翻译：一种电话包括声音警报器，对话构件，用于声音警报的第一控制装置，对话构件的第二控制装置，用于从电话线吸收能量的第一供应装置和第二供应装置，第一供应装置和第二供应装置在通话状态下分别提供第一控制装置和第二控制装置，其中第一供应装置在通话状态下进一步提供第二控制装置。

7. 发明授权

US06542034B2 Operational amplifier with high gain and symmetrical output-current capability 有权
标题翻译：具有高增益和对称输出电流能力的运算放大器
公开(公告)号：US06542034B2
公开(公告)日：2003-04-01
申请号：US09778677
申请日：2001-02-07
申请人： Luciano Tomasini , Giancarlo Clerici
发明人： Luciano Tomasini , Giancarlo Clerici
IPC分类号： H03F318
CPC分类号： H03F3/3001
摘要： An operational amplifier includes a first stage, and a second stage with an input connected to an output of the first stage and an output connected to a load. The second stage includes between its input and its output a first signal path for driving the load in a first direction, and a second signal path for driving the load in the opposite direction. The first and second signal paths have substantially equal gains for small signals, substantially equal output impedances for small and large signals, and substantially equal output-current capabilities.
摘要翻译：运算放大器包括第一级和第二级，其输入端连接到第一级的输出端，输出端连接到负载。第二级在其输入和输出之间包括用于沿第一方向驱动负载的第一信号路径和用于沿相反方向驱动负载的第二信号路径。第一和第二信号路径对于小信号具有基本上相等的增益，对于小信号和大信号基本相等的输出阻抗以及基本相等的输出电流能力。

8. 发明授权

US5990748A Frequency self-compensated operational amplifier 有权
标题翻译：频率自补偿运算放大器
公开(公告)号：US5990748A
公开(公告)日：1999-11-23
申请号：US129288
申请日：1998-08-05
申请人： Luciano Tomasini , Rinaldo Castello , Giancarlo Clerici , Ivan Bietti
发明人： Luciano Tomasini , Rinaldo Castello , Giancarlo Clerici , Ivan Bietti
IPC分类号： H03F1/08 , H03F1/14 , H03F1/34
CPC分类号： H03F1/086
摘要： An operational amplifier frequency self-compensated with respect to closed-loop gain comprises a transconductance input stage and an amplifier output stage connected serially together to receive an input signal on at least one input terminal of the amplifier and generate an amplified signal on an output terminal of the amplifier. Provided between the input and output stages is an intermediate node which is connected to a compensation block to receive a frequency-variable compensation signal therefrom. The compensation block is coupled with its input to the input terminal of the amplifier. The compensation block is connected to receive at least the feedback signal. Preferably, the compensation signal is variable as a function of a gain value which is determined by the feedback circuit, and said variation of the compensation signal occurs in a relationship of inverse proportionality to the gain value.
摘要翻译：相对于闭环增益自补偿的运算放大器频率包括跨导输入级和串联连接的放大器输出级，以在放大器的至少一个输入端上接收输入信号，并在输出端产生放大信号的放大器。在输入级和输出级之间设置有中间节点，其连接到补偿块以从其接收频率可变的补偿信号。补偿块与其输入耦合到放大器的输入端。补偿块被连接以至少接收反馈信号。优选地，补偿信号作为由反馈电路确定的增益值的函数而变化，并且补偿信号的所述变化以与增益值成反比关系的关系发生。

9. 发明授权

US5748029A MOS transistor switching circuit without body effect 失效
标题翻译： MOS晶体管开关电路无体效应
公开(公告)号：US5748029A
公开(公告)日：1998-05-05
申请号：US624126
申请日：1996-03-29
申请人： Luciano Tomasini , Rinaldo Castello , Giancarlo Clerici , Ivan Bietti
发明人： Luciano Tomasini , Rinaldo Castello , Giancarlo Clerici , Ivan Bietti
IPC分类号： H01L21/8234 , H01L27/088 , H03K17/16 , H03K17/687
CPC分类号： H03K17/6874 , H03K17/162 , H03K2217/0018
摘要： A switching circuit utilizing MOS transistors without body effect having a first transistor inserted with source and drain terminals between two connection terminals, and a second and third transistors inserted in series by means of their respective source and drain terminals between the first transistor and a ground. The gate terminal of the second transistor is connected to the gate terminal of the first transistor to which is applied a command signal. Upon switching a signal is applied in phase opposition to the command signal to the gate terminal of the third transistor. The substrates of the first and the second transistors are connected to a connection node between the second and third transistors. The substrate of the third transistor is connected to ground.
摘要翻译：利用具有体效应的MOS晶体管的开关电路具有在两个连接端子之间插入源极和漏极端子的第一晶体管，以及通过其第一晶体管和地之间的各自的源极和漏极端子串联插入的第二和第三晶体管。第二晶体管的栅极端子连接到施加有命令信号的第一晶体管的栅极端子。在切换时，与第三晶体管的栅极端子相反地施加与指令信号相反的信号。第一和第二晶体管的基板连接到第二和第三晶体管之间的连接节点。第三晶体管的基板连接到地。

10. 发明授权

US06759905B2 Analog input circuit with common mode compatibility to both supply nodes 有权
标题翻译：模拟输入电路与两个电源节点具有共模兼容性
公开(公告)号：US06759905B2
公开(公告)日：2004-07-06
申请号：US10325672
申请日：2002-12-20
申请人： Luciano Tomasini , Giancarlo Clerici
发明人： Luciano Tomasini , Giancarlo Clerici
IPC分类号： H03F345
CPC分类号： H03F3/4521 , H03F3/45659 , H03F2203/45648
摘要： An analog input circuit may include a pair of differential transconductance input stages having input nodes connected in parallel and which are fed the analog input signal. One of the differential transconductance stages may have common mode compatibility toward the supply node at the highest potential, and the other stage may have common mode compatibility toward the supply node at the lowest potential. Furthermore, differential output currents of the transconductance input stages may be summed differentially on first and second input nodes of a differential converter stage, which converts the differential current signals to an amplified differential voltage output signal.
摘要翻译：模拟输入电路可以包括一对差分跨导输入级，其具有并联连接的输入节点并且馈送模拟输入信号。差分跨导级中的一个可能具有朝向最高电位的电源节点的共模兼容性，而另一级可具有处于最低电位的电源节点的共模兼容性。此外，跨导输入级的差分输出电流可以在差分转换器级的第一和第二输入节点上差分求和，其将差分电流信号转换为放大的差分电压输出信号。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式