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    • 7. 发明授权
    • Data processing system for multi-precision arithmetic
    • 数据处理系统用于多精度算术
    • US4449196A
    • 1984-05-15
    • US193028
    • 1980-10-02
    • Eric K. Pritchard
    • Eric K. Pritchard
    • G05B19/42G06F7/50
    • G05B19/42G05B2219/33337G05B2219/33342G05B2219/34002G05B2219/34149G05B2219/34157G05B2219/34164G05B2219/34167G05B2219/34179G05B2219/35369G05B2219/35436G05B2219/41326G05B2219/41408G05B2219/43006G05B2219/45176
    • A numerically controlled machine includes a first computer which stores command data for a path and derives sets of interpolation point data from said command data for a plurality of points along the path. A second computer stores two sets of interpolation point data from said first computer and extrapolates a set of said stored interpolation point data by incrementing velocity with acceleration and position with velocity using a noncircular high order polynomial to produce a sequence of driver command signals.A timing means provides timing signals to the second computer to determine the number and rate of iterations of drive command signals in said sequence as predetermined by the first computer for each set of interpolation point data.The program execution time in the second computer is reduced by a unique method of multiprecision calculation which requires a carry flip flop for each variable calculated and a sign flip flop for eliminated word segments. The memory address decoding for the two sets of interpolation point data are interchanged after each sequence invisibly to the computers. An index register causes data memory address decoding for a plurality of motor drivers invisible to the computers and selects an output to the appropriate motor driver. The second computer includes a manual mode program to calculate the sequence of driver command signals using a manually induced velocity vector. A phased locked loop in the timing means controllably reduces the iteration rate to zero in response to an error signal.
    • 数控机器包括第一计算机,其存储用于路径的命令数据,并且根据来自所述路径的多个点的所述命令数据导出插值点数据集合。 第二计算机存储来自所述第一计算机的两组内插点数据,并且通过使用非圆形高阶多项式使用加速度和位置速度递增速度来外推一组所述存储的插值点数据,以产生一系列驱动器命令信号。 定时装置向第二计算机提供定时信号,以确定由第一计算机为每组内插点数据预定的所述序列中的驱动命令信号的迭代次数和速率。 第二台计算机中的程序执行时间通过一种独特的多精度计算方法来减少,该方法需要为每个计算的变量执行一个进位触发器和一个用于消除的字段的符号触发器。 用于两组内插点数据的存储器地址解码在每个序列之后被不可见地交换到计算机。 索引寄存器对计算机不可见的多个电动机驱动器进行数据存储器地址解码,并选择到适当的电动机驱动器的输出。 第二台计算机包括一个手动模式程序,用手动感应的速度矢量来计算驾驶员指令信号的顺序。 定时装置中的相位锁定环可以根据误差信号可控地将迭代速率降低到零。