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1. 发明授权

US07786015B2 Method for fabricating self-aligned complementary pillar structures and wiring 有权
标题翻译：自对准互补柱结构和布线的制造方法
公开(公告)号：US07786015B2
公开(公告)日：2010-08-31
申请号：US12149151
申请日：2008-04-28
申请人： Yung-Tin Chen , Chun-Ming Wang , Steven J. Radigan , Christopher J. Petti , Steven Maxwell
发明人： Yung-Tin Chen , Chun-Ming Wang , Steven J. Radigan , Christopher J. Petti , Steven Maxwell
IPC分类号： H01L21/311
CPC分类号： H01L21/0337 , H01L21/0338 , H01L21/3086 , H01L21/3088 , H01L21/31144 , H01L21/32139 , H01L27/1021
摘要： A method of making a semiconductor device includes forming at least one device layer over a substrate, forming at least two spaced apart features over the at least one device layer, forming sidewall spacers on the at least two features, selectively removing the spaced apart features, filling a space between a first sidewall spacer and a second sidewall spacer with a filler feature, selectively removing the sidewall spacers to leave a plurality of the filler features spaced apart from each other, and etching the at least one device layer using the filler feature as a mask.
摘要翻译：制造半导体器件的方法包括在衬底上形成至少一个器件层，在所述至少一个器件层上形成至少两个间隔的特征，在所述至少两个特征上形成侧壁间隔物，选择性地去除间隔开的特征，用填料特征填充第一侧壁间隔物和第二侧壁间隔物之间的空间，选择性地去除侧壁间隔物以留下彼此间隔开的多个填料特征，并使用填料特征来蚀刻至少一个器件层，如一个面具

2. 发明申请

US20090269932A1 Method for fabricating self-aligned complimentary pillar structures and wiring 有权
标题翻译：自对准互补柱结构和布线的制造方法
公开(公告)号：US20090269932A1
公开(公告)日：2009-10-29
申请号：US12149151
申请日：2008-04-28
申请人： Yung-Tin Chen , Chun-Ming Wang , Steven J. Radigan , Christopher J. Petti , Steven Maxwell
发明人： Yung-Tin Chen , Chun-Ming Wang , Steven J. Radigan , Christopher J. Petti , Steven Maxwell
IPC分类号： H01L21/311
CPC分类号： H01L21/0337 , H01L21/0338 , H01L21/3086 , H01L21/3088 , H01L21/31144 , H01L21/32139 , H01L27/1021
摘要： A method of making a semiconductor device includes forming at least one device layer over a substrate, forming at least two spaced apart features over the at least one device layer, forming sidewall spacers on the at least two features, selectively removing the spaced apart features, filling a space between a first sidewall spacer and a second sidewall spacer with a filler feature, selectively removing the sidewall spacers to leave a plurality of the filler features spaced apart from each other, and etching the at least one device layer using the filler feature as a mask.
摘要翻译：制造半导体器件的方法包括在衬底上形成至少一个器件层，在所述至少一个器件层上形成至少两个间隔的特征，在所述至少两个特征上形成侧壁间隔物，选择性地去除间隔开的特征，用填料特征填充第一侧壁间隔物和第二侧壁间隔物之间的空间，选择性地去除侧壁间隔物以留下彼此间隔开的多个填料特征，并使用填料特征来蚀刻至少一个器件层，如一个面具

3. 发明授权

US07982273B2 Masking of repeated overlay and alignment marks to allow reuse of photomasks in a vertical structure 有权
标题翻译：掩盖重复的覆盖和对准标记，以允许在垂直结构中重复使用光掩模
公开(公告)号：US07982273B2
公开(公告)日：2011-07-19
申请号：US12470886
申请日：2009-05-22
申请人： Yung-Tin Chen , Christopher J. Petti , Steven J. Radigan , Tanmay Kumar
发明人： Yung-Tin Chen , Christopher J. Petti , Steven J. Radigan , Tanmay Kumar
IPC分类号： H01L29/76
CPC分类号： H01L27/0688 , G03F7/70633 , G03F9/7084 , H01L23/544 , H01L2223/5442 , H01L2223/54426 , H01L2223/5446
摘要： A monolithic three dimensional semiconductor device structure includes a first layer including a first occurrence of a first reference mark at a first location, and a second layer including a second occurrence of the first reference mark at a second location, wherein the second location is substantially directly above the first location. The device structure also includes an intermediate layer between the first layer and the second layer, the intermediate layer including a blocking structure, wherein the blocking structure is vertically interposed between the first occurrence of the first reference mark and the second occurrence of the first reference mark. Other aspects are also described.
摘要翻译：单片三维半导体器件结构包括第一层，其包括在第一位置处的第一参考标记的第一次出现，以及包括在第二位置处的第二参考标记的第二次出现的第二层，其中第二位置基本上直接在第一个位置以上。所述器件结构还包括在所述第一层和所述第二层之间的中间层，所述中间层包括阻挡结构，其中所述阻挡结构垂直插入所述第一参考标记的第一次出现和所述第一参考标记的第二次出现之间。还描述了其他方面。

4. 发明申请

US20090230571A1 MASKING OF REPEATED OVERLAY AND ALIGNMENT MARKS TO ALLOW REUSE OF PHOTOMASKS IN A VERTICAL STRUCTURE 有权
标题翻译：重复覆盖和对准标记的掩蔽以允许在垂直结构中重新使用光刻胶
公开(公告)号：US20090230571A1
公开(公告)日：2009-09-17
申请号：US12470886
申请日：2009-05-22
申请人： Yung-Tin Chen , Christopher J. Petti , Steven J. Radigan , Tanmay Kumar
发明人： Yung-Tin Chen , Christopher J. Petti , Steven J. Radigan , Tanmay Kumar
IPC分类号： H01L23/544 , G03F7/20
CPC分类号： H01L27/0688 , G03F7/70633 , G03F9/7084 , H01L23/544 , H01L2223/5442 , H01L2223/54426 , H01L2223/5446
摘要： A monolithic three dimensional semiconductor device structure includes a first layer including a first occurrence of a first reference mark at a first location, and a second layer including a second occurrence of the first reference mark at a second location, wherein the second location is substantially directly above the first location. The device structure also includes an intermediate layer between the first layer and the second layer, the intermediate layer including a blocking structure, wherein the blocking structure is vertically interposed between the first occurrence of the first reference mark and the second occurrence of the first reference mark. Other aspects are also described.
摘要翻译：单片三维半导体器件结构包括第一层，其包括在第一位置处的第一参考标记的第一次出现，以及包括在第二位置处的第二参考标记的第二次出现的第二层，其中第二位置基本上直接在第一个位置以上。所述器件结构还包括在所述第一层和所述第二层之间的中间层，所述中间层包括阻挡结构，其中所述阻挡结构垂直插入在所述第一参考标记的第一次出现和所述第一参考标记的第二次出现之间。还描述了其他方面。

5. 发明授权

US08080443B2 Method of making pillars using photoresist spacer mask 有权
标题翻译：使用光刻胶掩模掩模制作柱的方法
公开(公告)号：US08080443B2
公开(公告)日：2011-12-20
申请号：US12289396
申请日：2008-10-27
申请人： Yung-Tin Chen , Chun-Ming Wang , Steven J. Radigan
发明人： Yung-Tin Chen , Chun-Ming Wang , Steven J. Radigan
IPC分类号： H01L21/44
CPC分类号： H01L21/0337
摘要： A method of making a device includes forming a first hard mask layer over an underlying layer, forming first features over the first hard mask layer, forming a first spacer layer over the first features, etching the first spacer layer to form a first spacer pattern and to expose top of the first features, removing the first features, patterning the first hard mask using the first spacer pattern as a mask to form first hard mask features, removing the first spacer pattern. The method also includes forming second features over the first hard mask features, forming a second spacer layer over the second features, etching the second spacer layer to form a second spacer pattern and to expose top of the second features, removing the second features, etching the first hard mask features using the second spacer pattern as a mask to form second hard mask features, and etching at least part of the underlying layer using the second hard mask features as a mask.
摘要翻译：制造器件的方法包括在下层上形成第一硬掩模层，在第一硬掩模层上形成第一特征，在第一特征上形成第一间隔层，蚀刻第一间隔层以形成第一间隔图案，为了暴露第一特征的顶部，去除第一特征，使用第一间隔图案作为掩模来图案化第一硬掩模以形成第一硬掩模特征，去除第一间隔图案。该方法还包括在第一硬掩模特征上形成第二特征，在第二特征上形成第二间隔层，蚀刻第二间隔层以形成第二间隔图案并暴露第二特征的顶部，去除第二特征，蚀刻第一硬掩模使用第二间隔图案作为掩模形成第二硬掩模特征，并且使用第二硬掩模特征作为掩模蚀刻至少部分下层。

6. 发明申请

US20100105210A1 Method of making pillars using photoresist spacer mask 有权
标题翻译：使用光刻胶掩模掩模制作柱的方法
公开(公告)号：US20100105210A1
公开(公告)日：2010-04-29
申请号：US12289396
申请日：2008-10-27
申请人： Yung-Tin Chen , Chun-Ming Wang , Steven J. Radigan
发明人： Yung-Tin Chen , Chun-Ming Wang , Steven J. Radigan
IPC分类号： H01L21/311
CPC分类号： H01L21/0337
摘要： A method of making a device includes forming a first hard mask layer over an underlying layer, forming first features over the first hard mask layer, forming a first spacer layer over the first features, etching the first spacer layer to form a first spacer pattern and to expose top of the first features, removing the first features, patterning the first hard mask using the first spacer pattern as a mask to form first hard mask features, removing the first spacer pattern. The method also includes forming second features over the first hard mask features, forming a second spacer layer over the second features, etching the second spacer layer to form a second spacer pattern and to expose top of the second features, removing the second features, etching the first hard mask features using the second spacer pattern as a mask to form second hard mask features, and etching at least part of the underlying layer using the second hard mask features as a mask.
摘要翻译：制造器件的方法包括在下层上形成第一硬掩模层，在第一硬掩模层上形成第一特征，在第一特征上形成第一间隔层，蚀刻第一间隔层以形成第一间隔图案，为了暴露第一特征的顶部，去除第一特征，使用第一间隔图案作为掩模来图案化第一硬掩模以形成第一硬掩模特征，去除第一间隔图案。该方法还包括在第一硬掩模特征上形成第二特征，在第二特征上形成第二间隔层，蚀刻第二间隔层以形成第二间隔图案并暴露第二特征的顶部，去除第二特征，蚀刻第一硬掩模使用第二间隔图案作为掩模形成第二硬掩模特征，并且使用第二硬掩模特征作为掩模蚀刻至少部分下层。

7. 发明授权

US08329512B2 Patterning method for high density pillar structures 有权
标题翻译：高密度柱结构图案化方法
公开(公告)号：US08329512B2
公开(公告)日：2012-12-11
申请号：US13463260
申请日：2012-05-03
申请人： Natalie Nguyen , Paul Wai Kie Poon , Steven J. Radigan , Michael Konevecki , Yung-Tin Chen , Raghuveer Makala , Vance Dunton
发明人： Natalie Nguyen , Paul Wai Kie Poon , Steven J. Radigan , Michael Konevecki , Yung-Tin Chen , Raghuveer Makala , Vance Dunton
IPC分类号： H01L21/82
CPC分类号： H01L21/0274 , H01L21/0337 , H01L27/1021 , Y10S438/947 , Y10S438/948 , Y10S438/949
摘要： A method of making a device includes forming a first photoresist layer over a sacrificial layer, patterning the first photoresist layer to form first photoresist features, rendering the first photoresist features insoluble to a solvent, forming a second photoresist layer over the first photoresist features, patterning the second photoresist layer to form second photoresist features, forming a spacer layer over the first and second photoresist features, etching the spacer layer to form spacer features and to expose the first and second photoresist features, forming third photoresist features between the spacer features, removing the spacer features, and patterning the sacrificial layer using the first, second and third photoresist features as a mask to form sacrificial features.
摘要翻译：制造器件的方法包括在牺牲层上形成第一光致抗蚀剂层，图案化第一光致抗蚀剂层以形成第一光致抗蚀剂特征，使得第一光致抗蚀剂特征不溶于溶剂，在第一光致抗蚀剂特征上形成第二光致抗蚀剂层，第二光致抗蚀剂层以形成第二光致抗蚀剂特征，在第一和第二光致抗蚀剂特征上形成间隔层，蚀刻间隔层以形成间隔物特征并暴露第一和第二光致抗蚀剂特征，在间隔物特征之间形成第三光致抗蚀剂特征，去除间隔物特征，并且使用第一，第二和第三光致抗蚀剂特征作为掩模来图案化牺牲层以形成牺牲特征。

8. 发明申请

US20100243602A1 IMAGING POST STRUCTURES USING X AND Y DIPOLE OPTICS AND A SINGLE MASK 有权
标题翻译：使用X和Y DIPOLE OPTICS和单个掩模成像后结构
公开(公告)号：US20100243602A1
公开(公告)日：2010-09-30
申请号：US12796449
申请日：2010-06-08
申请人： Yung-Tin Chen , Steven J. Radigan , Paul Poon , Michael W. Konevecki
发明人： Yung-Tin Chen , Steven J. Radigan , Paul Poon , Michael W. Konevecki
IPC分类号： C23F1/00
CPC分类号： G03F7/70466 , G03F1/00 , G03F7/70425
摘要： A photolithographic method uses different exposure patterns. In one aspect, a photo-sensitive layer on a substrate is subject to a first exposure using optics having a first exposure pattern, such as an x-dipole pattern, followed by exposure using optics having a second exposure pattern, such as a y-dipole pattern, via the same mask, and with the photo-sensitive layer fixed relative to the mask. A 2-D post pattern with a pitch of approximately 70-150 nm may be formed in a layer beneath the photo-sensitive layer using 157-193 nm UV light, and hyper-numerical aperture optics, in one approach. In another aspect, hard baking is performed after both of the first and second exposures to erase a memory effect of photoresist after the first exposure. In another aspect, etching of a hard mask beneath the photo-sensitive layer is performed after both of the first and second exposures.
摘要翻译：光刻方法使用不同的曝光模式。在一个方面，使用具有第一曝光图案（例如x-偶极图案）的光学器件，然后使用具有第二曝光图案的光学元件例如y型曝光，使用基板上的感光层进行第一次曝光，偶极图案，通过相同的掩模，并且光敏层相对于掩模固定。在一种方法中，可以使用157-193nm UV光和超数值孔径光学器件在光敏层下方的层中形成具有约70-150nm间距的2-D柱状图案。另一方面，在第一曝光和第二次曝光之后进行硬烘烤，以擦除在第一次曝光之后光致抗蚀剂的记忆效应。在另一方面，在第一和第二次曝光之后进行光敏层下面的硬掩模的蚀刻。

9. 发明申请

US20100193916A1 METHODS FOR INCREASED ARRAY FEATURE DENSITY 有权
标题翻译：增加阵列特征密度的方法
公开(公告)号：US20100193916A1
公开(公告)日：2010-08-05
申请号：US12754602
申请日：2010-04-05
申请人： Huiwen Xu , Yung-Tin Chen , Steven J. Radigan
发明人： Huiwen Xu , Yung-Tin Chen , Steven J. Radigan
IPC分类号： H01L27/10 , H01L21/308
CPC分类号： H01L21/3088 , H01L21/0337 , H01L21/0338 , H01L27/101 , H01L27/1021
摘要： The embodiments generally relate to methods of making semiconductor devices, and more particularly, to methods for making semiconductor pillar structures and increasing array feature pattern density using selective or directional gap fill. The technique has application to a variety of materials and can be applied to making monolithic two or three-dimensional memory arrays.
摘要翻译：实施例通常涉及制造半导体器件的方法，更具体地，涉及制造半导体柱结构的方法以及使用选择性或方向性间隙填充来增加阵列特征图案密度。该技术可应用于各种材料，可应用于制作单片二维或三维存储阵列。

10. 发明申请

US20100167520A1 Resist feature and removable spacer pitch doubling patterning method for pillar structures 有权
标题翻译：支柱结构的抗蚀特征和可移除的间隔物间距倍增图案化方法
公开(公告)号：US20100167520A1
公开(公告)日：2010-07-01
申请号：US12318609
申请日：2008-12-31
申请人： Yung-Tin Chen , Steven J. Radigan
发明人： Yung-Tin Chen , Steven J. Radigan
IPC分类号： H01L21/28 , H01L21/308
CPC分类号： H01L45/1691 , H01L21/0337 , H01L21/0338 , H01L27/1021
摘要： A method of making a semiconductor device includes forming at least one layer over a substrate, forming at least two spaced apart features of imagable material over the at least one layer, forming sidewall spacers on the at least two features and filling a space between a first sidewall spacer on a first feature and a second sidewall spacer on a second feature with a filler feature. The method also includes selectively removing the sidewall spacers to leave the first feature, the filler feature and the second feature spaced apart from each other, and etching the at least one layer using the first feature, the filler feature and the second feature as a mask.
摘要翻译：制造半导体器件的方法包括在衬底上形成至少一个层，在所述至少一个层上形成可成像材料的至少两个间隔的特征，在所述至少两个特征上形成侧壁间隔物，并填充第一第一特征上的侧壁间隔物和具有填充物特征的第二特征上的第二侧壁间隔物。该方法还包括选择性地去除侧壁间隔物以留下第一特征，填料特征和第二特征彼此间隔开，并且使用第一特征，填充物特征和第二特征作为掩模蚀刻至少一个层。

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