专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08080443B2 Method of making pillars using photoresist spacer mask 有权
标题翻译：使用光刻胶掩模掩模制作柱的方法
公开(公告)号：US08080443B2
公开(公告)日：2011-12-20
申请号：US12289396
申请日：2008-10-27
申请人： Yung-Tin Chen , Chun-Ming Wang , Steven J. Radigan
发明人： Yung-Tin Chen , Chun-Ming Wang , Steven J. Radigan
IPC分类号： H01L21/44
CPC分类号： H01L21/0337
摘要： A method of making a device includes forming a first hard mask layer over an underlying layer, forming first features over the first hard mask layer, forming a first spacer layer over the first features, etching the first spacer layer to form a first spacer pattern and to expose top of the first features, removing the first features, patterning the first hard mask using the first spacer pattern as a mask to form first hard mask features, removing the first spacer pattern. The method also includes forming second features over the first hard mask features, forming a second spacer layer over the second features, etching the second spacer layer to form a second spacer pattern and to expose top of the second features, removing the second features, etching the first hard mask features using the second spacer pattern as a mask to form second hard mask features, and etching at least part of the underlying layer using the second hard mask features as a mask.
摘要翻译：制造器件的方法包括在下层上形成第一硬掩模层，在第一硬掩模层上形成第一特征，在第一特征上形成第一间隔层，蚀刻第一间隔层以形成第一间隔图案，为了暴露第一特征的顶部，去除第一特征，使用第一间隔图案作为掩模来图案化第一硬掩模以形成第一硬掩模特征，去除第一间隔图案。该方法还包括在第一硬掩模特征上形成第二特征，在第二特征上形成第二间隔层，蚀刻第二间隔层以形成第二间隔图案并暴露第二特征的顶部，去除第二特征，蚀刻第一硬掩模使用第二间隔图案作为掩模形成第二硬掩模特征，并且使用第二硬掩模特征作为掩模蚀刻至少部分下层。

2. 发明授权

US07786015B2 Method for fabricating self-aligned complementary pillar structures and wiring 有权
标题翻译：自对准互补柱结构和布线的制造方法
公开(公告)号：US07786015B2
公开(公告)日：2010-08-31
申请号：US12149151
申请日：2008-04-28
申请人： Yung-Tin Chen , Chun-Ming Wang , Steven J. Radigan , Christopher J. Petti , Steven Maxwell
发明人： Yung-Tin Chen , Chun-Ming Wang , Steven J. Radigan , Christopher J. Petti , Steven Maxwell
IPC分类号： H01L21/311
CPC分类号： H01L21/0337 , H01L21/0338 , H01L21/3086 , H01L21/3088 , H01L21/31144 , H01L21/32139 , H01L27/1021
摘要： A method of making a semiconductor device includes forming at least one device layer over a substrate, forming at least two spaced apart features over the at least one device layer, forming sidewall spacers on the at least two features, selectively removing the spaced apart features, filling a space between a first sidewall spacer and a second sidewall spacer with a filler feature, selectively removing the sidewall spacers to leave a plurality of the filler features spaced apart from each other, and etching the at least one device layer using the filler feature as a mask.
摘要翻译：制造半导体器件的方法包括在衬底上形成至少一个器件层，在所述至少一个器件层上形成至少两个间隔的特征，在所述至少两个特征上形成侧壁间隔物，选择性地去除间隔开的特征，用填料特征填充第一侧壁间隔物和第二侧壁间隔物之间的空间，选择性地去除侧壁间隔物以留下彼此间隔开的多个填料特征，并使用填料特征来蚀刻至少一个器件层，如一个面具

3. 发明申请

US20090269932A1 Method for fabricating self-aligned complimentary pillar structures and wiring 有权
标题翻译：自对准互补柱结构和布线的制造方法
公开(公告)号：US20090269932A1
公开(公告)日：2009-10-29
申请号：US12149151
申请日：2008-04-28
申请人： Yung-Tin Chen , Chun-Ming Wang , Steven J. Radigan , Christopher J. Petti , Steven Maxwell
发明人： Yung-Tin Chen , Chun-Ming Wang , Steven J. Radigan , Christopher J. Petti , Steven Maxwell
IPC分类号： H01L21/311
CPC分类号： H01L21/0337 , H01L21/0338 , H01L21/3086 , H01L21/3088 , H01L21/31144 , H01L21/32139 , H01L27/1021
摘要： A method of making a semiconductor device includes forming at least one device layer over a substrate, forming at least two spaced apart features over the at least one device layer, forming sidewall spacers on the at least two features, selectively removing the spaced apart features, filling a space between a first sidewall spacer and a second sidewall spacer with a filler feature, selectively removing the sidewall spacers to leave a plurality of the filler features spaced apart from each other, and etching the at least one device layer using the filler feature as a mask.
摘要翻译：制造半导体器件的方法包括在衬底上形成至少一个器件层，在所述至少一个器件层上形成至少两个间隔的特征，在所述至少两个特征上形成侧壁间隔物，选择性地去除间隔开的特征，用填料特征填充第一侧壁间隔物和第二侧壁间隔物之间的空间，选择性地去除侧壁间隔物以留下彼此间隔开的多个填料特征，并使用填料特征来蚀刻至少一个器件层，如一个面具

4. 发明申请

US20100105210A1 Method of making pillars using photoresist spacer mask 有权
标题翻译：使用光刻胶掩模掩模制作柱的方法
公开(公告)号：US20100105210A1
公开(公告)日：2010-04-29
申请号：US12289396
申请日：2008-10-27
申请人： Yung-Tin Chen , Chun-Ming Wang , Steven J. Radigan
发明人： Yung-Tin Chen , Chun-Ming Wang , Steven J. Radigan
IPC分类号： H01L21/311
CPC分类号： H01L21/0337
摘要： A method of making a device includes forming a first hard mask layer over an underlying layer, forming first features over the first hard mask layer, forming a first spacer layer over the first features, etching the first spacer layer to form a first spacer pattern and to expose top of the first features, removing the first features, patterning the first hard mask using the first spacer pattern as a mask to form first hard mask features, removing the first spacer pattern. The method also includes forming second features over the first hard mask features, forming a second spacer layer over the second features, etching the second spacer layer to form a second spacer pattern and to expose top of the second features, removing the second features, etching the first hard mask features using the second spacer pattern as a mask to form second hard mask features, and etching at least part of the underlying layer using the second hard mask features as a mask.
摘要翻译：制造器件的方法包括在下层上形成第一硬掩模层，在第一硬掩模层上形成第一特征，在第一特征上形成第一间隔层，蚀刻第一间隔层以形成第一间隔图案，为了暴露第一特征的顶部，去除第一特征，使用第一间隔图案作为掩模来图案化第一硬掩模以形成第一硬掩模特征，去除第一间隔图案。该方法还包括在第一硬掩模特征上形成第二特征，在第二特征上形成第二间隔层，蚀刻第二间隔层以形成第二间隔图案并暴露第二特征的顶部，去除第二特征，蚀刻第一硬掩模使用第二间隔图案作为掩模形成第二硬掩模特征，并且使用第二硬掩模特征作为掩模蚀刻至少部分下层。

5. 发明授权

US07846756B2 Nanoimprint enhanced resist spacer patterning method 有权
标题翻译：纳米压印增强型抗蚀剂间隔图案化方法
公开(公告)号：US07846756B2
公开(公告)日：2010-12-07
申请号：US12318590
申请日：2008-12-31
申请人： Bing K. Yen , Chun-Ming Wang , Yung-Tin Chen , Steven Maxwell
发明人： Bing K. Yen , Chun-Ming Wang , Yung-Tin Chen , Steven Maxwell
IPC分类号： H01L21/00
CPC分类号： H01L21/32139 , H01L21/0337 , H01L21/3086 , H01L27/101 , H01L27/1021
摘要： A method of making a device is disclosed including: forming a first hard mask layer over an underlying layer; forming a first imprint resist layer over the underlying layer; forming first features over the first hard mask layer by bringing a first imprint template in contact with the first imprint resist layer; forming a first spacer layer over the first features; etching the first spacer layer to form a first spacer pattern and to expose top of the first features; removing the first features; patterning the first hard mask, using the first spacer pattern as a mask, to form first hard mask features; and etching at least part of the underlying layer using the first hard mask features as a mask.
摘要翻译：公开了一种制造器件的方法，包括：在下层上形成第一硬掩模层; 在所述下层上形成第一印记抗蚀剂层; 通过使第一印模模板与第一印模抗蚀剂层接触而在第一硬掩模层上形成第一特征; 在所述第一特征上形成第一间隔层; 蚀刻第一间隔层以形成第一间隔图案并暴露第一特征的顶部; 去除第一个特征; 使用第一间隔图案作为掩模来图案化第一硬掩模以形成第一硬掩模特征; 并使用第一硬掩模特征作为掩模蚀刻至少部分下层。

6. 发明申请

US20090321789A1 Triangle two dimensional complementary patterning of pillars 有权
标题翻译：支柱三角形二维互补图案化
公开(公告)号：US20090321789A1
公开(公告)日：2009-12-31
申请号：US12216109
申请日：2008-06-30
申请人： Chun-Ming Wang , Yung-Tin Chen , Roy E. Scheuerlein
发明人： Chun-Ming Wang , Yung-Tin Chen , Roy E. Scheuerlein
IPC分类号： H01L21/822 , H01L27/10
CPC分类号： H01L27/101 , H01L21/0337 , H01L21/0338 , H01L21/3086 , H01L21/3088 , H01L21/32139 , H01L27/1021 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/06 , H01L45/085 , H01L45/1233 , H01L45/146 , H01L45/147 , H01L45/16
摘要： A method of making a semiconductor device includes forming at least one device layer over a substrate, forming a plurality of spaced apart first features over the device layer, where each three adjacent first features form an equilateral triangle, forming sidewall spacers on the first features, filling a space between the sidewall spacers with a plurality of filler features, selectively removing the sidewall spacers, and etching the at least one device layer using at least the plurality of filler features as a mask. A device contains a plurality of bottom electrodes located over a substrate, a plurality of spaced apart pillars over the plurality of bottom electrodes, and a plurality of upper electrodes contacting the plurality of pillars. Each three adjacent pillars form an equilateral triangle, and each pillar comprises a semiconductor device. The plurality of pillars include a plurality of first pillars having a first shape and a plurality of second pillars having a second shape different from the first shape.
摘要翻译：制造半导体器件的方法包括在衬底上形成至少一个器件层，在器件层上形成多个间隔开的第一特征，其中每三个相邻的第一特征形成等边三角形，在第一特征上形成侧壁间隔物，用多个填料特征填充侧壁间隔件之间的空间，选择性地去除侧壁间隔物，以及使用至少多个填料特征作为掩模蚀刻至少一个器件层。一种器件包含位于衬底上方的多个底部电极，多个底部电极上的多个间隔开的支柱以及与多个支柱接触的多个上部电极。每三个相邻的柱形成等边三角形，每个柱包括半导体器件。多个支柱包括具有第一形状的多个第一支柱和具有不同于第一形状的第二形状的多个第二支柱。

7. 发明授权

US08076056B2 Method of making sub-resolution pillar structures using undercutting technique 有权
标题翻译：使用底切技术制作分辨率柱状结构的方法
公开(公告)号：US08076056B2
公开(公告)日：2011-12-13
申请号：US12285466
申请日：2008-10-06
申请人： Chun-Ming Wang , Steven Maxwell , Paul Wai Kie Poon , Yung-Tin Chen
发明人： Chun-Ming Wang , Steven Maxwell , Paul Wai Kie Poon , Yung-Tin Chen
IPC分类号： G03F7/26
CPC分类号： H01L21/0334 , H01L21/0338
摘要： A method of making a device includes forming an underlying mask layer over an underlying layer, forming a first mask layer over the underlying mask layer, patterning the first mask layer to form first mask features, undercutting the underlying mask layer to form underlying mask features using the first mask features as a mask, removing the first mask features, and patterning the underlying layer using at least the underlying mask features as a mask.
摘要翻译：一种制造器件的方法包括在下面的层上形成下面的掩模层，在下面的掩模层之上形成第一掩模层，对第一掩模层进行图案化以形成第一掩模特征，利用下面的掩模层来切割下面的掩模特征，使用第一掩模作为掩模，去除第一掩模特征，并使用至少底层掩模特征作为掩模来图案化底层。

8. 发明申请

US20100167502A1 Nanoimprint enhanced resist spacer patterning method 有权
公开(公告)号：US20100167502A1
公开(公告)日：2010-07-01
申请号：US12318590
申请日：2008-12-31
申请人： Bing K. Yen , Chun-Ming Wang , Yung-Tin Chen , Steven Maxwell
发明人： Bing K. Yen , Chun-Ming Wang , Yung-Tin Chen , Steven Maxwell
IPC分类号： H01L21/36 , H01L21/467
CPC分类号： H01L21/32139 , H01L21/0337 , H01L21/3086 , H01L27/101 , H01L27/1021
摘要： A method of making a device is disclosed including: forming a first hard mask layer over an underlying layer; forming a first imprint resist layer over the underlying layer; forming first features over the first hard mask layer by bringing a first imprint template in contact with the first imprint resist layer; forming a first spacer layer over the first features; etching the first spacer layer to form a first spacer pattern and to expose top of the first features; removing the first features; patterning the first hard mask, using the first spacer pattern as a mask, to form first hard mask features; and etching at least part of the underlying layer using the first hard mask features as a mask.

9. 发明授权

US07781269B2 Triangle two dimensional complementary patterning of pillars 有权
标题翻译：支柱三角形二维互补图案化
公开(公告)号：US07781269B2
公开(公告)日：2010-08-24
申请号：US12216109
申请日：2008-06-30
申请人： Chun-Ming Wang , Yung-Tin Chen , Roy E. Scheuerlein
发明人： Chun-Ming Wang , Yung-Tin Chen , Roy E. Scheuerlein
IPC分类号： H01L21/82
CPC分类号： H01L27/101 , H01L21/0337 , H01L21/0338 , H01L21/3086 , H01L21/3088 , H01L21/32139 , H01L27/1021 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/06 , H01L45/085 , H01L45/1233 , H01L45/146 , H01L45/147 , H01L45/16
摘要： A method of making a semiconductor device includes forming at least one device layer over a substrate, forming a plurality of spaced apart first features over the device layer, where each three adjacent first features form an equilateral triangle, forming sidewall spacers on the first features, filling a space between the sidewall spacers with a plurality of filler features, selectively removing the sidewall spacers, and etching the at least one device layer using at least the plurality of filler features as a mask. A device contains a plurality of bottom electrodes located over a substrate, a plurality of spaced apart pillars over the plurality of bottom electrodes, and a plurality of upper electrodes contacting the plurality of pillars. Each three adjacent pillars form an equilateral triangle, and each pillar comprises a semiconductor device. The plurality of pillars include a plurality of first pillars having a first shape and a plurality of second pillars having a second shape different from the first shape.
摘要翻译：制造半导体器件的方法包括在衬底上形成至少一个器件层，在器件层上形成多个间隔开的第一特征，其中每三个相邻的第一特征形成等边三角形，在第一特征上形成侧壁间隔物，用多个填料特征填充侧壁间隔件之间的空间，选择性地去除侧壁间隔物，以及使用至少多个填料特征作为掩模蚀刻至少一个器件层。一种器件包含位于衬底上方的多个底部电极，多个底部电极上的多个间隔开的支柱以及与多个支柱接触的多个上部电极。每三个相邻的柱形成等边三角形，每个柱包括半导体器件。多个支柱包括具有第一形状的多个第一支柱和具有不同于第一形状的第二形状的多个第二支柱。

10. 发明申请

US20110229805A1 PHOTOMASK WITH ASSIST FEATURES 有权
标题翻译：照片特点
公开(公告)号：US20110229805A1
公开(公告)日：2011-09-22
申请号：US12729088
申请日：2010-03-22
申请人： Chun-Ming Wang , Chen-Che Huang , Masaaki Higashitani
发明人： Chun-Ming Wang , Chen-Che Huang , Masaaki Higashitani
IPC分类号： G03F1/00 , H01L21/027
CPC分类号： G03F1/36
摘要： A photomask for exposure of a semiconductor wafer using dipole illumination and method of manufacturing the same is disclosed. A method of forming a pattern on a semiconductor using the photomask is also disclosed. The photomask may have an array of islands that are used for printing lines using dipole illumination. The photomask may have sub-resolution assist features (SRAF) to assist in printing the lines. The SRAF may include an array of holes.
摘要翻译：公开了一种用于使用偶极照明曝光半导体晶片的光掩模及其制造方法。还公开了使用光掩模在半导体上形成图案的方法。光掩模可以具有用于使用偶极照明打印线的岛阵列。光掩模可以具有辅助分辨率辅助特征（SRAF）以帮助印刷线。 SRAF可以包括一组孔。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式