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    • 3. 发明授权
    • Thermionic generator
    • 热电发生器
    • US09000652B2
    • 2015-04-07
    • US13467212
    • 2012-05-09
    • Yuji KimuraMitsuhiro KataokaSusumu Sobue
    • Yuji KimuraMitsuhiro KataokaSusumu Sobue
    • H02N3/00H01J45/00
    • H01J45/00
    • A thermionic generator for converting thermal energy to electric energy includes: an emitter electrode for emitting thermal electrons from a thermal electron emitting surface when heat is applied to the emitter electrode; a collector electrode facing the emitter electrode spaced apart from the emitter electrode by a predetermined distance, and receiving the thermal electrons from the emitter electrode via a facing surface of the collector electrode; and a substrate having one surface. The emitter electrode and the collector electrode are disposed on the one surface of the substrate, and are electrically insulated from each other. The thermal electron emitting surface and the facing surface are perpendicular to the one surface.
    • 一种用于将热能转换成电能的热电子发生器包括:发射极,用于当热量施加到发射极时从热电子发射表面发射热电子; 一个面对发射极的集电极,与发射极隔开预定的距离,并经集电极的相对表面从发射电极接收热电子; 和具有一个表面的基底。 发射电极和集电极设置在基板的一个表面上,并且彼此电绝缘。 热电子发射表面和相对表面垂直于一个表面。
    • 4. 发明申请
    • Thermionic converter
    • 热电转换器
    • US20110017253A1
    • 2011-01-27
    • US12805153
    • 2010-07-15
    • Mitsuhiro KataokaYuji KimuraEiichi Okuno
    • Mitsuhiro KataokaYuji KimuraEiichi Okuno
    • H01L35/30
    • H01J45/00
    • A thermionic converter includes an emitter electrode and a collector electrode. The emitter electrode includes a P-type diamond semiconductor layer doped with a P-type impurity. The emitter electrode is configured to emit a thermion from the P-type diamond semiconductor layer when heat is applied from an external power source. The collector electrode includes an N-type diamond semiconductor layer doped with an N-type impurity. The N-type diamond semiconductor layer opposes the P-type diamond semiconductor layer and is located at a predetermined distance from the P-type diamond semiconductor layer. The collector electrode is configured to receive the thermion emitted from the emitter electrode at the N-type diamond semiconductor layer.
    • 热离子转换器包括发射极和集电极。 发射极包括掺杂有P型杂质的P型金刚石半导体层。 发射电极被配置为当从外部电源施加热时从P型金刚石半导体层发射热离子。 集电极包括掺杂有N型杂质的N型金刚石半导体层。 N型金刚石半导体层与P型金刚石半导体层相对,并且位于距离P型金刚石半导体层预定距离处。 集电极配置为接收在N型金刚石半导体层处从发射极发射的热电离。
    • 5. 发明授权
    • Silicon carbide semiconductor device
    • 碳化硅半导体器件
    • US06573534B1
    • 2003-06-03
    • US09265582
    • 1999-03-10
    • Rajesh KumarTsuyoshi YamamotoShoichi OndaMitsuhiro KataokaKunihiko HaraEiichi OkunoJun Kojima
    • Rajesh KumarTsuyoshi YamamotoShoichi OndaMitsuhiro KataokaKunihiko HaraEiichi OkunoJun Kojima
    • H01L310312
    • H01L29/7828H01L29/1095H01L29/1608H01L29/41766H01L29/4236H01L29/66068H01L29/7802H01L29/7838Y10S438/931
    • A semiconductor device, comprising: a semiconductor substrate comprising silicon carbide of a first conductivity type; a silicon carbide epitaxial layer of the first conductivity type; a first semiconductor region formed on the semiconductor substrate and comprising silicon carbide of a second conductivity type; a second semiconductor region formed on the first semiconductor region, comprising silicon carbide of the first conductivity type and separated from the semiconductor substrate of the first conductivity type by the first semiconductor region; a third semiconductor region formed on the semiconductor region, connected to the semiconductor substrate and the second semiconductor region, comprising silicon carbide of the first conductivity type, and of higher resistance than the semiconductor substrate; and a gate electrode formed on the third semiconductor region via an insulating layer; wherein the third semiconductor layer is depleted when no voltage is being applied to the gate electrode so that said semiconductor device has a normally OFF characteristic.
    • 一种半导体器件,包括:包含第一导电类型的碳化硅的半导体衬底; 第一导电类型的碳化硅外延层; 形成在所述半导体衬底上并且包括第二导电类型的碳化硅的第一半导体区域; 形成在所述第一半导体区域上的第二半导体区域,包括所述第一导电类型的碳化硅并且通过所述第一半导体区域与所述第一导电类型的半导体衬底分离; 形成在所述半导体区域上的第三半导体区域,与所述半导体衬底和所述第二半导体区域连接,所述第二半导体区域包括所述第一导电型的碳化硅,并且具有比所述半导体衬底更高的电阻; 以及经由绝缘层形成在所述第三半导体区域上的栅电极; 其中当没有电压施加到所述栅电极时,所述第三半导体层被耗尽,使得所述半导体器件具有正常OFF特性。
    • 7. 发明授权
    • Semiconductor device having a groove with a curved part formed on its
side surface
    • 半导体器件具有在其侧表面上形成有弯曲部分的凹槽
    • US5698880A
    • 1997-12-16
    • US539380
    • 1995-10-05
    • Shigeki TakahashiMitsuhiro KataokaTsuyoshi YamamotoYuuichi TakeuchiNorihito Tokura
    • Shigeki TakahashiMitsuhiro KataokaTsuyoshi YamamotoYuuichi TakeuchiNorihito Tokura
    • H01L21/336H01L29/76H01L29/94H01L31/062H01L31/113
    • Y02E10/50
    • A manufacturing method for a semiconductor device, which can attain a low ion voltage in a manufacturing method for a semiconductor device involving a process for forming a groove by etching prior to selective oxidation, selectively oxidizing a region including the groove and thereby making a channel part of the groove, is disclosed. A groove part is thermally oxidized by using a silicon nitride film as a mask. A LOCOS oxide film is formed by this thermal oxidation, and concurrently a U-groove is formed on the surface of an n.sup.- -type epitaxial layer eroded by the LOCOS oxide film, and the shape of the U-groove is fixed. A curve part formed during a chemical dry etching process remains as a curve part on the side surface of the U-groove. Then, an n.sup.+ -type source layer is formed by means of thermal diffusion to a junction thickness of 0.5 to 1 .mu.m, and a channel is set up as well. The junction depth obtained by this thermal diffusion is set up more deeply than the curve part which is formed during the above etching and remains on the side surface of the U-groove after the above selective thermal oxidation.
    • 一种用于半导体器件的制造方法的半导体器件的制造方法,其包括在选择性氧化之前通过蚀刻形成沟槽的工艺的半导体器件的制造方法,选择性地氧化包括沟槽的区域,从而形成沟道部分 的凹槽。 通过使用氮化硅膜作为掩模将槽部热氧化。 通过该热氧化形成LOCOS氧化物膜,并且在由LOCOS氧化物膜侵蚀的n型外延层的表面上形成U形槽,并且U形槽的形状被固定。 在化学干蚀刻过程中形成的曲线部分在U形槽的侧表面上保持为曲线部分。 然后,通过热扩散形成0.5±1μm的结合厚度的n +型源极层,并且还设置沟道。 通过该热扩散获得的结深度比在上述蚀刻期间形成的曲线部分更深地设置,并且在上述选择性热氧化之后保留在U形槽的侧表面上。