专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07026709B2 Stacked chip-packaging structure 有权
标题翻译：堆叠芯片封装结构
公开(公告)号：US07026709B2
公开(公告)日：2006-04-11
申请号：US10711575
申请日：2004-09-25
申请人： Yu-Fang Tsai , Jung-Kun Kang , Tsung-Yueh Tsai
发明人： Yu-Fang Tsai , Jung-Kun Kang , Tsung-Yueh Tsai
IPC分类号： H01L23/02 , H01L23/34 , H01L29/40 , H01L23/12 , H01L23/29
CPC分类号： H01L24/73 , H01L23/3128 , H01L23/4334 , H01L24/45 , H01L24/48 , H01L25/105 , H01L2224/45144 , H01L2224/48227 , H01L2224/73207 , H01L2224/8592 , H01L2225/1023 , H01L2225/1058 , H01L2225/1088 , H01L2225/1094 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/09701 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/00014 , H01L2924/00
摘要： A stacked chip-packaging structure consisting of a plurality of chip-packaging units is provided. Each of the chip-packaging units includes a substrate, a chip, a plurality of wires, a molding compound, and a plurality of solder balls. The chip-packaging units are, for example, of a BGA structure with high pin count, and are stacked up one over another and electrically connected through solder balls. With such structural features, the space that the stacked chip-packaging structure occupies is reduced and consequently the entire structure can be miniaturized.
摘要翻译：提供由多个芯片封装单元组成的堆叠式芯片封装结构。每个芯片封装单元包括基板，芯片，多根电线，模塑料和多个焊球。芯片封装单元例如是具有高引脚数的BGA结构，并且一个接一个堆叠并通过焊球电连接。利用这种结构特征，堆叠的芯片封装结构占据的空间减小，因此整个结构可以小型化。

2. 发明申请

US20050023657A1 STACKED CHIP-PACKAGING STRUCTURE 有权
标题翻译：堆叠芯片包装结构
公开(公告)号：US20050023657A1
公开(公告)日：2005-02-03
申请号：US10711575
申请日：2004-09-25
申请人： Yu-Fang Tsai , Jung-Kun Kang , Tsung-Yueh Tsai
发明人： Yu-Fang Tsai , Jung-Kun Kang , Tsung-Yueh Tsai
IPC分类号： H01L23/31 , H01L23/433 , H01L25/10 , H01L23/02
CPC分类号： H01L24/73 , H01L23/3128 , H01L23/4334 , H01L24/45 , H01L24/48 , H01L25/105 , H01L2224/45144 , H01L2224/48227 , H01L2224/73207 , H01L2224/8592 , H01L2225/1023 , H01L2225/1058 , H01L2225/1088 , H01L2225/1094 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/09701 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/00014 , H01L2924/00
摘要： A stacked chip-packaging structure consisting of a plurality of chip-packaging units is provided. Each of the chip-packaging units includes a substrate, a chip, a plurality of wires, a molding compound, and a plurality of solder balls. The chip-packaging units are, for example, of a BGA structure with high pin count, and are stacked up one over another and electrically connected through solder balls. With such structural features, the space that the stacked chip-packaging structure occupies is reduced and consequently the entire structure can be miniaturized.
摘要翻译：提供由多个芯片封装单元组成的堆叠式芯片封装结构。每个芯片封装单元包括基板，芯片，多根电线，模塑料和多个焊球。芯片封装单元例如是具有高引脚数的BGA结构，并且一个接一个堆叠并通过焊球电连接。利用这种结构特征，堆叠的芯片封装结构占据的空间减小，因此整个结构可以小型化。

3. 发明授权

US07037750B2 Method for manufacturing a package 有权
标题翻译：制造包装的方法
公开(公告)号：US07037750B2
公开(公告)日：2006-05-02
申请号：US10776490
申请日：2004-02-11
申请人： Yu-Fang Tsai , Chin-Hsien Lin , Tsung-Yueh Tsai
发明人： Yu-Fang Tsai , Chin-Hsien Lin , Tsung-Yueh Tsai
IPC分类号： H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L24/32 , H01L23/13 , H01L23/3128 , H01L23/36 , H01L24/48 , H01L2224/05599 , H01L2224/32188 , H01L2224/32225 , H01L2224/45099 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/85399 , H01L2224/92247 , H01L2924/00014 , H01L2924/01029 , H01L2924/01047 , H01L2924/12042 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/16152 , H01L2924/181 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2924/00012
摘要： A method of manufacturing a package is disclosed. The manufacturing method includes the steps of providing a substrate having an opening, disposing a metal slice on a bottom surface of the substrate to cover the opening and bond pads on the bottom surface of the substrate, disposing a die on the metal slice inside the opening or above the top surface of the substrate outside the opening, forming a number of bond wires between the top surface of the die and the top surface of the substrate to electrically connect the die to the substrate, forming an encapsulating mold compound to cover the die, the bond wires, and a part of the top surface of the substrate, removing a part of the metal slice to form a metal heat slug thermally connected to the die and to expose the bond pads, and forming a number of solder balls on the exposed bond pads.
摘要翻译：公开了制造封装的方法。该制造方法包括以下步骤：提供具有开口的基板，在基板的底表面上设置金属切片以覆盖基板的底表面上的开口和接合焊盘;将金属模设置在开口内的金属切片上或在开口外部的基板的顶表面上方，在模具的顶表面和基板的顶表面之间形成多个接合线，以将模具电连接到基板，形成封装模具化合物以覆盖模具键合线和衬底的顶表面的一部分，去除金属片的一部分以形成热连接到管芯的金属加热片，并露出接合焊盘，并在其上形成多个焊球暴露的焊盘。

4. 发明授权

US08592982B2 Semiconductor package having proximity communication signal input terminals and manufacturing methods thereof 有权
标题翻译：具有接近通信信号输入端子的半导体封装及其制造方法
公开(公告)号：US08592982B2
公开(公告)日：2013-11-26
申请号：US13252850
申请日：2011-10-04
申请人： Yi-Shao Lai , Tsung-Yueh Tsai , Ming-Kun Chen , Tai-Ping Wang , Ming-Hsiang Cheng
发明人： Yi-Shao Lai , Tsung-Yueh Tsai , Ming-Kun Chen , Tai-Ping Wang , Ming-Hsiang Cheng
IPC分类号： H01L23/52 , H01L23/48 , H01L29/40
CPC分类号： H01L23/48 , H01L23/3114 , H01L23/522 , H01L23/552 , H01L24/13 , H01L24/16 , H01L25/0657 , H01L2224/13009 , H01L2224/13099 , H01L2224/16145 , H01L2225/06513 , H01L2225/06531 , H01L2225/06565 , H01L2924/07811 , H01L2924/14 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor package includes a semiconductor structure. The semiconductor structure includes a plurality of dielectric layers and a plurality of conductive interconnects embedded in the semiconductor structure. The semiconductor structure also includes a plurality of proximity communication signal input terminals. At least one of the plurality of proximity communication signal input terminals includes a first electrode and a second electrode. The first electrode and the second electrode are spaced apart so as to be configured to provide proximity communication through capacitive coupling. The first electrode is exposed proximate to a surface of the semiconductor structure.
摘要翻译：半导体封装包括半导体结构。半导体结构包括多个介电层和嵌入在半导体结构中的多个导电互连。半导体结构还包括多个邻近通信信号输入端。多个邻近通信信号输入端中的至少一个包括第一电极和第二电极。间隔开第一电极和第二电极，以便配置成通过电容耦合提供邻近通信。第一电极在半导体结构的表面附近露出。

5. 发明授权

US08253431B2 Apparatus and method for testing non-contact pads of a semiconductor device to be tested 有权
标题翻译：用于测试要测试的半导体器件的非接触焊盘的装置和方法
公开(公告)号：US08253431B2
公开(公告)日：2012-08-28
申请号：US12784121
申请日：2010-05-20
申请人： Yi-Shao Lai , Tsung-Yueh Tsai , Ming-Kun Chen , I. L. Lin , Ken Juang , Ming-Hsiang Cheng
发明人： Yi-Shao Lai , Tsung-Yueh Tsai , Ming-Kun Chen , I. L. Lin , Ken Juang , Ming-Hsiang Cheng
IPC分类号： G01R31/20 , G01R31/00
CPC分类号： G01R1/0483 , G01R1/0466 , G01R31/2886
摘要： The present invention relates to an apparatus and a method for testing non-contact pads of a semiconductor device to be tested. The apparatus includes an insulating body, at least one testing module and a plurality of probes. The insulating body includes an accommodating cavity, a lower opening and at least one side opening. The side opening communicates with the accommodating cavity and the lower opening. The testing module is disposed in the side opening, and each testing module includes a circuit board and an active chip. The active chip is disposed on and electrically connected to the circuit board. The active chip has a plurality of testing pads exposed to the accommodating cavity. The probes are disposed in the lower opening. Whereby, the non-contact pads of the semiconductor device to be tested face but not in physically contact with the testing pads of the active chip, so as to test the proximity communication between the non-contact pads of the semiconductor device and the testing pads of the active chip.
摘要翻译：本发明涉及一种用于测试待测半导体器件的非接触焊盘的装置和方法。该装置包括绝缘体，至少一个测试模块和多个探针。绝缘体包括容纳腔，下开口和至少一个侧开口。侧开口与容纳腔和下开口连通。测试模块设置在侧开口中，每个测试模块包括电路板和有源芯片。有源芯片设置在电路板上并与之电连接。有源芯片具有暴露于容纳腔的多个测试焊盘。探针设置在下开口中。因此，要测试的半导体器件的非接触焊盘面对但不与有源芯片的测试焊盘物理接触，以便测试半导体器件的非接触焊盘与测试焊盘之间的接近连接的有源芯片。

6. 发明授权

US08222726B2 Semiconductor device package having a jumper chip and method of fabricating the same 有权
标题翻译：具有跳线芯片的半导体器件封装及其制造方法
公开(公告)号：US08222726B2
公开(公告)日：2012-07-17
申请号：US12748843
申请日：2010-03-29
申请人： Hsiao-Chuan Chang , Tsung-Yueh Tsai , Yi-Shao Lai , Jiunn Chen , Ming-Hsiang Cheng
发明人： Hsiao-Chuan Chang , Tsung-Yueh Tsai , Yi-Shao Lai , Jiunn Chen , Ming-Hsiang Cheng
IPC分类号： H01L21/50 , H01L23/48 , H01L21/44
CPC分类号： H01L25/0657 , H01L23/13 , H01L23/3121 , H01L23/48 , H01L24/05 , H01L24/17 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L25/0652 , H01L2224/0401 , H01L2224/13099 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/484 , H01L2224/48599 , H01L2224/4899 , H01L2224/49175 , H01L2224/838 , H01L2225/0651 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01033 , H01L2924/014 , H01L2924/0781 , H01L2924/07811 , H01L2924/10253 , H01L2924/15157 , H01L2924/181 , H01L2924/30105 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/85399 , H01L2224/05599
摘要： A semiconductor device package and a method of fabricating the same are provided. The semiconductor device package includes a substrate, a first chip, a jumper chip, a plurality of first bonding wires and a plurality of second bonding wires. The substrate has a plurality of contact pads. The first chip is disposed and electrically connected to the substrate via the first bonding wires. The jumper chip is disposed on the first chip and has a plurality of metal pads. Each of the metal pads is electrically connected to two contact pads of the substrate via two second bonding wires, respectively.
摘要翻译：提供半导体器件封装及其制造方法。半导体器件封装包括衬底，第一芯片，跳线芯片，多个第一接合线和多个第二接合线。衬底具有多个接触焊盘。第一芯片通过第一接合线布置并电连接到基板。跳线芯片设置在第一芯片上并且具有多个金属焊盘。每个金属焊盘分别经由两个第二接合线电连接到衬底的两个接触焊盘。

7. 发明申请

US20100123894A1 LASER DISTANCE-MEASURING APPARATUS AND CONTROL METHODS THEREOF 有权
标题翻译：激光测距装置及其控制方法
公开(公告)号：US20100123894A1
公开(公告)日：2010-05-20
申请号：US12367629
申请日：2009-02-09
申请人： Tsung-Yueh Tsai
发明人： Tsung-Yueh Tsai
IPC分类号： G01C3/08
CPC分类号： G01C15/002 , G01S7/4811 , G01S7/4972
摘要： A distance-measuring apparatus is disclosed. The distance-measuring apparatus includes: an emitter, emitting a light to be measured toward a target, a receiver, receiving a reflected emitted light; a reflector, reflecting the emitted light to the receiver; a condensing lens, condensing the reflected emitted light, reflected by the target to the reflector; a driving module, adjusting the inclination angle of the reflector; and a control unit, controlling the driving module to rotate according to a result of comparing the intensity of the emitted light received by the receiver and a predetermined value.
摘要翻译：公开了一种测距装置。测距装置包括：发射器，朝向目标发射待测光，接收器，接收反射的发射光; 将发射的光反射到接收器的反射器; 聚光透镜，将反射的发射光聚焦，由目标反射到反射器; 驱动模块，调整反射器的倾斜角度; 以及控制单元，根据将接收机接收到的发射光的强度与预定值进行比较的结果来控制驱动模块的旋转。

8. 发明申请

US20090051048A1 Package structure and manufacturing method thereof 审中-公开
标题翻译：包装结构及其制造方法
公开(公告)号：US20090051048A1
公开(公告)日：2009-02-26
申请号：US12222610
申请日：2008-08-13
申请人： Yi-Shao Lai , Tsung-Yueh Tsai , Hsiao-Chuan Chang
发明人： Yi-Shao Lai , Tsung-Yueh Tsai , Hsiao-Chuan Chang
IPC分类号： H01L21/60 , H01L23/48
CPC分类号： H01L24/32 , H01L24/16 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/85 , H01L24/91 , H01L2224/05571 , H01L2224/05573 , H01L2224/13099 , H01L2224/16225 , H01L2224/27013 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73257 , H01L2224/73265 , H01L2224/81136 , H01L2224/81192 , H01L2224/81801 , H01L2224/83051 , H01L2224/85 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/0105 , H01L2924/01082 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/181 , H01L2224/78 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： A package structure and a manufacturing method thereof are provided. The package structure includes a carrier, a chip-bonding structure and a chip. The chip-bonding structure is formed on a first surface of the carrier. The chip-bonding structure includes a cavity, a dam, several via holes and several solder bumps. The solder bumps are received in the via holes and are correspond to the first connecting pads located on the carrier. The chip is embedded in the cavity of the chip-bonding structure. An active surface of the chip is tightly pasted on the first surface of the chip-bonding structure, and the first solder pads form electrical contact with the corresponding solder bumps. The chip of the package structure is precisely disposed on the carrier, not only simplifying the manufacturing process but also forming stable electrical connection between the chip and the carrier of the package structure.
摘要翻译：提供一种封装结构及其制造方法。封装结构包括载体，芯片结合结构和芯片。芯片接合结构形成在载体的第一表面上。芯片结合结构包括空腔，坝，几个通孔和几个焊料凸块。焊料凸块被容纳在通孔中并且对应于位于载体上的第一连接焊盘。芯片嵌入在芯片结合结构的空腔中。芯片的有源表面被牢固地粘贴在芯片接合结构的第一表面上，并且第一焊盘与相应的焊料凸块形成电接触。封装结构的芯片精确地布置在载体上，不仅简化了制造工艺，而且还在封装结构的芯片和载体之间形成稳定的电连接。

9. 发明申请

US20050006756A1 PACKAGE STRUCTURE COMPATIBLE WITH COOLING SYSTEM 有权
标题翻译：包装结构与冷却系统兼容
公开(公告)号：US20050006756A1
公开(公告)日：2005-01-13
申请号：US10711237
申请日：2004-09-03
申请人： Tsung-Yueh Tsai , Sheng-Yang Peng
发明人： Tsung-Yueh Tsai , Sheng-Yang Peng
IPC分类号： H01L23/473 , H01L23/495
CPC分类号： H01L23/473 , H01L2224/45144 , H01L2224/48091 , H01L2224/73265 , H01L2924/09701 , H01L2924/00014 , H01L2924/00
摘要： The present invention relates to a package structure compatible with a cooling system, the package structure comprising a carrier, a chip, a mold compound and a cooling tubule that can be connected to a cooling system. The chip is arranged on the carrier and electrically connected to the carrier, while the mold compound covers the chip and one surface of the carrier. The cooling tubule is disposed either within the mold compound or on an outer surface of the mold compound. The cooling tubule is connected to a cooling tubing of the cooling system and a fluid driven by a pump circulates in the cooling tubing and the cooling tubule for heat dissipation.
摘要翻译：本发明涉及一种与冷却系统兼容的封装结构，该封装结构包括可连接到冷却系统的载体，芯片，模具化合物和冷却小管。芯片布置在载体上并电连接到载体上，而模具化合物覆盖芯片和载体的一个表面。冷却管被设置在模具化合物内或模具化合物的外表面上。冷却管与冷却系统的冷却管连接，由泵驱动的流体在冷却管和冷却管中循环，用于散热。

10. 发明授权

US08368216B2 Semiconductor package 有权
标题翻译：半导体封装
公开(公告)号：US08368216B2
公开(公告)日：2013-02-05
申请号：US12872644
申请日：2010-08-31
申请人： Yi-Shao Lai , Tsung-Yueh Tsai , Ming-Kun Chen , Hsiao-Chuan Chang , Ming-Hsiang Cheng
发明人： Yi-Shao Lai , Tsung-Yueh Tsai , Ming-Kun Chen , Hsiao-Chuan Chang , Ming-Hsiang Cheng
IPC分类号： H01L23/538 , H01L21/60 , H01L23/488
CPC分类号： H01L21/6835 , H01L21/563 , H01L21/568 , H01L23/3114 , H01L24/27 , H01L25/0652 , H01L25/50 , H01L2224/1184 , H01L2224/131 , H01L2224/1329 , H01L2224/16145 , H01L2224/2784 , H01L2224/73104 , H01L2224/73204 , H01L2224/81005 , H01L2224/81801 , H01L2224/8185 , H01L2224/831 , H01L2225/06513 , H01L2924/15311 , H01L2924/15321 , H01L2924/014
摘要： The present invention relates to a semiconductor package having at least one first layer chip, a plurality of first metal bumps, at least one second layer chip and a package body. The first layer chip includes a first active surface upon which the first metal bumps are disposed and a plurality of first signal coupling pads disposed adjacent to the first active surface. The second layer chip is electrically connected to the first layer chip, and includes a second active surface that faces the first active surface and a plurality of second signal coupling pads. The second signal coupling pads are capacitively coupled to the first signal coupling pads so as to provide proximity communication between the first layer chip and the second layer chip. The package body encapsulates the first layer chip, the first metal bumps, and the second layer chip, and the first metal bumps are partially exposed.
摘要翻译：本发明涉及具有至少一个第一层芯片，多个第一金属凸块，至少一个第二层芯片和封装体的半导体封装。第一层芯片包括设置有第一金属凸块的第一有源表面和与第一有源表面相邻设置的多个第一信号耦合焊盘。第二层芯片电连接到第一层芯片，并且包括面向第一有源表面的第二有源表面和多个第二信号耦合焊盘。第二信号耦合焊盘电容耦合到第一信号耦合焊盘，以便提供第一层芯片和第二层芯片之间的接近通信。封装体封装第一层芯片，第一金属凸块和第二层芯片，并且第一金属凸块部分地露出。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式