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1. 发明申请

US20100211931A1 STM WITH GLOBAL VERSION OVERFLOW HANDLING 有权
标题翻译： STM与全球版本的超流量处理
公开(公告)号：US20100211931A1
公开(公告)日：2010-08-19
申请号：US12370742
申请日：2009-02-13
申请人： Yosseff Levanoni , David L. Detlefs , Weirong Zhu , Timothy L. Harris , Michael M. Magruder , Mathew B. Tolton
发明人： Yosseff Levanoni , David L. Detlefs , Weirong Zhu , Timothy L. Harris , Michael M. Magruder , Mathew B. Tolton
IPC分类号： G06F9/44
CPC分类号： G06F9/466 , G06F11/141
摘要： A software transactional memory system is provided with overflow handling. The system includes a global version counter with an epoch number and a version number. The system accesses the global version counter prior to and subsequent to memory accesses of transactions to validate read accesses of the transaction. The system includes mechanisms to detect global version number overflow and may allow some or all transactions to execute to completion subsequent to the global version number overflowing. The system also provides publication, privatization, and granular safety properties.
摘要翻译：软件事务内存系统提供溢出处理。该系统包括具有时代号和版本号的全局版本计数器。系统在事务的内存访问之前和之后访问全局版本计数器，以验证事务的读取访问。该系统包括检测全局版本号溢出的机制，并且可允许一些或所有事务在全球版本号码溢出之后执行完成。该系统还提供出版物，私有化和粒状安全属性。

2. 发明授权

US08627292B2 STM with global version overflow handling 有权
标题翻译： STM与全局版本溢出处理
公开(公告)号：US08627292B2
公开(公告)日：2014-01-07
申请号：US12370742
申请日：2009-02-13
申请人： Yosseff Levanoni , David L. Detlefs , Weirong Zhu , Timothy L. Harris , Michael M. Magruder , Matthew B. Tolton
发明人： Yosseff Levanoni , David L. Detlefs , Weirong Zhu , Timothy L. Harris , Michael M. Magruder , Matthew B. Tolton
IPC分类号： G06F9/44 , G06F11/00
CPC分类号： G06F9/466 , G06F11/141
摘要： A software transactional memory system is provided with overflow handling. The system includes a global version counter with an epoch number and a version number. The system accesses the global version counter prior to and subsequent to memory accesses of transactions to validate read accesses of the transaction. The system includes mechanisms to detect global version number overflow and may allow some or all transactions to execute to completion subsequent to the global version number overflowing. The system also provides publication, privatization, and granular safety properties.
摘要翻译：软件事务内存系统提供溢出处理。该系统包括具有时代号和版本号的全局版本计数器。系统在事务的内存访问之前和之后访问全局版本计数器，以验证事务的读取访问。该系统包括检测全局版本号溢出的机制，并且可允许一些或所有事务在全球版本号码溢出之后执行完成。该系统还提供出版物，私有化和粒状安全属性。

3. 发明申请

US20110314244A1 COMPOSITION OF LOCKS IN SOFTWARE TRANSACTIONAL MEMORY 有权
标题翻译：软件交易记忆中的锁定组成
公开(公告)号：US20110314244A1
公开(公告)日：2011-12-22
申请号：US12819499
申请日：2010-06-21
申请人： Sukhdeep S. Sodhi , Yosseff Levanoni , David L. Detlefs , Lingli Zhang , Weirong Zhu , Dana Groff , Michael M. Magruder , Charles David Callahan, II
发明人： Sukhdeep S. Sodhi , Yosseff Levanoni , David L. Detlefs , Lingli Zhang , Weirong Zhu , Dana Groff , Michael M. Magruder , Charles David Callahan, II
IPC分类号： G06F12/02 , G06F12/14
CPC分类号： G06F9/467 , G06F9/528
摘要： A software transactional memory (STM) system allows the composition of traditional lock based synchronization with transactions in STM code. The STM system acquires each traditional lock the first time that a corresponding traditional lock acquire is encountered inside a transaction and defers all traditional lock releases until a top level transaction in a transaction nest commits or aborts. The STM system maintains state information associated with traditional lock operations in transactions and uses the state information to eliminate deferred traditional lock operations that are redundant. The STM system integrates with systems that implement garbage collection.
摘要翻译：软件事务存储器（STM）系统允许以STM代码的事务组合传统的基于锁的同步。 STM系统首次在交易中遇到相应的传统锁获取时，获取每个传统锁，并延迟所有传统的锁定版本，直到事务嵌套中的顶级事务提交或中止。 STM系统维护与事务中的传统锁定操作相关联的状态信息，并使用状态信息来消除冗余的延迟传统锁定操作。 STM系统与实施垃圾收集的系统集成。

4. 发明授权

US08719515B2 Composition of locks in software transactional memory 有权
标题翻译：软件交易记忆中锁的组成
公开(公告)号：US08719515B2
公开(公告)日：2014-05-06
申请号：US12819499
申请日：2010-06-21
申请人： Sukhdeep S. Sodhi , Yosseff Levanoni , David L. Detlefs , Lingli Zhang , Weirong Zhu , Dana Groff , Michael M. Magruder , Charles David Callahan, II
发明人： Sukhdeep S. Sodhi , Yosseff Levanoni , David L. Detlefs , Lingli Zhang , Weirong Zhu , Dana Groff , Michael M. Magruder , Charles David Callahan, II
IPC分类号： G06F13/00
CPC分类号： G06F9/467 , G06F9/528
摘要： A software transactional memory (STM) system allows the composition of traditional lock based synchronization with transactions in STM code. The STM system acquires each traditional lock the first time that a corresponding traditional lock acquire is encountered inside a transaction and defers all traditional lock releases until a top level transaction in a transaction nest commits or aborts. The STM system maintains state information associated with traditional lock operations in transactions and uses the state information to eliminate deferred traditional lock operations that are redundant. The STM system integrates with systems that implement garbage collection.
摘要翻译：软件事务存储器（STM）系统允许以STM代码的事务组合传统的基于锁的同步。 STM系统首次在交易中遇到相应的传统锁获取时，获取每个传统锁，并延迟所有传统的锁定版本，直到事务嵌套中的顶级事务提交或中止。 STM系统维护与事务中的传统锁定操作相关的状态信息，并使用状态信息来消除冗余的延迟传统锁定操作。 STM系统与实施垃圾收集的系统集成。

5. 发明申请

US20100228929A1 EXPEDITED COMPLETION OF A TRANSACTION IN STM 审中-公开
标题翻译：在STM中进行交易的预期完成
公开(公告)号：US20100228929A1
公开(公告)日：2010-09-09
申请号：US12400209
申请日：2009-03-09
申请人： David L. Detlefs , Yosseff Levanoni , Weirong Zhu , Dana Groff , Alexander Dadiomov
发明人： David L. Detlefs , Yosseff Levanoni , Weirong Zhu , Dana Groff , Alexander Dadiomov
IPC分类号： G06F12/02
CPC分类号： G06F9/467
摘要： A software transactional memory system is provided that provides privatization safety. The system identifies situations where the completion of a transaction may be expedited because a privatization artifact will not occur. The system determines whether a privatization artifact may occur using a read and write set intersection test, transactional variables, pessimistic locks, or declared privatizing transactions. If a privatization artifact will not occur for a transaction, then the system may allow the transaction to complete prior to one or more earlier transactions.
摘要翻译：提供了提供私有化安全性的软件事务内存系统。系统识别事务的完成可能因为私有化工件不会发生而加快的情况。系统使用读写集合交集测试，事务变量，悲观锁或已声明的私有化事务来确定私有化工件是否可能发生。如果事务不会发生私有化工件，则系统可能允许事务在一个或多个较早的事务之前完成。

6. 发明授权

US09411634B2 Action framework in software transactional memory 有权
标题翻译：软件事务记忆中的行动框架
公开(公告)号：US09411634B2
公开(公告)日：2016-08-09
申请号：US12819494
申请日：2010-06-21
申请人： Lingli Zhang , Yosseff Levanoni , David L. Detlefs , Sukhdeep S. Sodhi , Weirong Zhu
发明人： Lingli Zhang , Yosseff Levanoni , David L. Detlefs , Sukhdeep S. Sodhi , Weirong Zhu
IPC分类号： G06F17/30 , G06F9/46 , G06F9/52
CPC分类号： G06F9/467 , G06F9/526
摘要： A software transactional memory system implements a lightweight key-based action framework. The framework includes a set of unified application programming interfaces (APIs) exposed by an STM library that allow clients to implement actions that can be registered, queried, and updated using specific keys by transactions or transaction nests in STM code. Each action includes a key, state information, and a set of one or more callbacks that can be hooked to the validation, commit, abort, and/or re-execution phases of transaction execution. The actions extend the built-in concurrency controls of the STM system with customized control logics, support transaction nesting semantics, and enable integration with garbage collection systems.
摘要翻译：软件事务内存系统实现了一个轻量级的基于键盘的动作框架。该框架包括由STM库公开的一组统一的应用程序编程接口（API），允许客户端通过STM代码中的事务处理或事务处理实现使用特定密钥进行注册，查询和更新的操作。每个动作包括一个密钥，状态信息和一组可以挂接到事务执行的验证，提交，中止和/或重新执行阶段的回调。该操作通过定制的控制逻辑扩展了STM系统的内置并发控制，支持事务嵌套语义，并实现了与垃圾收集系统的集成。

7. 发明申请

US20110314230A1 ACTION FRAMEWORK IN SOFTWARE TRANSACTIONAL MEMORY 有权
标题翻译：软件交易记忆中的动作框架
公开(公告)号：US20110314230A1
公开(公告)日：2011-12-22
申请号：US12819494
申请日：2010-06-21
申请人： Lingli Zhang , Yosseff Levanoni , David L. Detlefs , Sukhdeep S. Sodhi , Weirong Zhu
发明人： Lingli Zhang , Yosseff Levanoni , David L. Detlefs , Sukhdeep S. Sodhi , Weirong Zhu
IPC分类号： G06F12/00 , G06F17/30
CPC分类号： G06F9/467 , G06F9/526
摘要： A software transactional memory system implements a lightweight key-based action framework. The framework includes a set of unified application programming interfaces (APIs) exposed by an STM library that allow clients to implement actions that can be registered, queried, and updated using specific keys by transactions or transaction nests in STM code. Each action includes a key, state information, and a set of one or more callbacks that can be hooked to the validation, commit, abort, and/or re-execution phases of transaction execution. The actions extend the built-in concurrency controls of the STM system with customized control logics, support transaction nesting semantics, and enable integration with garbage collection systems.
摘要翻译：软件事务内存系统实现了一个轻量级的基于键盘的动作框架。该框架包括由STM库公开的一组统一的应用程序编程接口（API），允许客户端通过STM代码中的事务处理或事务处理实现使用特定密钥进行注册，查询和更新的操作。每个动作包括一个密钥，状态信息和一组可以挂接到事务执行的验证，提交，中止和/或重新执行阶段的回调。该操作通过定制的控制逻辑扩展了STM系统的内置并发控制，支持事务嵌套语义，并实现了与垃圾收集系统的集成。

8. 发明申请

US20100083257A1 ARRAY OBJECT CONCURRENCY IN STM 有权
标题翻译：阵列对象在STM中的约束
公开(公告)号：US20100083257A1
公开(公告)日：2010-04-01
申请号：US12243371
申请日：2008-10-01
申请人： Weirong Zhu , David L. Detlefs , Yosseff Levanoni , Lingli Zhang
发明人： Weirong Zhu , David L. Detlefs , Yosseff Levanoni , Lingli Zhang
IPC分类号： G06F9/46 , G06F12/16
CPC分类号： G06F12/1466 , G06F3/0622 , G06F3/0653 , G06F3/0673 , G06F9/467 , G06F9/526 , G06F2212/1052
摘要： A software transactional memory system is provided that creates an array of transactional locks for each array object that is accessed by transactions. The system divides the array object into non-overlapping portions and associates each portion with a different transactional lock. The system acquires transactional locks for transactions that access corresponding portions of the array object. By doing so, different portions of the array object can be accessed by different transactions concurrently. The system may use a shared shadow or undo copy for accesses to the array object.
摘要翻译：提供了一种软件事务性内存系统，为每个由事务访问的数组对象创建一个事务锁数组。该系统将数组对象划分为非重叠部分，并将每个部分与不同的事务锁相关联。系统为访问数组对象的相应部分的事务获取事务锁。通过这样做，可以通过不同的事务同时访问数组对象的不同部分。系统可以使用共享的阴影或复制副本来访问数组对象。

9. 发明授权

US08954995B2 Array object concurrency in STM 有权
公开(公告)号：US08954995B2
公开(公告)日：2015-02-10
申请号：US12243371
申请日：2008-10-01
申请人： Weirong Zhu , David L. Detlefs , Yosseff Levanoni , Lingli Zhang
发明人： Weirong Zhu , David L. Detlefs , Yosseff Levanoni , Lingli Zhang
IPC分类号： G06F3/00 , G06F9/44 , G06F9/46 , G06F13/00 , G06F9/52
CPC分类号： G06F12/1466 , G06F3/0622 , G06F3/0653 , G06F3/0673 , G06F9/467 , G06F9/526 , G06F2212/1052
摘要： A software transactional memory system is provided that creates an array of transactional locks for each array object that is accessed by transactions. The system divides the array object into non-overlapping portions and associates each portion with a different transactional lock. The system acquires transactional locks for transactions that access corresponding portions of the array object. By doing so, different portions of the array object can be accessed by different transactions concurrently. The system may use a shared shadow or undo copy for accesses to the array object.

10. 发明授权

US08990515B2 Aliasing buffers 有权
标题翻译：混叠缓冲区
公开(公告)号：US08990515B2
公开(公告)日：2015-03-24
申请号：US13160373
申请日：2011-06-14
申请人： Amit Kumar Agarwal , Weirong Zhu , Yosseff Levanoni
发明人： Amit Kumar Agarwal , Weirong Zhu , Yosseff Levanoni
IPC分类号： G06F9/45 , G06F9/445
CPC分类号： G06F8/51 , G06F9/44536
摘要： The present invention extends to methods, systems, and computer program products for aliasing buffers. Embodiment of the inventions supporting buffer aliasing through introduction of a level of indirection between a source program's buffer accesses and the target executable physical buffers, and binding the logical buffer accesses to actual physical buffer accesses at runtime. A variety of techniques for can be used supporting runtime aliasing of buffers, in a system which otherwise disallows such runtime aliasing between separately defined buffers in the target executable code. Binding of logical buffer accesses in the source program to the actual physical buffers defined in the target executable code is delayed until runtime.
摘要翻译：本发明扩展到用于混叠缓冲器的方法，系统和计算机程序产品。本发明的实施例通过引入源程序的缓冲器访问和目标可执行物理缓冲器之间的间接级别来支持缓冲器混叠，并且在运行时将逻辑缓冲器访问绑定到实际物理缓冲器访问。可以使用各种技术来支持缓冲器的运行时混叠，在系统中，否则不允许在目标可执行代码中的单独定义的缓冲区之间的这种运行时混叠。将源程序中的逻辑缓冲区访问绑定到目标可执行代码中定义的实际物理缓冲区将被延迟到运行时。

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