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1. 发明授权

US09038087B2 Fence elision for work stealing 有权
标题翻译：篱笆切割工作偷窃
公开(公告)号：US09038087B2
公开(公告)日：2015-05-19
申请号：US12141107
申请日：2008-06-18
申请人： Paul F. Ringseth , Bill Messmer , Charles David Callahan, II , Stephen Toub
发明人： Paul F. Ringseth , Bill Messmer , Charles David Callahan, II , Stephen Toub
IPC分类号： G06F9/46 , G06F13/00 , G06F9/48 , G06F9/52
CPC分类号： G06F9/4881 , G06F9/52 , G06F9/522 , G06F2209/483
摘要： Methods and systems for statistically eliding fences in a work stealing algorithm are disclosed. A data structure comprising a head pointer, tail pointer, barrier pointer and an advertising flag allows for dynamic load-balancing across processing resources in computer applications.
摘要翻译：公开了在工作窃取算法中用于统计学检测围栏的方法和系统。包括头指针，尾指针，屏障指针和广告标志的数据结构允许跨计算机应用中的处理资源之间的动态负载平衡。

2. 发明授权

US07904685B1 Synchronization techniques in a multithreaded environment 有权
标题翻译：多线程环境中的同步技术
公开(公告)号：US07904685B1
公开(公告)日：2011-03-08
申请号：US10461979
申请日：2003-06-12
申请人： Gail A. Alverson , Charles David Callahan, II , Simon H. Kahan , Brian D. Koblenz , Allan Porterfield , Burton J. Smith
发明人： Gail A. Alverson , Charles David Callahan, II , Simon H. Kahan , Brian D. Koblenz , Allan Porterfield , Burton J. Smith
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28
CPC分类号： G06F9/52
摘要： Various techniques for manipulating data using access states of memory, access control fields of pointers and operations, and exception raising and exception trapping in a multithreaded computer system. In particular, the techniques include synchronization support for a thread blocked in a word, demand evaluation of values, parallel access of multiple threads to a list, synchronized and unsynchronized access to a data buffer, use of forwarding to avoid checking for an end of a buffer, use of sentinel word to detect access past a data structure, concurrent access to a word of memory using different synchronization access modes, and use of trapping to detect access to restricted memory.
摘要翻译：使用存储器访问状态，指针和操作的访问控制字段以及多线程计算机系统中异常引发和异常捕获来处理数据的各种技术。特别地，这些技术包括对一个字中被阻塞的线程的同步支持，对值的需求评估，多个线程到列表的并行访问，对数据缓冲器的同步和非同步访问，使用转发以避免检查缓冲区，使用前哨字来检测通过数据结构的访问，使用不同的同步访问模式并发访问一个单词的内存，并使用陷阱来检测对受限内存的访问。

3. 发明申请

US20100131720A1 MANAGEMENT OF OWNERSHIP CONTROL AND DATA MOVEMENT IN SHARED-MEMORY SYSTEMS 有权
标题翻译：在共享系统中的所有权控制和数据移动的管理
公开(公告)号：US20100131720A1
公开(公告)日：2010-05-27
申请号：US12324628
申请日：2008-11-26
申请人： David T. Harper, III , Charles David Callahan, II
发明人： David T. Harper, III , Charles David Callahan, II
IPC分类号： G06F12/00
CPC分类号： G06F9/526 , G06F3/067 , G06F12/0813
摘要： A method to exchange data in a shared memory system includes the use of a buffer in communication with a producer processor and a consumer processor. The cache data is temporarily stored in the buffer. The method includes for the consumer and the producer to indicate intent to acquire ownership of the buffer. In response to the indication of intent, the producer, consumer, buffer are prepared for the access. If the consumer intends to acquire the buffer, the producer places the cache data into the buffer. If the producer intends to acquire the buffer, the consumer removes the cache data from the buffer. The access to the buffer, however, is delayed until the producer, consumer, and the buffer are prepared.
摘要翻译：在共享存储器系统中交换数据的方法包括使用与生产者处理器和消费者处理器进行通信的缓冲器。高速缓存数据临时存储在缓冲区中。该方法包括为消费者和生产者指示获取缓冲器所有权的意图。响应于意图的指示，生产者，消费者，缓冲区准备进行访问。如果消费者想要获取缓冲区，生产者将缓存数据放入缓冲区。如果生产者打算获取缓冲区，消费者将从缓冲区中删除缓存数据。然而，缓冲区的访问被延迟，直到生产者，消费者和缓冲区被准备好。

4. 发明授权

US07584332B2 Computer systems with lightweight multi-threaded architectures 有权
标题翻译：具有轻量级多线程架构的计算机系统
公开(公告)号：US07584332B2
公开(公告)日：2009-09-01
申请号：US11675549
申请日：2007-02-15
申请人： Peter M. Kogge , Jay B. Brockman , David Tennyson Harper, III , Burton Smith , Charles David Callahan, II
发明人： Peter M. Kogge , Jay B. Brockman , David Tennyson Harper, III , Burton Smith , Charles David Callahan, II
IPC分类号： G06F12/00
CPC分类号： G06F9/547 , G06F9/4843 , G06F9/5044
摘要： Embodiments of the present invention provide a class of computer architectures generally referred to as lightweight multi-threaded architectures (LIMA). Other embodiments may be described and claimed.
摘要翻译：本发明的实施例提供了一类通常称为轻量级多线程架构（LIMA）的计算机体系结构。可以描述和要求保护其他实施例。

5. 发明授权

US07558889B2 Accessing a collection of data items in a multithreaded environment 有权
标题翻译：在多线程环境中访问数据项集合
公开(公告)号：US07558889B2
公开(公告)日：2009-07-07
申请号：US10697890
申请日：2003-10-30
申请人： Gail A. Alverson , Charles David Callahan, II , Simon H. Kahan , Brian D. Koblenz , Allan Porterfield , Burton J. Smith
发明人： Gail A. Alverson , Charles David Callahan, II , Simon H. Kahan , Brian D. Koblenz , Allan Porterfield , Burton J. Smith
IPC分类号： G06F13/14 , G06F12/00 , G06F3/00
CPC分类号： G06F9/52
摘要： Various techniques for manipulating data using access states of memory, access control fields of pointers and operations, and exception raising and exception trapping in a multithreaded computer system. In particular, the techniques include synchronization support for a thread blocked in a word, demand evalution of values, parallel access of multiple threads to a list, synchronized and unsynchronized access to a data buffer, use of fowarding to avoid checking for an end of a buffer, use of sentinel work to detect access past a data structure, concurrent access to a word of memory using different synchronization access modes, and use of trapping to detect access to restricted memory.
摘要翻译：使用存储器访问状态，指针和操作的访问控制字段以及多线程计算机系统中异常引发和异常捕获来处理数据的各种技术。特别地，这些技术包括对一个字中被阻塞的线程的同步支持，对值的需求评估，多个线程到列表的并行访问，对数据缓冲器的同步和非同步访问，使用转发以避免检查缓冲区，使用前哨字来检测通过数据结构的访问，使用不同的同步访问模式并发访问一个单词的内存，并使用陷阱来检测对受限内存的访问。

6. 发明授权

US07360221B2 Task swap out in a multithreaded environment 有权
标题翻译：任务在多线程环境中进行交换
公开(公告)号：US07360221B2
公开(公告)日：2008-04-15
申请号：US10659407
申请日：2003-09-10
申请人： Gail A. Alverson , Charles David Callahan, II , Susan L. Coatney , Brian D. Koblenz , Richard D. Korry , Burton J. Smith
发明人： Gail A. Alverson , Charles David Callahan, II , Susan L. Coatney , Brian D. Koblenz , Richard D. Korry , Burton J. Smith
IPC分类号： G06F9/46
CPC分类号： G06F9/485 , G06F9/461 , G06F9/4812 , G06F9/52 , G06F2209/481
摘要： A method and system that prepares a task for being swapped out from processor utilization that is executing on a computer with multiple processors that each support multiple streams. The task has one or more teams of threads, where each team represents threads executing on a single processor. The task designates, for each stream that is executing a thread, one stream as a team master stream and one stream as a task master stream. For each team master stream, the task notifies the operating system that the team is ready to be swapped out when each other thread of the team has saved its state and has quit its stream. Finally, for the task master stream, the task notifies the operating system that the task is ready to be swapped when it has saved its state and each other team has notified that it is ready to be swapped out.
摘要翻译：一种方法和系统，准备一个从处理器利用率交换的任务，该处理器利用率在每台支持多个流的多个处理器的计算机上执行。该任务具有一个或多个线程团队，每个团队都表示在单个处理器上执行的线程。该任务为执行线程的每个流指定一个流作为团队主流，一个流作为任务主流。对于每个团队主流，任务通知操作系统，当团队的每个其他线程已保存其状态并已退出其流时，该团队已准备好进行交换。最后，对于任务主流，任务通知操作系统当任务准备好被交换时，它已经保存了状态，并且每个其他的团队已经通知它已经准备好被换出了。

7. 发明授权

US08949549B2 Management of ownership control and data movement in shared-memory systems 有权
标题翻译：共享内存系统中的所有权控制和数据移动管理
公开(公告)号：US08949549B2
公开(公告)日：2015-02-03
申请号：US12324628
申请日：2008-11-26
申请人： David T. Harper, III , Charles David Callahan, II
发明人： David T. Harper, III , Charles David Callahan, II
IPC分类号： G06F12/00 , G06F3/00 , G06F9/00 , G06F9/52 , G06F12/08 , G06F3/06
CPC分类号： G06F9/526 , G06F3/067 , G06F12/0813
摘要： A method to exchange data in a shared memory system includes the use of a buffer in communication with a producer processor and a consumer processor. The cache data is temporarily stored in the buffer. The method includes for the consumer and the producer to indicate intent to acquire ownership of the buffer. In response to the indication of intent, the producer, consumer, buffer are prepared for the access. If the consumer intends to acquire the buffer, the producer places the cache data into the buffer. If the producer intends to acquire the buffer, the consumer removes the cache data from the buffer. The access to the buffer, however, is delayed until the producer, consumer, and the buffer are prepared.
摘要翻译：在共享存储器系统中交换数据的方法包括使用与生产者处理器和消费者处理器进行通信的缓冲器。高速缓存数据临时存储在缓冲区中。该方法包括为消费者和生产者指示获取缓冲器所有权的意图。响应于意图的指示，生产者，消费者，缓冲区准备进行访问。如果消费者想要获取缓冲区，生产者将缓存数据放入缓冲区。如果生产者打算获取缓冲区，消费者将从缓冲区中删除缓存数据。然而，缓冲区的访问被延迟，直到生产者，消费者和缓冲区被准备好。

8. 发明授权

US07165150B2 Restricting access to memory in a multithreaded environment 有权
标题翻译：在多线程环境中限制对内存的访问
公开(公告)号：US07165150B2
公开(公告)日：2007-01-16
申请号：US10697902
申请日：2003-10-30
申请人： Gail A. Alverson , Charles David Callahan, II , Simon H. Kahan , Brian D. Koblenz , Allan Porterfield , Burton J. Smith
发明人： Gail A. Alverson , Charles David Callahan, II , Simon H. Kahan , Brian D. Koblenz , Allan Porterfield , Burton J. Smith
IPC分类号： G06F12/08
CPC分类号： G06F9/52
摘要： Various techniques for manipulating data using access states of memory, access control fields of pointers and operations, and exception raising and exception trapping in a multithreaded computer system. In particular, the techniques include synchronization support for a thread blocked in a word, demand evaluation of values, parallel access of multiple threads to a list, synchronized and unsynchronized access to a data buffer, use of forwarding to avoid checking for an end of a buffer, use of sentinel word to detect access past a data structure, concurrent access to a word of memory using different synchronization access modes, and use of trapping to detect access to restricted memory.
摘要翻译：使用存储器访问状态，指针和操作的访问控制字段以及多线程计算机系统中异常引发和异常捕获来处理数据的各种技术。特别地，这些技术包括对一个字中被阻塞的线程的同步支持，对值的需求评估，多个线程到列表的并行访问，对数据缓冲器的同步和非同步访问，使用转发以避免检查缓冲区，使用前哨字来检测通过数据结构的访问，使用不同的同步访问模式并发访问一个单词的内存，并使用陷阱来检测对受限内存的访问。

9. 发明授权

US07117330B1 Synchronization techniques in a multithreaded environment 有权
标题翻译：多线程环境中的同步技术
公开(公告)号：US07117330B1
公开(公告)日：2006-10-03
申请号：US10461950
申请日：2003-06-12
申请人： Gail A. Alverson , Charles David Callahan, II , Simon H. Kahan , Brian D. Koblenz , Allan Porterfield , Burton J. Smith
发明人： Gail A. Alverson , Charles David Callahan, II , Simon H. Kahan , Brian D. Koblenz , Allan Porterfield , Burton J. Smith
IPC分类号： G06F12/00
CPC分类号： G06F9/52
摘要： Various techniques for manipulating data using access states of memory, access control fields of pointers and operations, and exception raising and exception trapping in a multithreaded computer system. In particular, the techniques include synchronization support for a thread blocked in a word, demand evaluation of values, parallel access of multiple threads to a list, synchronized and unsynchronized access to a data buffer, use of forwarding to avoid checking for an end of a buffer, use of sentinel word to detect access past a data structure, concurrent access to a word of memory using different synchronization access modes, and use of trapping to detect access to restricted memory.
摘要翻译：使用存储器访问状态，指针和操作的访问控制字段以及多线程计算机系统中异常引发和异常捕获来处理数据的各种技术。特别地，这些技术包括对一个字中被阻塞的线程的同步支持，对值的需求评估，多个线程到列表的并行访问，对数据缓冲器的同步和非同步访问，使用转发以避免检查缓冲区，使用前哨字来检测通过数据结构的访问，使用不同的同步访问模式并发访问一个单词的内存，并使用陷阱来检测对受限内存的访问。

10. 发明授权

US07020767B2 Techniques for reducing the rate of instruction issuance 有权
标题翻译：减少指令发放率的技术
公开(公告)号：US07020767B2
公开(公告)日：2006-03-28
申请号：US09792426
申请日：2001-02-23
申请人： Gail A. Alverson , Charles David Callahan, II , Susan L. Coatney , Laurence S. Kaplan , Richard D. Korry
发明人： Gail A. Alverson , Charles David Callahan, II , Susan L. Coatney , Laurence S. Kaplan , Richard D. Korry
IPC分类号： G06F9/44
CPC分类号： G06F9/4812 , G06F9/542
摘要： A method and system in a multithreaded processor for processing events without interrupt notifications. In one aspect of the present invention, an operating system creates a thread to execute on a stream of the processor. During execution of the thread, the thread executes a loop that determines whether an event has occurred and, in response to determining whether an event has occurred, assigns a different thread to process the event so that multiple events can be processed in parallel and so that interrupts are not needed to signal that the event has occurred. Another aspect of the present invention provides a method and system for processing asynchronously occurring events without interrupt notifications. To achieve this processing, a first thread is executed to generate a notification that the event has occurred upon receipt of the asynchronously occurring event. A second thread is also executed that loops determining whether a notification has been generated and, in response to determining that a notification has been generated, performing the processing necessary for the event.
摘要翻译：多线程处理器中的方法和系统，用于处理事件而无中断通知。在本发明的一个方面，操作系统创建在处理器的流上执行的线程。在执行线程期间，线程执行一个循环，该循环确定事件是否已经发生，并且响应于确定事件是否已经发生，分配不同的线程来处理事件，以便并行处理多个事件，从而不需要中断来表明事件已经发生。本发明的另一方面提供了一种用于处理异步发生的事件而不中断通知的方法和系统。为了实现该处理，执行第一线程以生成在接收到异步发生的事件时已经发生事件的通知。还执行第二线程，其循环确定是否已经生成通知，并且响应于确定已经生成通知，执行事件所需的处理。

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