专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US5835505A Semiconductor integrated circuit and system incorporating the same 失效
标题翻译：半导体集成电路和系统结合在一起
公开(公告)号：US5835505A
公开(公告)日：1998-11-10
申请号：US843581
申请日：1997-04-16
申请人： Yoshito Nishimichi , Satoshi Ogura , Shinji Ozaki , Seiji Tokunoh , Akira Miyoshi , Hiroaki Yamamoto , Yoshiaki Kasuga
发明人： Yoshito Nishimichi , Satoshi Ogura , Shinji Ozaki , Seiji Tokunoh , Akira Miyoshi , Hiroaki Yamamoto , Yoshiaki Kasuga
IPC分类号： G06F11/36 , G01R31/28 , G11C29/00
CPC分类号： G06F11/3648
摘要： A semiconductor integrated circuit includes a functional block realizing at least part of a function of the semiconductor integrated circuit. The functional block includes a plurality of basic cells and a plurality of terminal cells. Each of the plurality of terminal cells has a connector for mediating a communication between another semiconductor integrated circuit and one of the plurality of basic cells.
摘要翻译：半导体集成电路包括实现半导体集成电路的功能的至少一部分的功能块。功能块包括多个基本单元和多个终端单元。多个终端单元中的每一个具有用于中介另一半导体集成电路与多个基本单元中的一个之间的通信的连接器。

2. 发明授权

US06480875B1 Adder circuit and associated layout structure 失效
标题翻译：加法器电路和相关布局结构
公开(公告)号：US06480875B1
公开(公告)日：2002-11-12
申请号：US08957159
申请日：1997-10-24
申请人： Akira Miyoshi , Hiroaki Yamamoto , Yoshito Nishimichi
发明人： Akira Miyoshi , Hiroaki Yamamoto , Yoshito Nishimichi
IPC分类号： G06F750
CPC分类号： G06F7/508 , H01L27/0207 , H01L27/092
摘要： In an adder circuit, a block carry generation logic over three consecutive digits is produced from the following equations. G0=g2+p2·g1+p2·p1·g0 /g0=/p2+/g2·/p1+/g2·/g1·/g0 In other words, the block carry generation logic /G0 is produced by a single PMOS transistor, a series circuit formed of two PMOS transistors connected in series, and a series circuit formed of three PMOS transistors connected in series. The block carry generation logic G0 is produced by a single NMOS transistor, a series circuit formed of two NMOS transistors connected in series, and a series circuit formed of three NMOS transistors connected in series. Block carry generation logics can be formed in such a way as to achieve not only a reduction of the layout area but also a higher operation rate.
摘要翻译：在加法器电路中，从以下等式产生三位连续位数的块载入生成逻辑。换句话说，块载入生成逻辑/ G0由单个PMOS晶体管产生，串联电路由两个PMOS晶体管形成，串联电路以及串联连接的3个PMOS晶体管构成的串联电路。块载入生成逻辑G0由单个NMOS晶体管，串联连接的两个NMOS晶体管构成的串联电路和由串联连接的三个NMOS晶体管构成的串联电路产生。块携带生成逻辑可以形成为不仅实现布局区域的减少，而且实现更高的操作速率。

3. 发明申请

US20130072617A1 TRANSPARENT HEAT RADIATING COATING COMPOSITION 有权
标题翻译：透明散热涂料组合物
公开(公告)号：US20130072617A1
公开(公告)日：2013-03-21
申请号：US13583581
申请日：2011-01-14
申请人： Yasuyuki Agari , Akira Miyoshi , Ryohei Tsuboi
发明人： Yasuyuki Agari , Akira Miyoshi , Ryohei Tsuboi
IPC分类号： C09D133/08 , C09D133/10 , C08K3/26
CPC分类号： C09D5/32 , C08K3/22 , C09D7/61 , C09D101/12 , C09D133/02
摘要： The present invention provides a transparent heat radiating coating composition capable of forming a coating layer having excellent transparency and heat radiating properties. The transparent heat radiating coating composition of the present invention is a transparent heat radiating coating composition including a binder resin, a hydrotalcite-series compound and a resin dispersant with an amine value of 0 to 90 mgKOH/g, wherein the transparent heat radiating coating composition includes 50 to 290 parts by weight of the hydrotalcite-series compound based on 100 parts by weight of the binder resin.
摘要翻译：本发明提供一种能够形成透明性和散热性优异的涂层的透明散热涂料组合物。本发明的透明散热用涂料组合物是包含粘合剂树脂，水滑石系列化合物和胺值为0至90mgKOH / g的树脂分散剂的透明散热涂料组合物，其中透明散热涂料组合物基于100重量份的粘合剂树脂，包含50〜290重量份的水滑石系列化合物。

4. 发明授权

US07586461B2 Antenna unit having improved antenna radiation characteristics 失效
标题翻译：具有改善的天线辐射特性的天线单元
公开(公告)号：US07586461B2
公开(公告)日：2009-09-08
申请号：US11412547
申请日：2006-04-27
申请人： Akira Miyoshi , Takao Kato , Junichi Noro
发明人： Akira Miyoshi , Takao Kato , Junichi Noro
IPC分类号： H01Q1/36
CPC分类号： H01Q1/2216 , H01Q1/362 , H01Q11/08
摘要： An antenna unit comprises a hollow cylindrical member obtained by forming a flexible insulating film member into a hollow cylinder about a center axis and an antenna pattern composed of a plurality of conductors formed on a peripheral surface of the hollow cylindrical member. The antenna pattern comprises a helical pattern extending helically in a direction of the center axis and a loop pattern connected to an end portion of the helical pattern at an upper end portion of the hollow cylindrical member.
摘要翻译：天线单元包括通过将柔性绝缘膜构件围绕中心轴形成为中空圆筒而获得的中空圆柱形构件和由形成在中空圆柱形构件的圆周表面上的多个导体构成的天线图案。天线图案包括在中心轴线的方向上螺旋状延伸的螺旋图案和在中空圆柱形构件的上端部处连接到螺旋图案的端部的环形图案。

5. 发明申请

US20090058732A1 Wideband antenna unit 审中-公开
标题翻译：宽带天线单元
公开(公告)号：US20090058732A1
公开(公告)日：2009-03-05
申请号：US11988581
申请日：2006-03-02
申请人： Hisamatsu Nakano , Akira Miyoshi , Takaaki Kondo , Satoshi Hattori , Takaaki Kondo , Junji Yamauchi
发明人： Hisamatsu Nakano , Akira Miyoshi , Takaaki Kondo , Satoshi Hattori , Takaaki Kondo , Junji Yamauchi
IPC分类号： H01Q9/04
CPC分类号： H01Q9/40 , H01Q1/48 , H01Q9/30
摘要： To provide a thin wideband antenna unit capable of shrinking the size of a radiation element in a case where a dielectric is not used.In a wideband antenna unit 10 having a ground plate 12 and a flat shaped radiation element 14 disposed on a plane (x, y) flush with a plane where the ground plate extends, the radiation element 14 has an elliptically shape. The radiation element 14 and the ground plate 12 are apart from each other by a predetermined feeding distance ΔFD. A ratio between an outside diameter 2aout in an ellipse's x-direction and an outside diameter 2bout in an ellipse's y-direction is 8:5. The elliptically shaped radiation element 14 has an elliptically shaped opening 14a which is concentric O with the elliptically shape. An inside diameter 2bin in the ellipse's y-direction is half of an outside diameter 2bout in the ellipse's y-direction. It is desirable that an inside diameter 2ain of the elliptically shaped opening 14a in the ellipse's x-direction is not more than half of the outside diameter 2aout in the ellipse's x-direction.
摘要翻译：为了提供在不使用电介质的情况下能够收缩辐射元件的尺寸的薄宽带天线单元。在具有接地板12和设置在与接地板延伸的平面齐平的平面（x，y）上的平坦形状的辐射元件14的宽带天线单元10中，辐射元件14具有椭圆形。辐射元件14和接地板12彼此隔开预定的馈送距离ΔFD。椭圆x方向的外径2aout与椭圆y方向的外径2bo之间的比例为8:5。椭圆形辐射元件14具有椭圆形的开口14a，其与椭圆形状同心O。椭圆y方向的内径2bin是椭圆y方向的外径2bo的一半。希望椭圆形x方向上的椭圆形开口14a的内径2ain不大于椭圆x方向上的外径2aout的一半。

6. 发明授权

US07463213B2 Antenna unit having a single antenna element and a periodic structure upper plate 失效
标题翻译：具有单个天线元件和周期性结构上板的天线单元
公开(公告)号：US07463213B2
公开(公告)日：2008-12-09
申请号：US11699815
申请日：2007-01-30
申请人： Hisamatsu Nakano , Hidekazu Umetsu , Yoichi Asano , Junji Yamauchi , Akira Miyoshi
发明人： Hisamatsu Nakano , Hidekazu Umetsu , Yoichi Asano , Junji Yamauchi , Akira Miyoshi
IPC分类号： H01Q15/02 , H01Q1/38
CPC分类号： H01Q15/0053 , H01Q1/362 , H01Q11/08 , H01Q15/008 , H01Q15/142 , H01Q19/10
摘要： An antenna unit consists of an EBG reflector, a single curl antenna supported at a central portion of the EBG reflector, and a periodic structure upper plate disposed apart from a principal surface of the EBG reflector by a predetermined distance. The EBG reflector includes a substrate having the principal surface and (Nx×Ny) square patches which are printed on the principle surface of the substrate and which are arranged in a matrix fashion (lattice structure). The periodic structure upper plate consists of a film and (Nx×Ny) square patch-like conductors printed on the film. The (Nx×Ny) square patch-like conductors are disposed so as to oppose to the (Nx×Ny) square patches, respectively.
摘要翻译：天线单元包括EBG反射器，支撑在EBG反射器的中心部分的单个卷曲天线以及与EBG反射器的主表面分开预定距离的周期性结构上板。 EBG反射器包括具有主表面的衬底和（NxxNy）个正方形贴片，印刷在衬底的主表面上并且以矩阵方式排列（晶格结构）。周期性结构上板由薄膜和印在薄膜上的（NxxNy）方形贴片状导体组成。（NxxNy）方形片状导体分别设置成与（NxxNy）个正方形块相对。

7. 发明授权

US07315934B2 Data processor and program for processing a data matrix 有权
标题翻译：用于处理数据矩阵的数据处理器和程序
公开(公告)号：US07315934B2
公开(公告)日：2008-01-01
申请号：US10377328
申请日：2003-02-28
申请人： Hiroyuki Morishita , Atsushi Ito , Satoshi Takashima , Hideshi Nishida , Kozo Kimura , Tokuzo Kiyohara , Akira Miyoshi , Hiroshi Kadota
发明人： Hiroyuki Morishita , Atsushi Ito , Satoshi Takashima , Hideshi Nishida , Kozo Kimura , Tokuzo Kiyohara , Akira Miyoshi , Hiroshi Kadota
IPC分类号： G06F15/76
CPC分类号： G06F9/3012 , G06F9/30036 , G06F9/3824 , G06F9/3885
摘要： A data processor has sixteen processing elements that each include a register file and an arithmetic logic unit. A network unit connects between the register files of the processing elements and the arithmetic logic units of the processing elements. The network unit has a selector for simultaneously performing a plurality of data transfers which are each made from a register file of one processing element to an operation unit of another processing element. With the provision of this selector that can perform such simultaneous data transfers, the processing efficiency of the processing elements can be maintained even if a change occurs in operand assignments and the like.
摘要翻译：数据处理器具有16个处理元件，每个处理元件包括寄存器文件和算术逻辑单元。网络单元连接处理元件的寄存器文件和处理元件的算术逻辑单元。网络单元具有选择器，用于同时执行多个数据传送，每个数据传输由一个处理元件的寄存器文件制成到另一个处理元件的操作单元。通过提供可以执行这种同时数据传输的该选择器，即使在操作数分配等中发生改变，也可以保持处理元件的处理效率。

8. 发明申请

US20070168806A1 Scan path circuit and semiconductor integrated circuit comprising the scan path circuit 有权
标题翻译：扫描路径电路和包括扫描路径电路的半导体集成电路
公开(公告)号：US20070168806A1
公开(公告)日：2007-07-19
申请号：US11506781
申请日：2006-08-21
申请人： Masaya Sumita , Akira Miyoshi
发明人： Masaya Sumita , Akira Miyoshi
IPC分类号： G01R31/28
CPC分类号： G11C29/32 , G11C2029/3202
摘要： Each of D flip-flops (FFs) 13a to 13f constituting a scan path circuit has a normal operation input circuit to be selected in a normal operation and a test operation input circuit to be selected in a test operation, and a control signal having an intermediate voltage between a supply voltage and a ground voltage is sent from a voltage generating circuit 17 to the test operation input circuit of each FF in the test operation. In this case, the amount of an output change in data in each FF is smoother than that in the case in which the supply voltage is applied. Consequently, the delay time of the data is increased. The intermediate voltage to be applied to each FF in the test operation is determined based on a feedback signal sent from a test circuit 15 for checking whether scanned-out data have an error or not.
摘要翻译：构成扫描路径电路的D触发器（FF）13a至13f中的每一个具有在正常操作中选择的正常操作输入电路和在测试操作中选择的测试操作输入电路，以及控制信号在电源电压和接地电压之间具有中间电压的电压从电压产生电路17发送到测试操作中的每个FF的测试操作输入电路。在这种情况下，每个FF中的数据的输出变化量比施加电源电压的情况更平滑。因此，数据的延迟时间增加。基于从测试电路15发送的用于检查扫描数据是否具有错误的反馈信号来确定在测试操作中施加到每个FF的中间电压。

9. 发明授权

US07124339B2 Scan path circuit and semiconductor integrated circuit comprising the scan path circuit 有权
标题翻译：扫描路径电路和包括扫描路径电路的半导体集成电路
公开(公告)号：US07124339B2
公开(公告)日：2006-10-17
申请号：US10417208
申请日：2003-04-17
申请人： Masaya Sumita , Akira Miyoshi
发明人： Masaya Sumita , Akira Miyoshi
IPC分类号： G01R31/028 , H03K3/289
CPC分类号： G11C29/32 , G11C2029/3202
摘要： Each of D flip-flops (FFs) 13a to 13f constituting a scan path circuit has a normal operation input circuit to be selected in a normal operation and a test operation input circuit to be selected in a test operation, and a control signal having an intermediate voltage between a supply voltage and a ground voltage is sent from a voltage generating circuit 17 to the test operation input circuit of each FF in the test operation. In this case, the amount of an output change in data in each FF is smoother than that in the case in which the supply voltage is applied. Consequently, the delay time of the data is increased. The intermediate voltage to be applied to each FF in the test operation is determined based on a feedback signal sent from a test circuit 15 for checking whether scanned-out data have an error or not.
摘要翻译：构成扫描路径电路的D触发器（FF）13a至13f中的每一个具有在正常操作中选择的正常操作输入电路和在测试操作中选择的测试操作输入电路，以及控制信号在电源电压和接地电压之间具有中间电压的电压从电压产生电路17发送到测试操作中的每个FF的测试操作输入电路。在这种情况下，每个FF中的数据的输出变化量比施加电源电压的情况更平滑。因此，数据的延迟时间增加。基于从测试电路15发送的用于检查扫描数据是否具有错误的反馈信号来确定在测试操作中施加到每个FF的中间电压。

10. 发明授权

US07084820B2 Antenna device having excellent horizontal and vertical polarization characteristics 失效
公开(公告)号：US07084820B2
公开(公告)日：2006-08-01
申请号：US11068687
申请日：2005-02-28
申请人： Junichi Noro , Kenichi Kamada , Akira Miyoshi
发明人： Junichi Noro , Kenichi Kamada , Akira Miyoshi
IPC分类号： H01Q1/24
CPC分类号： H01Q7/00
摘要： An antenna device comprises a coaxial cable that has a central conductor and an outer conductor and is folded into an L-shape at an end portion. An L-shaped first-conductor-portion is electrically connected to the central conductor at the end portion of the coaxial cable. An L-shaped second-conductor-portion is electrically connected to the outer conductor at the end portion of the coaxial cable and is disposed along an outer circumferential face of the coaxial cable. The first and second conductor portions as a whole are formed into an approximate U-shape.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式