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1. 发明授权

US07594131B2 Processing apparatus 有权
标题翻译：处理装置
公开(公告)号：US07594131B2
公开(公告)日：2009-09-22
申请号：US11200193
申请日：2005-08-10
申请人： Shinji Ozaki
发明人： Shinji Ozaki
IPC分类号： G06F1/32 , G06F1/26
CPC分类号： G06F9/3802 , G06F1/3203 , G06F1/3275 , G06F9/30101 , G06F9/30189 , G06F9/3836 , G06F9/3842 , G06F9/3869 , G06F12/0864 , G06F2212/1028 , G06F2212/6082 , Y02D10/13 , Y02D10/14
摘要： The processing apparatus in the present invention is a processing apparatus which executes a program and performs processes of the program, and includes the following: an execution circuit having a plurality of operation modes, each of which has a different effect on the processing performance and the power consumption of the processing apparatus; a measurement unit operable to measure at least one of a process execution performance and an execution power consumption of the processor circuit; and a control unit operable to compare a target value and a measurement result from the measurement unit, and to switch the operation modes in accordance to a result of the comparison.
摘要翻译：本发明的处理装置是执行程序并进行程序处理的处理装置，其特征在于：具有多个操作模式的执行电路，每个操作模式对处理性能和/ 处理装置的功耗; 测量单元，其可操作以测量处理器电路的处理执行性能和执行功耗中的至少一个; 以及控制单元，用于比较来自测量单元的目标值和测量结果，并且根据比较结果切换操作模式。

2. 发明申请

US20090187903A1 VIRTUAL MULTIPROCESSOR SYSTEM 审中-公开
标题翻译：虚拟多媒体系统
公开(公告)号：US20090187903A1
公开(公告)日：2009-07-23
申请号：US12346987
申请日：2008-12-31
申请人： Akira UEDA , Takao YAMAMOTO , Shinji OZAKI , Masahide KAKEDA
发明人： Akira UEDA , Takao YAMAMOTO , Shinji OZAKI , Masahide KAKEDA
IPC分类号： G06F9/455
CPC分类号： G06F9/45558 , G06F11/3636 , G06F11/3648 , G06F2009/45591
摘要： A virtual multiprocessor system which does not require a memory apparatus for debugging includes: a physical processor, storage units for storing status information indicating respective statuses of logic processors, a dispatch unit which assigns one of the logic processors by switching the logic processors with respect to a physical processor, and an interrupt unit which suspends the processing currently executed by a current logic processor among the logic processors by issuing a debug interrupt request to the current logic processor; in the virtual multiprocessor system, the dispatch unit stores status information corresponding to the current logic processor into one of the storage units in response to the debug interrupt request issued to the current logic processor that is assigned to the physical processor.
摘要翻译：不需要用于调试的存储器装置的虚拟多处理器系统包括：物理处理器，用于存储指示逻辑处理器的各自状态的状态信息的存储单元，调度单元，其通过将逻辑处理器相对于物理处理器和中断单元，其通过向当前逻辑处理器发出调试中断请求来暂停当前逻辑处理器在逻辑处理器中执行的处理; 在虚拟多处理器系统中，调度单元响应于发送给分配给物理处理器的当前逻辑处理器的调试中断请求，将与当前逻辑处理器相对应的状态信息存储到一个存储单元中。

3. 发明申请

US20070088896A1 Arithmetic processing unit and method for operating cache 审中-公开
标题翻译：用于操作缓存的算术处理单元和方法
公开(公告)号：US20070088896A1
公开(公告)日：2007-04-19
申请号：US11510670
申请日：2006-08-28
申请人： Masahide Kakeda , Masaitsu Nakajima , Takao Yamamoto , Shinji Ozaki
发明人： Masahide Kakeda , Masaitsu Nakajima , Takao Yamamoto , Shinji Ozaki
IPC分类号： G06F12/08 , G06F13/00
CPC分类号： G06F12/0893 , G06F12/0831
摘要： A cache access transmission means outputs an access address, obtained from a CPU by way of a local cache access address input means, to a shared address bus via a remote cache access address output means. A cache access control means accesses a cache memory by using the access address obtained from the shared address bus by way of a remote cache access address input means. That is, an access address output from a CPU of a first processor is output from the cache access transmission means and received by the cache access control means so as to be used in accessing a cache memory in a second processor.
摘要翻译：高速缓存存取传输装置经由远程高速缓存存取地址输出装置将通过本地高速缓存存取地址输入装置从CPU获得的访问地址输出到共享地址总线。高速缓存访问控制装置通过使用通过远程高速缓存访问地址输入装置从共享地址总线获得的访问地址来访问高速缓冲存储器。也就是说，从高速缓存访问传输装置输出从第一处理器的CPU输出的访问地址，并由高速缓存访问控制装置接收，以便用于访问第二处理器中的高速缓冲存储器。

4. 发明授权

US06425047B1 Process containing address decoders suited to improvements in clock speed 有权
标题翻译：包含地址解码器的过程适合于提高时钟速度
公开(公告)号：US06425047B1
公开(公告)日：2002-07-23
申请号：US09602180
申请日：2000-06-22
申请人： Shinji Ozaki
发明人： Shinji Ozaki
IPC分类号： G06F1300
CPC分类号： G06F13/4239
摘要： A processor that accesses a plurality of regions allocated to memory includes: a judging unit for judging which region is accessed based on an access address; an assuming unit for assuming which region is accessed based on the access address, the assuming unit producing an assumption result faster than the judging unit produces a judgement result; an accessing unit for starting access based on the assumption result; a detecting unit for detecting a disagreement between the judgement result and the assumption result; and a control unit for stopping the access that has been started if the detecting unit has detected the disagreement, and controlling the accessing unit to perform another access based on the judgement result.
摘要翻译：访问分配给存储器的多个区域的处理器包括：判断单元，用于基于访问地址来判断哪个区域被访问; 假定单元，用于基于所述访问地址来假设哪个区域被访问，所述假设单元产生比所述判断单元更快的假设结果产生判断结果; 基于假设结果开始访问的访问单元; 检测单元，用于检测判断结果与假设结果之间的不一致; 以及控制单元，用于如果检测单元检测到不一致则停止已经开始的访问，并且基于判断结果控制访问单元执行另一访问。

5. 发明授权

US6161171A Apparatus for pipelining sequential instructions in synchronism with an operation clock 失效
标题翻译：用于与操作时钟同步地进行顺序指令的装置
公开(公告)号：US6161171A
公开(公告)日：2000-12-12
申请号：US105212
申请日：1998-06-26
申请人： Toru Morikawa , Nobuo Higaki , Shinji Ozaki , Keisuke Kaneko , Satoshi Ogura , Masato Suzuki
发明人： Toru Morikawa , Nobuo Higaki , Shinji Ozaki , Keisuke Kaneko , Satoshi Ogura , Masato Suzuki
IPC分类号： G06F9/38 , G06F12/08 , G06F13/00
CPC分类号： G06F9/3867 , G06F12/0855
摘要： A first instruction requiring that a data word should be read out from a data memory and be stored in a certain register in a register set, and then a second instruction requiring that two operands, respectively read out from the register and another register in the register set, should be added are pipeline-processed. In a high-speed mode in which an operation clock having a higher frequency is supplied, a data cache intervened between an instruction execution circuit and the data memory is controlled to supply a data word to a WB (write back) stage of the instruction execution circuit within two cycles with respect to an input address associated with the first instruction. In order to execute the second instruction, the data word is supplied from the WB stage to an EX (operation execution) stage of the instruction execution circuit. In a low-speed mode in which an operation clock having a lower frequency is supplied, the data cache is controlled to supply a data word to an MEM (memory access) stage of the instruction execution circuit within one cycle with respect to an input address associated with the first instruction. In order to execute the second instruction, the data word is bypassed from the MEM stage to the EX stage.
摘要翻译：需要从数据存储器中读取数据字并将其存储在寄存器组中的特定寄存器中的第一条指令，然后需要分别从寄存器读出的两个操作数和寄存器中的另一个寄存器的第二条指令设置，应加入管道处理。在提供具有较高频率的操作时钟的高速模式中，控制指令执行电路和数据存储器之间的数据高速缓冲存储器，以将数据字提供给指令执行的WB（回写）级电路相对于与第一指令相关联的输入地址在两个周期内。为了执行第二指令，数据字从WB级提供给指令执行电路的EX（操作执行）级。在提供具有较低频率的操作时钟的低速模式中，控制数据高速缓冲存储器以相对于输入地址的一个周期内将数据字提供给指令执行电路的MEM（存储器访问）级与第一条指令相关联。为了执行第二条指令，将数据字从MEM级旁路到EX级。

6. 发明授权

US5933465A Control signal detection method with calibration error and subscriber unit therewith 失效
标题翻译：具有校准误差的控制信号检测方法及其用户单元
公开(公告)号：US5933465A
公开(公告)日：1999-08-03
申请号：US828387
申请日：1997-03-28
申请人： Shinji Ozaki
发明人： Shinji Ozaki
IPC分类号： H04L27/14 , H04B7/005 , H04B7/26 , H04L1/24 , H04L25/06 , H04L27/20 , H03D1/06 , H04L1/00
CPC分类号： H04L25/062 , H04L1/24 , H04L27/20
摘要： In a control signal detection method, a calibration error value is obtained by obtaining the mean value of the received continuous (4.times.n) data, and the calibration error is compensated with respect to the received data by subtracting the obtained calibration error value from the received data, and the correlation value is obtained on the basis of the corrected received data, so that the control signal is detected. Therefore, it is able to compensate the calibration error with ease and to detect the control signal efficiently, with a simple construction.
摘要翻译：在控制信号检测方法中，通过获得所接收的连续（4×n）数据的平均值来获得校准误差值，并且通过从接收到的数据中减去所获得的校准误差值来相对于接收数据补偿校准误差，并且基于校正的接收数据获得相关值，从而检测控制信号。因此，能够以简单的结构容易地补偿校准误差并有效地检测控制信号。

7. 发明授权

US5397597A Optical recording medium and method of manufacturing the same 失效
标题翻译：光记录介质及其制造方法
公开(公告)号：US5397597A
公开(公告)日：1995-03-14
申请号：US92871
申请日：1993-07-19
申请人： Mamoru Soga , Shinji Ozaki , Norihisa Mino , Kazufumi Ogawa
发明人： Mamoru Soga , Shinji Ozaki , Norihisa Mino , Kazufumi Ogawa
IPC分类号： B05D1/18 , G11B7/243 , G11B7/257 , G11B7/26 , B05P3/06
CPC分类号： B82Y30/00 , B05D1/185 , B82Y10/00 , B82Y40/00 , G11B7/252 , G11B7/2542 , G11B7/26 , G11B2007/24316 , G11B2007/2432 , G11B2007/25706 , G11B2007/25708 , G11B2007/2571 , G11B2007/25713 , G11B2007/25715 , G11B7/2534 , G11B7/2545 , Y10S428/913 , Y10T428/31663
摘要： A chemically adsorbed film containing fluorocarbon groups is formed on an optical recording medium. Thus, an excellently water- and moisture-proof optical recording medium can be obtained. The optical recording medium is obtained by forming a chemically adsorbed film composed of fluorocarbon chain surface active material. The chemically adsorbed film is chemically bonded via siloxane covalent bonds. In the method of manufacture, an optical recording medium, e.g., an optical recording disk, is contacted with a solution which is made by dissolving a straight carbon chain surface active material having a chlorosilyl group at one end and a fluorocarbon group at the other end in a non-aqueous solvent or a gaseous phase condition, thereby chemically bonding the chlorosilane-based straight chain surface active material to the surface of the substrate via covalent siloxane bonds.
摘要翻译：在光记录介质上形成含氟碳基团的化学吸附膜。因此，可以获得优异的防水和防湿光学记录介质。通过形成由氟碳链表面活性物质构成的化学吸附膜获得光记录介质。化学吸附的膜通过硅氧烷共价键化学键合。在制造方法中，将光记录介质（例如光记录盘）与通过溶解在一端具有氯甲硅烷基的直链碳链表面活性材料和另一端的氟碳基团而制成的溶液在非水溶剂或气相条件下，通过共价硅氧烷键将基于氯硅烷的直链表面活性材料化学键合到基材的表面。

8. 发明授权

US5268211A Optical recording medium 失效
标题翻译：光记录介质
公开(公告)号：US5268211A
公开(公告)日：1993-12-07
申请号：US848914
申请日：1992-03-10
申请人： Mamoru Soga , Shinji Ozaki , Norihisa Mino , Kazufumi Ogawa
发明人： Mamoru Soga , Shinji Ozaki , Norihisa Mino , Kazufumi Ogawa
IPC分类号： B05D1/18 , G11B7/243 , G11B7/257 , G11B7/26 , B32B3/02
CPC分类号： B82Y30/00 , B05D1/185 , B82Y10/00 , B82Y40/00 , G11B7/252 , G11B7/2542 , G11B7/26 , G11B2007/24316 , G11B2007/2432 , G11B2007/25706 , G11B2007/25708 , G11B2007/2571 , G11B2007/25713 , G11B2007/25715 , G11B7/2534 , G11B7/2545 , Y10S428/913 , Y10T428/31663
摘要： A chemically adsorbed film containing fluorocarbon groups is formed on an optical recording medium. Thus, an excellently water- and moisture-proof optical recording medium can be obtained. The optical recording medium is obtained by forming a chemically adsorbed film composed of fluorocarbon chain surface active material. The chemically adsorbed film is chemically bonded via siloxane covalent bonds. In the method of manufacture, an optical recording medium, e.g., an optical recording disk, is contacted with a solution which is made by dissolving a straight carbon chain surface active material having a chlorosilyl group at one end and a fluorocarbon group at the other end in a non-aqueous solvent or a gaseous phase condition, thereby chemically bonding the chlorosilane-based straight chain surface active material to the surface of the substrate via covalent siloxane bonds.
摘要翻译：在光记录介质上形成含氟碳基团的化学吸附膜。因此，可以获得优异的防水和防湿光学记录介质。通过形成由氟碳链表面活性物质构成的化学吸附膜获得光记录介质。化学吸附的膜通过硅氧烷共价键化学键合。在制造方法中，将光记录介质（例如光记录盘）与通过溶解在一端具有氯甲硅烷基的直链碳链表面活性材料和另一端的氟碳基团而制成的溶液在非水溶剂或气相条件下，通过共价硅氧烷键将基于氯硅烷的直链表面活性材料化学键合到基材的表面。

9. 发明授权

US5130875A Multichannel magnetic head having a plurality of head chips fixed on a common head base 失效
标题翻译：多通道磁头具有固定在公共头部基座上的多个头部芯片
公开(公告)号：US5130875A
公开(公告)日：1992-07-14
申请号：US551011
申请日：1990-07-11
申请人： Hiroaki Ono , Tomomi Okamoto , Shinji Ozaki , Tsukasa Ohata
发明人： Hiroaki Ono , Tomomi Okamoto , Shinji Ozaki , Tsukasa Ohata
IPC分类号： G11B5/265 , G11B5/53
CPC分类号： G11B5/53 , G11B5/531
摘要： In a multichannel magnetic head including a plurality of head chips secured at fixed intervals to one head base mounted on a rotating drum. Each head chip is arranged so that a center of the curvature of each head tip is positioned substantially on a straight line or an extension of the straight line connecting each head gap to tis rear gap, and each of the head chips is arranged so that the distance L between a crossing point on said straight line connecting each head gap to its rear gap and the head gap, and the radius D of the rotating drum satisfy the following relationship: ##EQU1##
摘要翻译：在包括以固定间隔固定到安装在旋转鼓上的一个头基座的多个头部芯片的多通道磁头中。每个头部芯片被布置成使得每个头部尖端的曲率的中心基本上位于将每个头部间隙连接到后部间隙的直线或直线的延伸线上，并且每个头部芯片被布置成使得连接每个头部间隙与其后部间隙的直线上的交叉点与头部间隙之间的距离L以及旋转滚筒的半径D满足以下关系：

10. 发明授权

US4403260A Automatic tape stop device for video signal recording and reproducing apparatus 失效
标题翻译：视频信号记录和再现装置的自动磁带停止装置
公开(公告)号：US4403260A
公开(公告)日：1983-09-06
申请号：US234440
申请日：1981-02-13
申请人： Kotaro Kawamura , Shinji Ozaki
发明人： Kotaro Kawamura , Shinji Ozaki
IPC分类号： G11B15/18 , H04N5/783 , H04N5/78
CPC分类号： H04N5/783 , G11B15/1808
摘要： In a two-head helical scan type video signal recording and reproducing apparatus, gaps of the two heads are angled to each other to increase a record density. In such an apparatus, when the recorded signal is reproduced while the magnetic tape is stationary, that is, in a still image reproduction mode, the signal on the track recorded by the head having a different gap angle is not reproduced by that head. When the magnetic tape is stopped, the trace locus of the head does not align with the record track, which makes the reproduction of high quality of still image difficult. In the still image reproduction mode, tracking is improved to enable the reproduction of a high quality still image signal by displacing the heads transversely to the direction of trace. Since the absolute value of the deviation of the trace locus of the heads from the record track when the magnetic tape is stationary is known, the heads are laterally displaced by a predetermined signal and the magnetic tape is automatically stopped at a tape position, that is, a stop position of the record track relative to the heads, which assures the reproduction of an optimum still image. To this end, the level of the reproduced signal is detected and the magnetic tape is automatically stopped when the detected level meets a predetermined condition.
摘要翻译：在双头螺旋扫描型视频信号记录和再现装置中，两个头部的间隙彼此成角度以增加记录密度。在这种装置中，当磁带静止时，即在静止图像再现模式中再现记录信号时，由头部不再现由具有不同间隙角度的头记录的轨道上的信号。当磁带停止时，头部的轨迹不与记录轨迹对准，这使得高质量静止图像的再现变得困难。在静止图像再现模式中，通过使磁头横向移动到轨迹方向，改善了跟踪，以便能够再现高质量的静止图像信号。由于当磁带静止时磁头与记录轨道的轨迹轨迹的偏差的绝对值是已知的，所以磁头被预定的信号横向偏移，并且磁带被自动地停在磁带位置，也就是说，记录轨道相对于头部的停止位置，确保再现最佳静止图像。为此，当检测到的电平满足预定条件时，检测再生信号的电平，磁带自动停止。

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