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1. 发明申请

US20090249262A1 BEHAVIORAL SYNTHESIS DEVICE, BEHAVIORAL SYNTHESIS METHOD, AND COMPUTER PROGRAM PRODUCT 有权
标题翻译：行为综合设备，行为综合方法和计算机程序产品
公开(公告)号：US20090249262A1
公开(公告)日：2009-10-01
申请号：US12409856
申请日：2009-03-24
申请人： Yoshinosuke Kato , Takao Toi , Noritsugu Nakamura , Toru Awashima , Hirokazu Kami
发明人： Yoshinosuke Kato , Takao Toi , Noritsugu Nakamura , Toru Awashima , Hirokazu Kami
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： A behavioral synthesis device include a profile unit that implements an electronic circuit at a reconfigurable hardware based on a first register transfer level description generated by a behavioral synthesis unit, actuates the implemented electronic circuit, and causes the electric circuit to output profile information from the actuated electronic circuit; and an optimizer that generates optimization information for optimizing a behavioral synthesis carried out by the behavioral synthesis unit based on the profile information that the profile unit causes the electric circuit to output, and outputs the generated optimization information to the behavioral synthesis unit, wherein the behavioral synthesis unit acquires a first behavioral level description, and subjects the acquired first behavioral level description to behavioral synthesis and generates the second register transfer level description based on the optimization information outputted by the optimizer.
摘要翻译：行为综合装置包括：简档单元，其基于由行为合成单元生成的第一寄存器传送级别描述，在可重新配置的硬件上实现电子电路，致动所实现的电子电路，并且使电路从致动的电路输出简档信息电子电路; 以及优化器，其基于所述简档单元使所述电路输出的所述简档信息，生成用于优化由所述行为综合单元执行的行为综合的优化信息，并将所生成的优化信息输出到所述行为综合单元，其中，合成单元获取第一行为级别描述，并且将所获取的第一行为级别描述进行行为综合，并且基于优化器输出的优化信息生成第二寄存器传送级别描述。

2. 发明授权

US08516414B2 Behavioral synthesis device, behavioral synthesis method, and computer program product 有权
标题翻译：行为综合装置，行为综合方法和计算机程序产品
公开(公告)号：US08516414B2
公开(公告)日：2013-08-20
申请号：US12409856
申请日：2009-03-24
申请人： Yoshinosuke Kato , Takao Toi , Noritsugu Nakamura , Toru Awashima , Hirokazu Kami
发明人： Yoshinosuke Kato , Takao Toi , Noritsugu Nakamura , Toru Awashima , Hirokazu Kami
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： A behavioral synthesis device include a profile unit that implements an electronic circuit at a reconfigurable hardware based on a first register transfer level description generated by a behavioral synthesis unit, actuates the implemented electronic circuit, and causes the electric circuit to output profile information from the actuated electronic circuit; and an optimizer that generates optimization information for optimizing a behavioral synthesis carried out by the behavioral synthesis unit based on the profile information that the profile unit causes the electric circuit to output, and outputs the generated optimization information to the behavioral synthesis unit, wherein the behavioral synthesis unit acquires a first behavioral level description, and subjects the acquired first behavioral level description to behavioral synthesis and generates the second register transfer level description based on the optimization information outputted by the optimizer.
摘要翻译：行为综合装置包括：简档单元，其基于由行为合成单元生成的第一寄存器传送级别描述，在可重新配置的硬件上实现电子电路，致动所实现的电子电路，并且使电路从致动的电路输出简档信息电子电路; 以及优化器，其基于所述简档单元使所述电路输出的所述简档信息，生成用于优化由所述行为综合单元执行的行为综合的优化信息，并将所生成的优化信息输出到所述行为综合单元，其中，合成单元获取第一行为级别描述，并且将所获取的第一行为级别描述进行行为综合，并且基于优化器输出的优化信息生成第二寄存器传送级别描述。

3. 发明授权

US08176451B2 Behavioral synthesis apparatus, behavioral synthesis method, and computer readable recording medium 有权
标题翻译：行为综合装置，行为综合方法和计算机可读记录介质
公开(公告)号：US08176451B2
公开(公告)日：2012-05-08
申请号：US12569043
申请日：2009-09-29
申请人： Takao Toi , Noritsugu Nakamura , Yoshinosuke Kato , Toru Awashima , Taro Fujii , Toshiro Kitaoka , Koichiro Furuta , Masato Motomura
发明人： Takao Toi , Noritsugu Nakamura , Yoshinosuke Kato , Toru Awashima , Taro Fujii , Toshiro Kitaoka , Koichiro Furuta , Masato Motomura
IPC分类号： G06F17/50
CPC分类号： G06F17/505
摘要： A behavioral synthesis apparatus includes a acquisition unit, a scheduling unit and a generation unit. The acquisition unit acquires a behavioral level description describing an operation of a semiconductor integrated circuit. The scheduling unit separates the acquired behavioral level description into N stage descriptions, and makes a schedule in such a way that input/output operations and computations among the N stage descriptions are pipelined. The generation unit generates a register transfer level description based on the N stage descriptions and a result of scheduling performed by the scheduling unit in such a way as to form stage circuits respectively corresponding to the N stage descriptions and a state control circuit which controls possible 2N−1 stage control states of the semiconductor integrated circuit. The generation unit generates the register transfer level description in such a way as to inhibit the operation of a stage circuit which need not be operated.
摘要翻译：行为综合装置包括获取单元，调度单元和生成单元。采集单元获取描述半导体集成电路的操作的行为级别描述。调度单元将所获取的行为级别描述分为N级描述，并且进行调度，使得N级描述中的输入/输出操作和计算被流水线化。生成单元基于N级描述和由调度单元执行的调度结果以分别对应于N级描述的级电路和控制可能的2N的状态控制电路来生成寄存器传送级别描述 -1级控制状态的半导体集成电路。生成单元以禁止不需要操作的级电路的操作的方式生成寄存器传送级别描述。

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