会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 7. 发明申请
    • Display device
    • 显示设备
    • US20050083353A1
    • 2005-04-21
    • US10914645
    • 2004-08-10
    • Junichi MaruyamaHiroyuki Nitta
    • Junichi MaruyamaHiroyuki Nitta
    • G09G3/36
    • G09G3/3611G09G2300/0434G09G2320/0242G09G2320/0252G09G2320/0257G09G2320/0261G09G2340/16
    • A correction circuit produces correction data, which is used to shorten a response time in a display panel, using first display data received from an external device and second display data stored in a frame memory, and appends the correction data to the first display data. The correction circuit includes: a detection information production circuit that detects based on first color information, second color information, and third color information, which is inferred from the response characteristic of the display panel and represents a change of a gray-scale level from one level to other, whether a color gap is produced during the change of a gray-scale level from one level to other; and a production circuit that when the detection information production circuit detects that a color gap is produced during the change of a gray-scale level from one level to other, produces correction data for the purpose of preventing production of the color gap.
    • 校正电路产生校正数据,其用于使用从外部设备接收的第一显示数据和存储在帧存储器中的第二显示数据来缩短显示面板中的响应时间,并将校正数据附加到第一显示数据。 校正电路包括:检测信息生成电路,其基于从显示面板的响应特性推断的第一颜色信息,第二颜色信息和第三颜色信息进行检测,并且表示灰度级的变化 在灰度级别从一个级别到另一级别的变化期间是否产生色差; 以及生成电路,当检测信息生成电路检测到在灰度级从一个级别变化到另一级时产生色差时,产生用于防止色差产生的校正数据。
    • 9. 发明授权
    • Display drive circuit
    • 显示驱动电路
    • US08154560B2
    • 2012-04-10
    • US12468345
    • 2009-05-19
    • Yoshiki KurokawaYasuyuki KudoHiroyuki NittaKazuki HommaJunya Takeda
    • Yoshiki KurokawaYasuyuki KudoHiroyuki NittaKazuki HommaJunya Takeda
    • G09G5/00G09G5/02H04N1/46H04N1/60G06T1/00G06K9/00G06K9/40
    • G09G1/002G09G3/3655G09G5/04G09G5/06G09G2320/0242G09G2340/145
    • A display drive circuit of the invention has: an initial-color-gamut-apex-coordinate-storing unit capable of storing initial color gamut apex coordinates; a user-target-color-gamut-apex-coordinate-storing unit capable of storing user target color gamut apex coordinates; a saturation-expansion-coefficient-deciding unit for deciding expansion coefficients of saturation data based on the initial and user target color gamut apex coordinates; and an expansion unit for expanding saturations of display data based on the saturation expansion coefficients. The expansion coefficients of saturation data are decided based on the initial and user target color gamut apex coordinates, and saturations of display data are expanded according to the expansion coefficients. Thus, the degree of expanding the saturations can be controlled for each color gamut or each of R, G and B color properties of an LC display panel.
    • 本发明的显示驱动电路具有:能够存储初始色域顶点坐标的初始色域 - 顶点坐标存储单元; 能够存储用户目标色域顶点坐标的用户对象色彩 - 顶点坐标存储单元; 饱和扩张系数决定单元,用于基于初始和用户目标色域顶点坐标来确定饱和度数据的扩展系数; 以及用于基于饱和度膨胀系数扩大显示数据的饱和度的扩展单元。 基于初始和用户目标色域顶点坐标来确定饱和度数据的扩展系数,根据扩展系数扩展显示数据的饱和度。 因此,可以对于每个色域或LC显示面板的R,G和B颜色属性中的每一个来控制饱和度的扩大程度。
    • 10. 发明授权
    • Nonvolatile semiconductor memory device and method of manufacturing the same
    • 非易失性半导体存储器件及其制造方法
    • US08008704B2
    • 2011-08-30
    • US12372505
    • 2009-02-17
    • Hiroyuki Nitta
    • Hiroyuki Nitta
    • H01L21/00
    • H01L27/11524H01L21/764H01L23/5222H01L27/11521H01L2924/0002H01L2924/00
    • To reduce capacitance between each adjacent two word lines in a semiconductor memory device, a first insulating film is formed, with a first gate insulating film thereunder, in an interstice between gates respectively of each adjacent two memory transistors, and in an interstice between a gate of a selective transistor and a gate of a memory transistor adjacent thereto. Additionally, a second insulating film is formed on the first insulating film, sides of the gate of each memory transistor, and a side, facing the memory transistor, of the gate of the selective transistor. A third insulating film is formed parallel to a semiconductor substrate so as to cover a metal silicide film, the first and second insulating films and fourth and fifth insulating films. A void part is provided in the interstice between each adjacent two gates of the memory transistors, and in the interstice between the gate of the selective transistor and the gate of the memory transistor adjacent thereto. A bottom and two sides of each void part are shielded by the second insulating film, and a top of each void part is shielded by the third insulating film.
    • 为了减小半导体存储器件中每个相邻两个字线之间的电容,在每个相邻的两个存储晶体管的栅极之间的间隙中形成第一绝缘膜,其间具有第一栅极绝缘膜,并且在栅极 的选择晶体管和与其相邻的存储晶体管的栅极。 此外,第二绝缘膜形成在第一绝缘膜上,每个存储晶体管的栅极的侧面和面向存储晶体管的选择性晶体管的栅极的一侧。 第三绝缘膜平行于半导体衬底形成以覆盖金属硅化物膜,第一和第二绝缘膜以及第四和第五绝缘膜。 在存储晶体管的每个相邻的两个栅极之间的间隙中以及与选择晶体管的栅极和与其相邻的存储晶体管的栅极之间的空隙中设置空隙部分。 每个空隙部分的底部和两侧被第二绝缘膜屏蔽,并且每个空隙部分的顶部被第三绝缘膜屏蔽。